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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch>
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <dm/pinctrl.h>
9 #include <linux/libfdt.h>
10 #include <asm/io.h>
11 
12 DECLARE_GLOBAL_DATA_PTR;
13 
14 struct single_pdata {
15 	fdt_addr_t base;	/* first configuration register */
16 	int offset;		/* index of last configuration register */
17 	u32 mask;		/* configuration-value mask bits */
18 	int width;		/* configuration register bit width */
19 	bool bits_per_mux;
20 };
21 
22 struct single_fdt_pin_cfg {
23 	fdt32_t reg;		/* configuration register offset */
24 	fdt32_t val;		/* configuration register value */
25 };
26 
27 struct single_fdt_bits_cfg {
28 	fdt32_t reg;		/* configuration register offset */
29 	fdt32_t val;		/* configuration register value */
30 	fdt32_t mask;		/* configuration register mask */
31 };
32 
33 /**
34  * single_configure_pins() - Configure pins based on FDT data
35  *
36  * @dev: Pointer to single pin configuration device which is the parent of
37  *       the pins node holding the pin configuration data.
38  * @pins: Pointer to the first element of an array of register/value pairs
39  *        of type 'struct single_fdt_pin_cfg'. Each such pair describes the
40  *        the pin to be configured and the value to be used for configuration.
41  *        This pointer points to a 'pinctrl-single,pins' property in the
42  *        device-tree.
43  * @size: Size of the 'pins' array in bytes.
44  *        The number of register/value pairs in the 'pins' array therefore
45  *        equals to 'size / sizeof(struct single_fdt_pin_cfg)'.
46  */
single_configure_pins(struct udevice * dev,const struct single_fdt_pin_cfg * pins,int size)47 static int single_configure_pins(struct udevice *dev,
48 				 const struct single_fdt_pin_cfg *pins,
49 				 int size)
50 {
51 	struct single_pdata *pdata = dev->platdata;
52 	int count = size / sizeof(struct single_fdt_pin_cfg);
53 	phys_addr_t n, reg;
54 	u32 val;
55 
56 	for (n = 0; n < count; n++, pins++) {
57 		reg = fdt32_to_cpu(pins->reg);
58 		if ((reg < 0) || (reg > pdata->offset)) {
59 			dev_dbg(dev, "  invalid register offset 0x%pa\n", &reg);
60 			continue;
61 		}
62 		reg += pdata->base;
63 		val = fdt32_to_cpu(pins->val) & pdata->mask;
64 		switch (pdata->width) {
65 		case 16:
66 			writew((readw(reg) & ~pdata->mask) | val, reg);
67 			break;
68 		case 32:
69 			writel((readl(reg) & ~pdata->mask) | val, reg);
70 			break;
71 		default:
72 			dev_warn(dev, "unsupported register width %i\n",
73 				 pdata->width);
74 			continue;
75 		}
76 		dev_dbg(dev, "  reg/val 0x%pa/0x%08x\n", &reg, val);
77 	}
78 	return 0;
79 }
80 
single_configure_bits(struct udevice * dev,const struct single_fdt_bits_cfg * pins,int size)81 static int single_configure_bits(struct udevice *dev,
82 				 const struct single_fdt_bits_cfg *pins,
83 				 int size)
84 {
85 	struct single_pdata *pdata = dev->platdata;
86 	int count = size / sizeof(struct single_fdt_bits_cfg);
87 	phys_addr_t n, reg;
88 	u32 val, mask;
89 
90 	for (n = 0; n < count; n++, pins++) {
91 		reg = fdt32_to_cpu(pins->reg);
92 		if ((reg < 0) || (reg > pdata->offset)) {
93 			dev_dbg(dev, "  invalid register offset 0x%pa\n", &reg);
94 			continue;
95 		}
96 		reg += pdata->base;
97 
98 		mask = fdt32_to_cpu(pins->mask);
99 		val = fdt32_to_cpu(pins->val) & mask;
100 
101 		switch (pdata->width) {
102 		case 16:
103 			writew((readw(reg) & ~mask) | val, reg);
104 			break;
105 		case 32:
106 			writel((readl(reg) & ~mask) | val, reg);
107 			break;
108 		default:
109 			dev_warn(dev, "unsupported register width %i\n",
110 				 pdata->width);
111 			continue;
112 		}
113 		dev_dbg(dev, "  reg/val 0x%pa/0x%08x\n", &reg, val);
114 	}
115 	return 0;
116 }
single_set_state(struct udevice * dev,struct udevice * config)117 static int single_set_state(struct udevice *dev,
118 			    struct udevice *config)
119 {
120 	const void *fdt = gd->fdt_blob;
121 	const struct single_fdt_pin_cfg *prop;
122 	const struct single_fdt_bits_cfg *prop_bits;
123 	int len;
124 
125 	prop = fdt_getprop(fdt, dev_of_offset(config), "pinctrl-single,pins",
126 			   &len);
127 
128 	if (prop) {
129 		dev_dbg(dev, "configuring pins for %s\n", config->name);
130 		if (len % sizeof(struct single_fdt_pin_cfg)) {
131 			dev_dbg(dev, "  invalid pin configuration in fdt\n");
132 			return -FDT_ERR_BADSTRUCTURE;
133 		}
134 		single_configure_pins(dev, prop, len);
135 		return 0;
136 	}
137 
138 	/* pinctrl-single,pins not found so check for pinctrl-single,bits */
139 	prop_bits = fdt_getprop(fdt, dev_of_offset(config),
140 				"pinctrl-single,bits",
141 				    &len);
142 	if (prop_bits) {
143 		dev_dbg(dev, "configuring pins for %s\n", config->name);
144 		if (len % sizeof(struct single_fdt_bits_cfg)) {
145 			dev_dbg(dev, "  invalid bits configuration in fdt\n");
146 			return -FDT_ERR_BADSTRUCTURE;
147 		}
148 		single_configure_bits(dev, prop_bits, len);
149 		return 0;
150 	}
151 
152 	/* Neither 'pinctrl-single,pins' nor 'pinctrl-single,bits' were found */
153 	return len;
154 }
155 
single_ofdata_to_platdata(struct udevice * dev)156 static int single_ofdata_to_platdata(struct udevice *dev)
157 {
158 	fdt_addr_t addr;
159 	u32 of_reg[2];
160 	int res;
161 	struct single_pdata *pdata = dev->platdata;
162 
163 	pdata->width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
164 				      "pinctrl-single,register-width", 0);
165 
166 	res = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
167 				   "reg", of_reg, 2);
168 	if (res)
169 		return res;
170 	pdata->offset = of_reg[1] - pdata->width / 8;
171 
172 	addr = devfdt_get_addr(dev);
173 	if (addr == FDT_ADDR_T_NONE) {
174 		dev_dbg(dev, "no valid base register address\n");
175 		return -EINVAL;
176 	}
177 	pdata->base = addr;
178 
179 	pdata->mask = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
180 				     "pinctrl-single,function-mask",
181 				     0xffffffff);
182 	pdata->bits_per_mux = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
183 					      "pinctrl-single,bit-per-mux");
184 
185 	return 0;
186 }
187 
188 const struct pinctrl_ops single_pinctrl_ops = {
189 	.set_state = single_set_state,
190 };
191 
192 static const struct udevice_id single_pinctrl_match[] = {
193 	{ .compatible = "pinctrl-single" },
194 	{ /* sentinel */ }
195 };
196 
197 U_BOOT_DRIVER(single_pinctrl) = {
198 	.name = "single-pinctrl",
199 	.id = UCLASS_PINCTRL,
200 	.of_match = single_pinctrl_match,
201 	.ops = &single_pinctrl_ops,
202 	.platdata_auto_alloc_size = sizeof(struct single_pdata),
203 	.ofdata_to_platdata = single_ofdata_to_platdata,
204 };
205