1 #ifndef __DEBUG_H__ 2 #define __DEBUG_H__ 3 4 #include "types.h" 5 #include "platform.h" 6 #include <stdarg.h> 7 8 #ifdef DEBUG 9 10 #define MHZ (1000*1000) 11 #if 0 12 #define CFG_CLK_OTHER_BASE 32//FIXME 13 #define CFG_CLK_OTHER (CFG_CLK_OTHER_BASE*MHZ) 14 #else 15 #define CFG_CLK_OTHER (19200000) 16 #endif 17 18 /*----------------------------------------------------------------------- 19 * Serial Configuration 20 */ 21 #define CONFIG_PL011_CLOCK CFG_CLK_OTHER//FIXME 22 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0 } 23 #define CONFIG_CONS_INDEX 0 /* select the default console */ 24 #define CONFIG_BAUDRATE 115200 25 #define CFG_SERIAL0 REG_BASE_UART6 26 27 28 /* 29 * ARM PrimeCell UART's (PL010 & PL011) 30 * ------------------------------------ 31 * 32 * Definitions common to both PL010 & PL011 33 * 34 */ 35 #define UART_PL01x_DR 0x00 /* Data read or written from the interface. */ 36 #define UART_PL01x_RSR 0x04 /* Receive status register (Read). */ 37 #define UART_PL01x_ECR 0x04 /* Error clear register (Write). */ 38 #define UART_PL01x_FR 0x18 /* Flag register (Read only). */ 39 40 #define UART_PL01x_RSR_OE 0x08 41 #define UART_PL01x_RSR_BE 0x04 42 #define UART_PL01x_RSR_PE 0x02 43 #define UART_PL01x_RSR_FE 0x01 44 45 #define UART_PL01x_FR_TXFE 0x80 46 #define UART_PL01x_FR_RXFF 0x40 47 #define UART_PL01x_FR_TXFF 0x20 48 #define UART_PL01x_FR_RXFE 0x10 49 #define UART_PL01x_FR_BUSY 0x08 50 #define UART_PL01x_FR_TMSK (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY) 51 52 /* 53 * PL010 definitions 54 * 55 */ 56 #define UART_PL010_LCRH 0x08 /* Line control register, high byte. */ 57 #define UART_PL010_LCRM 0x0C /* Line control register, middle byte. */ 58 #define UART_PL010_LCRL 0x10 /* Line control register, low byte. */ 59 #define UART_PL010_CR 0x14 /* Control register. */ 60 #define UART_PL010_IIR 0x1C /* Interrupt indentification register (Read). */ 61 #define UART_PL010_ICR 0x1C /* Interrupt clear register (Write). */ 62 #define UART_PL010_ILPR 0x20 /* IrDA low power counter register. */ 63 64 #define UART_PL010_CR_LPE (1 << 7) 65 #define UART_PL010_CR_RTIE (1 << 6) 66 #define UART_PL010_CR_TIE (1 << 5) 67 #define UART_PL010_CR_RIE (1 << 4) 68 #define UART_PL010_CR_MSIE (1 << 3) 69 #define UART_PL010_CR_IIRLP (1 << 2) 70 #define UART_PL010_CR_SIREN (1 << 1) 71 #define UART_PL010_CR_UARTEN (1 << 0) 72 73 #define UART_PL010_LCRH_WLEN_8 (3 << 5) 74 #define UART_PL010_LCRH_WLEN_7 (2 << 5) 75 #define UART_PL010_LCRH_WLEN_6 (1 << 5) 76 #define UART_PL010_LCRH_WLEN_5 (0 << 5) 77 #define UART_PL010_LCRH_FEN (1 << 4) 78 #define UART_PL010_LCRH_STP2 (1 << 3) 79 #define UART_PL010_LCRH_EPS (1 << 2) 80 #define UART_PL010_LCRH_PEN (1 << 1) 81 #define UART_PL010_LCRH_BRK (1 << 0) 82 83 84 #define UART_PL010_BAUD_460800 1 85 #define UART_PL010_BAUD_230400 3 86 #define UART_PL010_BAUD_115200 7 87 #define UART_PL010_BAUD_57600 15 88 #define UART_PL010_BAUD_38400 23 89 #define UART_PL010_BAUD_19200 47 90 #define UART_PL010_BAUD_14400 63 91 #define UART_PL010_BAUD_9600 95 92 #define UART_PL010_BAUD_4800 191 93 #define UART_PL010_BAUD_2400 383 94 #define UART_PL010_BAUD_1200 767 95 /* 96 * PL011 definitions 97 * 98 */ 99 #define UART_PL011_IBRD 0x24 100 #define UART_PL011_FBRD 0x28 101 #define UART_PL011_LCRH 0x2C 102 #define UART_PL011_CR 0x30 103 #define UART_PL011_IMSC 0x38 104 #define UART_PL011_PERIPH_ID0 0xFE0 105 106 #define UART_PL011_LCRH_SPS (1 << 7) 107 #define UART_PL011_LCRH_WLEN_8 (3 << 5) 108 #define UART_PL011_LCRH_WLEN_7 (2 << 5) 109 #define UART_PL011_LCRH_WLEN_6 (1 << 5) 110 #define UART_PL011_LCRH_WLEN_5 (0 << 5) 111 #define UART_PL011_LCRH_FEN (1 << 4) 112 #define UART_PL011_LCRH_STP2 (1 << 3) 113 #define UART_PL011_LCRH_EPS (1 << 2) 114 #define UART_PL011_LCRH_PEN (1 << 1) 115 #define UART_PL011_LCRH_BRK (1 << 0) 116 117 #define UART_PL011_CR_CTSEN (1 << 15) 118 #define UART_PL011_CR_RTSEN (1 << 14) 119 #define UART_PL011_CR_OUT2 (1 << 13) 120 #define UART_PL011_CR_OUT1 (1 << 12) 121 #define UART_PL011_CR_RTS (1 << 11) 122 #define UART_PL011_CR_DTR (1 << 10) 123 #define UART_PL011_CR_RXE (1 << 9) 124 #define UART_PL011_CR_TXE (1 << 8) 125 #define UART_PL011_CR_LPE (1 << 7) 126 #define UART_PL011_CR_IIRLP (1 << 2) 127 #define UART_PL011_CR_SIREN (1 << 1) 128 #define UART_PL011_CR_UARTEN (1 << 0) 129 130 #define UART_PL011_IMSC_OEIM (1 << 10) 131 #define UART_PL011_IMSC_BEIM (1 << 9) 132 #define UART_PL011_IMSC_PEIM (1 << 8) 133 #define UART_PL011_IMSC_FEIM (1 << 7) 134 #define UART_PL011_IMSC_RTIM (1 << 6) 135 #define UART_PL011_IMSC_TXIM (1 << 5) 136 #define UART_PL011_IMSC_RXIM (1 << 4) 137 #define UART_PL011_IMSC_DSRMIM (1 << 3) 138 #define UART_PL011_IMSC_DCDMIM (1 << 2) 139 #define UART_PL011_IMSC_CTSMIM (1 << 1) 140 #define UART_PL011_IMSC_RIMIM (1 << 0) 141 142 void console_init(); 143 144 void __xprintf(const char *fmt, va_list ap, 145 void (*xputc)(unsigned n, void *cookie), 146 void *cookie); 147 void cprintf(const char *fmt, ...); 148 149 150 #define debug_init() console_init() 151 #define debug_printf cprintf 152 #define ASSERT(cond,exp) \ 153 if(!(cond)) {cprintf((UINT8 *)exp);while(TRUE);} 154 #define MSGLOGSTR(x) cprintf(x); 155 156 #else 157 158 #define debug_init() 159 #define debug_printf(exp, ...) 160 #define ASSERT(cond,exp) 161 #define MSGLOGSTR(x) 162 163 #endif 164 165 #endif /* end of __DEBUG_H__ */ 166 167