1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Amlogic Meson Video Processing Unit driver
4 *
5 * Copyright (c) 2018 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 */
8
9 #include "meson_vpu.h"
10 #include <efi_loader.h>
11 #include <dm/device-internal.h>
12 #include <dm/uclass-internal.h>
13 #include <fdt_support.h>
14 #include <linux/sizes.h>
15 #include <asm/arch/mem.h>
16 #include "meson_registers.h"
17 #include "simplefb_common.h"
18
19 #define MESON_VPU_OVERSCAN SZ_64K
20
21 /* Static variable for use in meson_vpu_rsv_fb() */
22 static struct meson_framebuffer {
23 u64 base;
24 u64 fb_size;
25 unsigned int xsize;
26 unsigned int ysize;
27 bool is_cvbs;
28 } meson_fb = { 0 };
29
meson_vpu_setup_mode(struct udevice * dev,struct udevice * disp)30 static int meson_vpu_setup_mode(struct udevice *dev, struct udevice *disp)
31 {
32 struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
33 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
34 struct display_timing timing;
35 bool is_cvbs = false;
36 int ret = 0;
37
38 if (disp) {
39 ret = display_read_timing(disp, &timing);
40 if (ret) {
41 debug("%s: Failed to read timings\n", __func__);
42 goto cvbs;
43 }
44
45 uc_priv->xsize = timing.hactive.typ;
46 uc_priv->ysize = timing.vactive.typ;
47
48 ret = display_enable(disp, 0, &timing);
49 if (ret)
50 goto cvbs;
51 } else {
52 cvbs:
53 /* CVBS has a fixed 720x480i (NTSC) and 720x576i (PAL) */
54 is_cvbs = true;
55 timing.flags = DISPLAY_FLAGS_INTERLACED;
56 uc_priv->xsize = 720;
57 uc_priv->ysize = 576;
58 }
59
60 uc_priv->bpix = VPU_MAX_LOG2_BPP;
61
62 meson_fb.is_cvbs = is_cvbs;
63 meson_fb.xsize = uc_priv->xsize;
64 meson_fb.ysize = uc_priv->ysize;
65
66 /* Move the framebuffer to the end of addressable ram */
67 meson_fb.fb_size = ALIGN(meson_fb.xsize * meson_fb.ysize *
68 ((1 << VPU_MAX_LOG2_BPP) / 8) +
69 MESON_VPU_OVERSCAN, EFI_PAGE_SIZE);
70 meson_fb.base = gd->bd->bi_dram[0].start +
71 gd->bd->bi_dram[0].size - meson_fb.fb_size;
72
73 /* Override the framebuffer address */
74 uc_plat->base = meson_fb.base;
75
76 meson_vpu_setup_plane(dev, timing.flags & DISPLAY_FLAGS_INTERLACED);
77 meson_vpu_setup_venc(dev, &timing, is_cvbs);
78 meson_vpu_setup_vclk(dev, &timing, is_cvbs);
79
80 video_set_flush_dcache(dev, 1);
81
82 return 0;
83 }
84
85 static const struct udevice_id meson_vpu_ids[] = {
86 { .compatible = "amlogic,meson-gxbb-vpu", .data = VPU_COMPATIBLE_GXBB },
87 { .compatible = "amlogic,meson-gxl-vpu", .data = VPU_COMPATIBLE_GXL },
88 { .compatible = "amlogic,meson-gxm-vpu", .data = VPU_COMPATIBLE_GXM },
89 { .compatible = "amlogic,meson-g12a-vpu", .data = VPU_COMPATIBLE_G12A },
90 { }
91 };
92
meson_vpu_probe(struct udevice * dev)93 static int meson_vpu_probe(struct udevice *dev)
94 {
95 struct meson_vpu_priv *priv = dev_get_priv(dev);
96 struct udevice *disp;
97 int ret;
98
99 /* Before relocation we don't need to do anything */
100 if (!(gd->flags & GD_FLG_RELOC))
101 return 0;
102
103 priv->dev = dev;
104
105 priv->io_base = dev_remap_addr_index(dev, 0);
106 if (!priv->io_base)
107 return -EINVAL;
108
109 priv->hhi_base = dev_remap_addr_index(dev, 1);
110 if (!priv->hhi_base)
111 return -EINVAL;
112
113 priv->dmc_base = dev_remap_addr_index(dev, 2);
114 if (!priv->dmc_base)
115 return -EINVAL;
116
117 meson_vpu_init(dev);
118
119 /* probe the display */
120 ret = uclass_get_device(UCLASS_DISPLAY, 0, &disp);
121
122 return meson_vpu_setup_mode(dev, ret ? NULL : disp);
123 }
124
meson_vpu_bind(struct udevice * dev)125 static int meson_vpu_bind(struct udevice *dev)
126 {
127 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
128
129 plat->size = VPU_MAX_WIDTH * VPU_MAX_HEIGHT *
130 (1 << VPU_MAX_LOG2_BPP) / 8;
131
132 return 0;
133 }
134
135 #if defined(CONFIG_VIDEO_DT_SIMPLEFB)
meson_vpu_setup_simplefb(void * fdt)136 static void meson_vpu_setup_simplefb(void *fdt)
137 {
138 const char *pipeline = NULL;
139 u64 mem_start, mem_size;
140 int offset, ret;
141
142 if (meson_fb.is_cvbs)
143 pipeline = "vpu-cvbs";
144 else
145 pipeline = "vpu-hdmi";
146
147 offset = meson_simplefb_fdt_match(fdt, pipeline);
148 if (offset < 0) {
149 eprintf("Cannot setup simplefb: node not found\n");
150
151 /* If simplefb is missing, add it as reserved memory */
152 meson_board_add_reserved_memory(fdt, meson_fb.base,
153 meson_fb.fb_size);
154
155 return;
156 }
157
158 /*
159 * SimpleFB will try to iomap the framebuffer, so we can't use
160 * fdt_add_mem_rsv on the memory area. Instead, the FB is stored
161 * at the end of the RAM and we strip this portion from the kernel
162 * allowed region
163 */
164 mem_start = gd->bd->bi_dram[0].start;
165 mem_size = gd->bd->bi_dram[0].size - meson_fb.fb_size;
166 ret = fdt_fixup_memory_banks(fdt, &mem_start, &mem_size, 1);
167 if (ret) {
168 eprintf("Cannot setup simplefb: Error reserving memory\n");
169 return;
170 }
171
172 ret = fdt_setup_simplefb_node(fdt, offset, meson_fb.base,
173 meson_fb.xsize, meson_fb.ysize,
174 meson_fb.xsize * 4, "x8r8g8b8");
175 if (ret)
176 eprintf("Cannot setup simplefb: Error setting properties\n");
177 }
178 #endif
179
meson_vpu_rsv_fb(void * fdt)180 void meson_vpu_rsv_fb(void *fdt)
181 {
182 if (!meson_fb.base || !meson_fb.xsize || !meson_fb.ysize)
183 return;
184
185 #if defined(CONFIG_EFI_LOADER)
186 efi_add_memory_map(meson_fb.base, meson_fb.fb_size >> EFI_PAGE_SHIFT,
187 EFI_RESERVED_MEMORY_TYPE, false);
188 #endif
189 #if defined(CONFIG_VIDEO_DT_SIMPLEFB)
190 meson_vpu_setup_simplefb(fdt);
191 #endif
192 }
193
194 U_BOOT_DRIVER(meson_vpu) = {
195 .name = "meson_vpu",
196 .id = UCLASS_VIDEO,
197 .of_match = meson_vpu_ids,
198 .probe = meson_vpu_probe,
199 .bind = meson_vpu_bind,
200 .priv_auto_alloc_size = sizeof(struct meson_vpu_priv),
201 .flags = DM_FLAG_PRE_RELOC,
202 };
203