1 /* 2 * hi3516cv500.h 3 * 4 * Declaration of Header Files Related to the Chip. 5 * 6 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 * 21 */ 22 23 #ifndef __HI3516CV500_H 24 #define __HI3516CV500_H 25 26 #include <linux/sizes.h> 27 #include <asm/arch/platform.h> 28 29 #define CONFIG_SYS_CACHELINE_SIZE 64 30 31 /* base on needs #define CONFIG_REMAKE_ELF */ 32 33 #define CONFIG_SUPPORT_RAW_INITRD 34 35 #define CONFIG_BOARD_EARLY_INIT_F 36 37 /* Physical Memory Map */ 38 39 /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ 40 #define CONFIG_SYS_TEXT_BASE 0x80800000 41 #define CONFIG_SYS_TEXT_BASE_ORI 0x80700000 42 43 #define PHYS_SDRAM_1 0x80000000 44 #define PHYS_SDRAM_1_SIZE 0x10000000 45 46 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 47 48 #define CONFIG_SYS_INIT_SP_ADDR 0x04014000 49 50 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000 + 0x2000000) 51 #define CONFIG_SYS_GBL_DATA_SIZE 128 52 53 /* Generic Timer Definitions */ 54 #define COUNTER_FREQUENCY 0x1800000 55 56 #define CONFIG_SYS_TIMER_RATE CFG_TIMER_CLK 57 #define CONFIG_SYS_TIMER_COUNTER (CFG_TIMERBASE + REG_TIMER_VALUE) 58 #define CONFIG_SYS_TIMER_COUNTS_DOWN 59 60 /* Generic Interrupt Controller Definitions */ 61 #define GICD_BASE 0xf6801000 62 #define GICC_BASE 0xf6802000 63 64 /* Size of malloc() pool */ 65 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) 66 67 /* PL011 Serial Configuration */ 68 #define CONFIG_PL011_CLOCK 24000000 69 70 #define CONFIG_PL01x_PORTS \ 71 {(void *)UART0_REG_BASE, (void *)UART1_REG_BASE, \ 72 (void *)UART2_REG_BASE, (void *)UART3_REG_BASE} 73 74 #define CONFIG_CUR_UART_BASE UART0_REG_BASE 75 76 /* Flash Memory Configuration v100 */ 77 #ifdef CONFIG_HIFMC 78 #define CONFIG_HIFMC_REG_BASE FMC_REG_BASE 79 #define CONFIG_HIFMC_BUFFER_BASE FMC_MEM_BASE 80 #define CONFIG_HIFMC_MAX_CS_NUM 1 81 #endif 82 83 #ifdef CONFIG_HIFMC_SPI_NOR 84 #define CONFIG_CMD_SF 85 #define CONFIG_SPI_NOR_MAX_CHIP_NUM 1 86 #define CONFIG_SPI_NOR_QUIET_TEST 87 #endif 88 89 #ifdef CONFIG_HIFMC_SPI_NAND 90 #define CONFIG_CMD_NAND 91 #define CONFIG_SPI_NAND_MAX_CHIP_NUM 1 92 #define CONFIG_SYS_MAX_NAND_DEVICE CONFIG_SPI_NAND_MAX_CHIP_NUM 93 #define CONFIG_SYS_NAND_MAX_CHIPS CONFIG_SPI_NAND_MAX_CHIP_NUM 94 #define CONFIG_SYS_NAND_BASE FMC_MEM_BASE 95 #endif 96 97 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 98 /*----------------------------------------------------------------------- 99 * HIETH driver 100 -----------------------------------------------------------------------*/ 101 /* default is hieth-switch-fabric */ 102 #ifdef CONFIG_HISFV300_ETH 103 #define HISFV_RESET_PHY_BY_CRG 104 #define HISFV_MII_MODE 0 105 #define HISFV_RMII_MODE 1 106 #define HIETH_MII_RMII_MODE_U HISFV_RMII_MODE 107 #define HIETH_MII_RMII_MODE_D HISFV_RMII_MODE 108 #define HISFV_PHY_U 1 109 #define HISFV_PHY_D 2 110 #endif /* CONFIG_HISFV300_ETH */ 111 112 /* SD/MMC configuration */ 113 #ifdef CONFIG_MMC 114 #define CONFIG_SUPPORT_EMMC_BOOT 115 #define CONFIG_GENERIC_MMC 116 #define CONFIG_CMD_MMC 117 #define CONFIG_SYS_MMC_ENV_DEV 0 118 #define CONFIG_EXT4_SPARSE 119 #define CONFIG_BOUNCE_BUFFER 120 #define CONFIG_FS_EXT4 121 #endif 122 123 #define CONFIG_MISC_INIT_R 124 125 /* Command line configuration */ 126 #define CONFIG_MENU 127 #define CONFIG_CMD_UNZIP 128 #define CONFIG_CMD_ENV 129 130 #define CONFIG_MTD_PARTITIONS 131 132 /* BOOTP options */ 133 #define CONFIG_BOOTP_BOOTFILESIZE 134 135 /* Initial environment variables */ 136 137 /* 138 * Defines where the kernel and FDT will be put in RAM 139 */ 140 141 /* Assume we boot with root on the seventh partition of eMMC */ 142 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 root=/dev/mtdblock2 rw" 143 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 144 #define BOOT_TARGET_DEVICES(func) \ 145 func(USB, usb, 0) \ 146 func(MMC, mmc, 1) \ 147 func(DHCP, dhcp, na) 148 #include <config_distro_bootcmd.h> 149 150 /* allow change env */ 151 #define CONFIG_ENV_OVERWRITE 152 153 #define CONFIG_COMMAND_HISTORY 154 155 /* env in flash instead of CFG_ENV_IS_NOWHERE */ 156 #define CONFIG_ENV_OFFSET 0x80000 /* environment starts here */ 157 158 #define CONFIG_ENV_VARS_UBOOT_CONFIG 159 160 /* kernel parameter list phy addr */ 161 #define CFG_BOOT_PARAMS (0x82800000 - 0x100) 162 163 /* Monitor Command Prompt */ 164 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 165 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 166 sizeof(CONFIG_SYS_PROMPT) + 16) 167 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 168 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 169 170 #define CONFIG_SYS_NO_FLASH 171 172 #define CONFIG_DDR_TRAINING_V2 173 174 #define CONFIG_PRODUCTNAME "hi3516cv500" 175 176 /* the flag for auto update. 1:enable; 0:disable */ 177 #define CONFIG_AUTO_UPDATE 1 178 179 #if (CONFIG_AUTO_UPDATE == 1) 180 #define CONFIG_AUTO_UPDATE_ADAPTATION 1 181 #define CONFIG_AUTO_SD_UPDATE 1 182 #define CONFIG_AUTO_USB_UPDATE 1 183 184 #define CONFIG_FS_FAT 1 185 #define CONFIG_FS_FAT_MAX_CLUSTSIZE 65536 186 #endif 187 188 /*--------------------------------------------------------------------- 189 * sdcard system updae 190 * ---------------------------------------------------------------------*/ 191 #ifdef CONFIG_AUTO_SD_UPDATE 192 193 #ifndef CONFIG_GENERIC_MMC 194 #define CONFIG_GENERIC_MMC 195 #define CONFIG_CMD_MMC 196 #endif 197 198 #ifndef CONFIG_MMC 199 #define CONFIG_MMC 1 200 #define CONFIG_HIMCI 1 201 #define CONFIG_MMC_WRITE 1 202 #define CONFIG_MMC_QUIRKS 1 203 #define CONFIG_MMC_HW_PARTITIONING 1 204 #define CONFIG_MMC_HS400_ES_SUPPORT 1 205 #define CONFIG_MMC_HS400_SUPPORT 1 206 #define CONFIG_MMC_HS200_SUPPORT 1 207 #define CONFIG_MMC_VERBOSE 1 208 #endif 209 #ifndef CONFIG_HIFMC 210 #define CONFIG_EMMC 211 #endif 212 #endif 213 214 #ifdef CONFIG_HIMCI 215 #define CONFIG_HIMCI_MAX_FREQ 100000000 216 #define CONFIG_SDIO0_FREQ 50000000 217 #define CONFIG_MMC_POWER_OFF_TIMEOUT 5 218 #define CONFIG_MMC_POWER_ON_TIMEROUT 40 219 #define CONFIG_MMC_RESET_LOW_TIMEOUT 10 220 #define CONFIG_MMC_RESET_HIGH_TIMEROUT 300 221 #endif 222 223 #define CONFIG_SKIP_LOWLEVEL_INIT 224 #define CONFIG_CMDLINE_TAG 225 226 /* base on needs #define CONFIG_CIPHER_ENABLE */ 227 228 /* base on needs #define CONFIG_EDMA_PLL_TRAINNING */ 229 230 #endif /* __HI3516CV500_H */ 231