1 /* 2 * hi3516dv200.h 3 * 4 * Declaration of Header Files Related to the Chip. 5 * 6 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 * 21 */ 22 23 #ifndef __HI3516DV200_H 24 #define __HI3516DV200_H 25 26 #include <linux/sizes.h> 27 #include <asm/arch/platform.h> 28 29 #define CONFIG_SYS_CACHELINE_SIZE 64 30 31 /* base on needs #define CONFIG_REMAKE_ELF */ 32 33 #define CONFIG_SUPPORT_RAW_INITRD 34 35 #define CONFIG_BOARD_EARLY_INIT_F 36 37 /* Physical Memory Map */ 38 39 /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ 40 #define CONFIG_SYS_TEXT_BASE 0x40800000 41 #define CONFIG_SYS_TEXT_BASE_ORI 0x40700000 42 43 #define PHYS_SDRAM_1 0x40000000 44 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 0x20000000 */ 45 46 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 47 48 49 #define CONFIG_SYS_INIT_SP_ADDR 0x04014000 50 51 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) 52 #define CONFIG_SYS_GBL_DATA_SIZE 128 53 54 /* Generic Timer Definitions */ 55 #define COUNTER_FREQUENCY 0x1800000 56 57 #define CONFIG_SYS_TIMER_RATE CFG_TIMER_CLK 58 #define CONFIG_SYS_TIMER_COUNTER (CFG_TIMERBASE + REG_TIMER_VALUE) 59 #define CONFIG_SYS_TIMER_COUNTS_DOWN 60 61 62 /* Generic Interrupt Controller Definitions */ 63 #define GICD_BASE 0xf6801000 64 #define GICC_BASE 0xf6802000 65 66 /* Size of malloc() pool */ 67 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) 68 69 /* PL011 Serial Configuration */ 70 #define CONFIG_PL011_CLOCK 24000000 71 72 #define CONFIG_PL01x_PORTS \ 73 {(void *)UART0_REG_BASE, (void *)UART1_REG_BASE, \ 74 (void *)UART2_REG_BASE} 75 76 #define CONFIG_CUR_UART_BASE UART0_REG_BASE 77 78 /* Flash Memory Configuration v100 */ 79 #ifdef CONFIG_HIFMC 80 #define CONFIG_HIFMC_REG_BASE FMC_REG_BASE 81 #define CONFIG_HIFMC_BUFFER_BASE FMC_MEM_BASE 82 #define CONFIG_HIFMC_MAX_CS_NUM 1 83 #endif 84 85 #ifdef CONFIG_HIFMC_SPI_NOR 86 #define CONFIG_CMD_SF 87 #define CONFIG_SPI_NOR_MAX_CHIP_NUM 1 88 #define CONFIG_SPI_NOR_QUIET_TEST 89 #endif 90 91 #ifdef CONFIG_HIFMC_SPI_NAND 92 #define CONFIG_CMD_NAND 93 #define CONFIG_SPI_NAND_MAX_CHIP_NUM 1 94 #define CONFIG_SYS_MAX_NAND_DEVICE CONFIG_SPI_NAND_MAX_CHIP_NUM 95 #define CONFIG_SYS_NAND_MAX_CHIPS CONFIG_SPI_NAND_MAX_CHIP_NUM 96 #define CONFIG_SYS_NAND_BASE FMC_MEM_BASE 97 #endif 98 99 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 100 /*----------------------------------------------------------------------- 101 * HIETH driver 102 -----------------------------------------------------------------------*/ 103 /* default is hieth-switch-fabric */ 104 #ifdef CONFIG_HISFV300_ETH 105 #define INNER_PHY 106 #define HISFV_MII_MODE 0 107 #define HISFV_RMII_MODE 1 108 #define HIETH_MII_RMII_MODE_U HISFV_MII_MODE 109 #define HIETH_MII_RMII_MODE_D HISFV_MII_MODE 110 #define HISFV_PHY_U 0 111 #define HISFV_PHY_D 2 112 #endif /* CONFIG_HISFV300_ETH */ 113 114 /* 115 base on needs #ifdef CONFIG_HIMCI 116 base on needs #define CONFIG_HIMCI_MAX_FREQ 50000000 117 base on needs #define CONFIG_MMC_POWER_OFF_TIMEOUT 5 118 base on needs #define CONFIG_MMC_POWER_ON_TIMEROUT 40 119 base on needs #define CONFIG_MMC_RESET_LOW_TIMEOUT 10 120 base on needs #define CONFIG_MMC_RESET_HIGH_TIMEROUT 300 121 */ 122 #define CONFIG_MISC_INIT_R 123 124 /* Command line configuration */ 125 #define CONFIG_MENU 126 #define CONFIG_CMD_UNZIP 127 #define CONFIG_CMD_ENV 128 129 #define CONFIG_MTD_PARTITIONS 130 131 /* BOOTP options */ 132 #define CONFIG_BOOTP_BOOTFILESIZE 133 134 /* Initial environment variables */ 135 136 /* 137 * Defines where the kernel and FDT will be put in RAM 138 */ 139 140 /* Assume we boot with root on the seventh partition of eMMC */ 141 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 root=/dev/mtdblock2 rw" 142 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 143 #define BOOT_TARGET_DEVICES(func) \ 144 func(USB, usb, 0) \ 145 func(MMC, mmc, 1) \ 146 func(DHCP, dhcp, na) 147 #include <config_distro_bootcmd.h> 148 149 /* allow change env */ 150 #define CONFIG_ENV_OVERWRITE 151 152 #define CONFIG_COMMAND_HISTORY 153 154 /* env in flash instead of CFG_ENV_IS_NOWHERE */ 155 #define CONFIG_ENV_OFFSET 0x80000 /* environment starts here */ 156 157 #define CONFIG_ENV_VARS_UBOOT_CONFIG 158 159 /* kernel parameter list phy addr */ 160 #define CFG_BOOT_PARAMS (CONFIG_SYS_SDRAM_BASE + 0x0100) 161 162 /* Monitor Command Prompt */ 163 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 164 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 165 sizeof(CONFIG_SYS_PROMPT) + 16) 166 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 167 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 168 169 #define CONFIG_SYS_NO_FLASH 170 171 #define CONFIG_DDR_TRAINING_V2 172 173 /* base on needs #define DDR_SCRAMB_ENABLE */ 174 175 #define CONFIG_PRODUCTNAME "hi3516dv200" 176 177 /* the flag for auto update. 1:enable; 0:disable */ 178 #define CONFIG_AUTO_UPDATE 1 179 180 #if (CONFIG_AUTO_UPDATE == 1) 181 #define CONFIG_AUTO_UPDATE_ADAPTATION 1 182 /* base on needs #define CONFIG_AUTO_SD_UPDATE 1 */ 183 /* base on needs #define CONFIG_AUTO_USB_UPDATE 1 */ 184 185 #define CONFIG_FS_FAT 1 186 #define CONFIG_FS_FAT_MAX_CLUSTSIZE 65536 187 #endif 188 189 /*--------------------------------------------------------------------- 190 * sdcard system updae 191 * ---------------------------------------------------------------------*/ 192 #ifdef CONFIG_AUTO_SD_UPDATE 193 194 #ifndef CONFIG_SDHCI 195 #define CONFIG_MMC_WRITE 1 196 #define CONFIG_MMC_QUIRKS 1 197 #define CONFIG_MMC_HW_PARTITIONING 1 198 #define CONFIG_MMC_HS400_ES_SUPPORT 1 199 #define CONFIG_MMC_HS400_SUPPORT 1 200 #define CONFIG_MMC_HS200_SUPPORT 1 201 #define CONFIG_MMC_VERBOSE 1 202 #define CONFIG_MMC_SDHCI 1 203 #define CONFIG_MMC_SDHCI_ADMA 1 204 #endif 205 206 #ifndef CONFIG_MMC 207 #define CONFIG_MMC 1 208 #endif 209 210 #endif 211 212 /* SD/MMC configuration */ 213 #ifdef CONFIG_MMC 214 #define CONFIG_SUPPORT_EMMC_BOOT 215 #define CONFIG_GENERIC_MMC 216 #define CONFIG_CMD_MMC 217 #define CONFIG_SYS_MMC_ENV_DEV 0 218 #define CONFIG_EXT4_SPARSE 219 #define CONFIG_SDHCI 220 #define CONFIG_HISI_SDHCI 221 #define CONFIG_HISI_SDHCI_MAX_FREQ 90000000 222 #define CONFIG_BOUNCE_BUFFER 223 #define CONFIG_FS_EXT4 224 #define CONFIG_SDHCI_ADMA 225 #endif 226 227 #define CONFIG_SKIP_LOWLEVEL_INIT 228 #define CONFIG_CMDLINE_TAG 229 230 #define HIGZIP_HEAD_SIZE 0X10 231 #define HEAD_MAGIC_NUM0 0X70697A67 /* 'g''z''i''p' */ 232 #define HEAD_MAGIC_NUM0_OFFSET 0X8 233 #define HEAD_MAGIC_NUM1 0X64616568 /* 'h''e''a''d' */ 234 #define HEAD_MAGIC_NUM1_OFFSET 0XC 235 #define COMPRESSED_SIZE_OFFSET 0X0 236 #define UNCOMPRESSED_SIZE_OFFSET 0X4 237 238 /* base on needs #define CONFIG_OSD_ENABLE */ /* For VO */ 239 /* base on needs #define CONFIG_CIPHER_ENABLE */ 240 241 #define CONFIG_CMD_UGZIP 242 243 /* base on needs #define CONFIG_AUDIO_ENABLE */ 244 245 /* base on needs #define CONFIG_EDMA_PLL_TRAINNING */ 246 247 #endif /* __HI3516DV200_H */ 248