Home
last modified time | relevance | path

Searched +full:0 +full:- +full:32 (Results 1 – 25 of 1110) sorted by relevance

12345678910>>...45

/kernel/linux/linux-5.10/fs/cifs/
Dcifs_uniupr.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * uniupr.h - Unicode compressed case ranges
13 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
14 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
15 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
16 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
17 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
18 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
19 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, /* 060-06f */
20 -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, 0, 0, 0, 0, 0, /* 070-07f */
[all …]
/kernel/linux/linux-5.10/fs/jfs/
Djfs_uniupr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2002
13 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
14 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
15 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
16 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
17 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
18 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
19 0,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32, /* 060-06f */
20 -32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32, 0, 0, 0, 0, 0, /* 070-07f */
[all …]
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dpcie-sh7786.h1 /* SPDX-License-Identifier: GPL-2.0
3 * SH7786 PCI-Express controller definitions.
11 /* PCIe bus-0(x4) on SH7786 */ // Rev1.171
12 #define SH4A_PCIE_SPW_BASE 0xFE000000 /* spw config address for controller 0 */
13 #define SH4A_PCIE_SPW_BASE1 0xFE200000 /* spw config address for controller 1 (Rev1.14)*/
14 #define SH4A_PCIE_SPW_BASE2 0xFCC00000 /* spw config address for controller 2 (Rev1.171)*/
15 #define SH4A_PCIE_SPW_BASE_LEN 0x00080000
17 #define SH4A_PCI_CNFG_BASE 0xFE040000 /* pci config address for controller 0 */
18 #define SH4A_PCI_CNFG_BASE1 0xFE240000 /* pci config address for controller 1 (Rev1.14)*/
19 #define SH4A_PCI_CNFG_BASE2 0xFCC40000 /* pci config address for controller 2 (Rev1.171)*/
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 19 /* N 32-bit words worth of info */
17 #define NBUGINTS 1 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
[all …]
Dvmxfeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define NVMXINTS 3 /* N 32-bit words worth of info */
16 /* Pin-Based VM-Execution Controls, EPT/VPID, APIC and VM-Functions, word 0 */
17 #define VMX_FEATURE_INTR_EXITING ( 0*32+ 0) /* "" VM-Exit on vectored interrupts */
18 #define VMX_FEATURE_NMI_EXITING ( 0*32+ 3) /* "" VM-Exit on NMIs */
19 #define VMX_FEATURE_VIRTUAL_NMIS ( 0*32+ 5) /* "vnmi" NMI virtualization */
20 #define VMX_FEATURE_PREEMPTION_TIMER ( 0*32+ 6) /* VMX Preemption Timer */
21 #define VMX_FEATURE_POSTED_INTR ( 0*32+ 7) /* Posted Interrupts */
23 /* EPT/VPID features, scattered to bits 16-23 */
24 #define VMX_FEATURE_INVVPID ( 0*32+ 16) /* INVVPID is supported */
[all …]
/kernel/linux/linux-5.10/tools/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 19 /* N 32-bit words worth of info */
17 #define NBUGINTS 1 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/gpio/
Dgpio-mockup.sh2 # SPDX-License-Identifier: GPL-2.0
7 #3: insert module fail when gpio-mockup is a module.
8 #4: Skip test including run as non-root user.
19 # Kselftest framework requirement - SKIP code is 4.
25 echo "$0 [-f] [-m name] [-t type]"
26 echo "-f: full test. It maybe conflict with existence gpio device."
27 echo "-m: module name, default name is gpio-mockup. It could also test"
29 echo "-t: interface type: chardev(char device) and sysfs(being"
32 echo "$0 -h"
39 if [ $UID != 0 ]; then
[all …]
/kernel/linux/linux-5.10/arch/sparc/crypto/
Ddes_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 .align 32
11 ld [%o0 + 0x00], %f0
12 ld [%o0 + 0x04], %f1
13 DES_KEXPAND(0, 0, 0)
14 DES_KEXPAND(0, 1, 2)
29 std %f0, [%o1 + 0x00]
30 std %f2, [%o1 + 0x08]
31 std %f4, [%o1 + 0x10]
32 std %f6, [%o1 + 0x18]
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_RF.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
17 ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */ in CheckPositive()
18 ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA */ in CheckPositive()
19 ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ in CheckPositive()
20 ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */ in CheckPositive()
24 pDM_Odm->CutVersion << 24 | in CheckPositive()
25 pDM_Odm->SupportPlatform << 16 | in CheckPositive()
26 pDM_Odm->PackageType << 12 | in CheckPositive()
[all …]
/kernel/linux/linux-5.10/arch/x86/crypto/
Dcamellia-aesni-avx2-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * x86_64/AVX2/AES-NI assembler implementation of Camellia
10 #include <asm/nospec-branch.h>
15 #define key_table 0
52 32-way camellia
57 * x0..x7: byte-sliced AB state
61 * x0..x7: new byte-sliced CD state
66 * S-function with AES subbytes \
148 vpbroadcastq key, t0; /* higher 64-bit duplicate ignored */ \
160 /* P-function */ \
[all …]
Dglue_helper-asm-avx2.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright © 2012-2013 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
9 vmovdqu (0*32)(src), x0; \
10 vmovdqu (1*32)(src), x1; \
11 vmovdqu (2*32)(src), x2; \
12 vmovdqu (3*32)(src), x3; \
13 vmovdqu (4*32)(src), x4; \
14 vmovdqu (5*32)(src), x5; \
15 vmovdqu (6*32)(src), x6; \
16 vmovdqu (7*32)(src), x7;
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dcputable.c1 // SPDX-License-Identifier: GPL-2.0-or-later
141 .pvr_mask = 0xffff0000,
142 .pvr_value = 0x00390000,
159 .pvr_mask = 0xffff0000,
160 .pvr_value = 0x003c0000,
176 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
177 .pvr_mask = 0xffffffff,
178 .pvr_value = 0x00440100,
195 .pvr_mask = 0xffff0000,
196 .pvr_value = 0x00440000,
[all …]
/kernel/linux/linux-5.10/drivers/scsi/qla2xxx/
Dqla_dbg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
17 __be16 mailbox_reg[32];
18 __be16 resp_dma_reg[32];
32 __be16 risc_ram[0xf800];
33 __be16 stack_ram[0x1000];
40 __be16 mailbox_reg[32];
54 __be16 risc_ram[0xf000];
60 __be32 host_reg[32];
62 __be16 mailbox_reg[32];
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/
Ddiv64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Divide a 64-bit unsigned number by a 32-bit unsigned number.
4 * This routine assumes that the top 32 bits of the dividend are
5 * non-zero to start with.
7 * the 64-bit quotient, and r4 contains the divisor.
16 lwz r5,0(r3) # get the dividend into r5/r6
19 li r7,0
20 li r8,0
26 1: mr r11,r5 # here dividend.hi != 0
27 andis. r0,r5,0xc000
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/bpf/verifier/
Dsubreg.c1 /* This file contains sub-register zero extension checks for insns defining
2 * sub-registers, meaning:
3 * - All insns under BPF_ALU class. Their BPF_ALU32 variants or narrow width
4 * forms (BPF_END) could define sub-registers.
5 * - Narrow direct loads, BPF_B/H/W | BPF_LDX.
6 * - BPF_LD is not exposed to JIT back-ends, so no need for testing.
8 * "get_prandom_u32" is used to initialize low 32-bit of some registers to
9 * prevent potential optimizations done by verifier or JIT back-ends which could
16 BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
18 BPF_LD_IMM64(BPF_REG_0, 0x100000000ULL),
[all …]
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dpcic.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 static inline int pcic_present(void) { return 0; } in pcic_present()
40 static inline int pcic_probe(void) { return 0; } in pcic_probe()
47 #define PCI_SPACE_SIZE 0x1000000 /* 16 MB */
50 #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */
51 #define PCI_SIZE_0 0x44 /* 32 bits */
52 #define PCI_SIZE_1 0x48 /* 32 bits */
53 #define PCI_SIZE_2 0x4c /* 32 bits */
54 #define PCI_SIZE_3 0x50 /* 32 bits */
55 #define PCI_SIZE_4 0x54 /* 32 bits */
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv40.c34 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
35 { 32, 0, 0x04, 0, NV04_PFIFO_CACHE1_DMA_GET },
36 { 32, 0, 0x08, 0, NV10_PFIFO_CACHE1_REF_CNT },
37 { 32, 0, 0x0c, 0, NV04_PFIFO_CACHE1_DMA_INSTANCE },
38 { 32, 0, 0x10, 0, NV04_PFIFO_CACHE1_DMA_DCOUNT },
39 { 32, 0, 0x14, 0, NV04_PFIFO_CACHE1_DMA_STATE },
40 { 28, 0, 0x18, 0, NV04_PFIFO_CACHE1_DMA_FETCH },
41 { 2, 28, 0x18, 28, 0x002058 },
42 { 32, 0, 0x1c, 0, NV04_PFIFO_CACHE1_ENGINE },
43 { 32, 0, 0x20, 0, NV04_PFIFO_CACHE1_PULL1 },
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-u300.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2007-2009 ST-Ericsson AB
35 /* Reset OS Timer 32bit (-/W) */
36 #define U300_TIMER_APP_ROST (0x0000)
37 #define U300_TIMER_APP_ROST_TIMER_RESET (0x00000000)
38 /* Enable OS Timer 32bit (-/W) */
39 #define U300_TIMER_APP_EOST (0x0004)
40 #define U300_TIMER_APP_EOST_TIMER_ENABLE (0x00000000)
41 /* Disable OS Timer 32bit (-/W) */
42 #define U300_TIMER_APP_DOST (0x0008)
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/debug/src/
Dia_css_debug.c1 // SPDX-License-Identifier: GPL-2.0
75 #include "anr/anr_1.0/ia_css_anr.host.h"
76 #include "cnr/cnr_1.0/ia_css_cnr.host.h"
77 #include "csc/csc_1.0/ia_css_csc.host.h"
78 #include "de/de_1.0/ia_css_de.host.h"
79 #include "dp/dp_1.0/ia_css_dp.host.h"
80 #include "bnr/bnr_1.0/ia_css_bnr.host.h"
81 #include "fpn/fpn_1.0/ia_css_fpn.host.h"
82 #include "gc/gc_1.0/ia_css_gc.host.h"
83 #include "ob/ob_1.0/ia_css_ob.host.h"
[all …]
/kernel/linux/linux-5.10/drivers/net/fddi/skfp/h/
Dskfbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * FDDI-Fx (x := {I(SA), P(CI)})
19 /*--------------------------------------------------------------------------*/
34 #define I2C_ADDR_VPD 0xA0 /* I2C address for the VPD EEPROM */
38 * Bank 0
40 #define B0_RAP 0x0000 /* 8 bit register address port */
41 /* 0x0001 - 0x0003: reserved */
42 #define B0_CTRL 0x0004 /* 8 bit control register */
43 #define B0_DAS 0x0005 /* 8 Bit control register (DAS) */
44 #define B0_LED 0x0006 /* 8 Bit LED register */
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/
Dia_css_bnr2_2.host.c1 // SPDX-License-Identifier: GPL-2.0
28 0,
29 0,
30 0,
34 0,
35 0,
36 0,
37 0,
42 0,
43 0,
[all …]
/kernel/liteos_a/arch/arm/gic/
Dgic_v3.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
41 STATIC UINT32 g_curIrqNum = 0;
45 return ((MPIDR_AFF_LEVEL(mpidr, 3) << 32) | /* 3: Serial number, 32: Register bit offset */ in MpidrToAffinity()
48 (MPIDR_AFF_LEVEL(mpidr, 0))); in MpidrToAffinity()
72 UINT16 tList = 0; in GicTargetList()
76 tList |= 1U << (mpidr & 0xf); in GicTargetList()
85 if (cluster != (mpidr & ~0xffUL)) { in GicTargetList()
86 cpu--; in GicTargetList()
99 UINT32 cpu = 0; in GicSgi()
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Dtimex.h11 *** source file (e.g. under external/kernel-headers/original/) then
44 int : 32;
45 int : 32;
46 int : 32;
47 int : 32;
48 int : 32;
49 int : 32;
50 int : 32;
51 int : 32;
52 int : 32;
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/
Dmips-gic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-gic.h
20 #define MIPS_GIC_SHARED_OFS 0x00000
21 #define MIPS_GIC_SHARED_SZ 0x08000
22 #define MIPS_GIC_LOCAL_OFS 0x08000
23 #define MIPS_GIC_LOCAL_SZ 0x04000
24 #define MIPS_GIC_REDIR_OFS 0x0c000
25 #define MIPS_GIC_REDIR_SZ 0x04000
26 #define MIPS_GIC_USER_OFS 0x10000
27 #define MIPS_GIC_USER_SZ 0x10000
[all …]
/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
Dcore_feature_dsp.h4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
28 * * 0: Not present
41 * \brief Functions that generate RISC-V DSP SIMD instructions.
44 …* The following functions generate specified RISC-V SIMD instructions that cannot be directly acce…
47 * - r.H == rH1: r[31:16], r.L == r.H0: r[15:0]
48 * - r.B3: r[31:24], r.B2: r[23:16], r.B1: r[15:8], r.B0: r[7:0]
49 * - r.B[x]: r[(x*8+7):(x*8+0)]
50 * - r.H[x]: r[(x*16+7):(x*16+0)]
51 * - r.W[x]: r[(x*32+31):(x*32+0)]
[all …]

12345678910>>...45