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/kernel/linux/linux-5.10/drivers/media/platform/
Dvia-camera.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define VCR_IC_ACTBUF 0x0018 /* Active video buffer */
13 #define VCR_IC_INTEN 0x0100 /* End of active video int. enable */
14 #define VCR_IC_VBIINT 0x0200 /* End of VBI int enable */
15 #define VCR_IC_VBIBUF 0x0400 /* Current VBI buffer */
18 #define VCR_TSC_ENABLE 0x000001 /* Transport stream input enable */
20 #define VCR_TSC_METHOD 0x00000c /* DMA method (non-functional) */
22 #define VCR_TSC_CBMODE 0x080000 /* Change buffer by byte count */
28 #define VCR_CI_ENABLE 0x00000001 /* Capture enable */
31 #define VCR_CI_VIPEN 0x00000008 /* VIP enable */
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/kernel/linux/linux-5.10/include/linux/usb/
Dr8a66597.h1 // SPDX-License-Identifier: GPL-2.0
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
138 #define XTAL 0xC000 /* b15-14: Crystal selection */
142 #define XCKE 0x2000 /* b13: External clock enable */
144 #define SCKE 0x0400 /* b10: USB clock enable */
147 #define HSE 0x0080 /* b7: Hi-speed enable */
149 #define DRPD 0x0020 /* b5: D+/- pull down control */
151 #define USBE 0x0001 /* b0: USB module operation enable */
154 #define OVCBIT 0x8000 /* b15-14: Over-current bit */
155 #define OVCMON 0xC000 /* b15-14: Over-current monitor */
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/kernel/linux/linux-5.10/drivers/media/platform/sti/delta/
Ddelta-mjpeg-fw.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * @display_luma_p: address of the luma buffer
17 * @display_chroma_p: address of the chroma buffer
31 * @display_luma_p: address of the luma buffer
32 * @display_chroma_p: address of the chroma buffer
33 * @display_decimated_luma_p: address of the decimated luma buffer
34 * @display_decimated_chroma_p: address of the decimated chroma buffer
49 /* enable decimated (for display) reconstruction */
51 /* enable main (for display) reconstruction */
53 /* enable both main & decimated (for display) reconstruction */
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/kernel/linux/linux-5.10/drivers/media/rc/
Dene_ir.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #define ENE_STATUS 0 /* hardware status - unused */
18 #define ENE_FW_SAMPLE_BUFFER 0xF8F0 /* sample buffer */
24 #define ENE_FW1_ENABLE 0x01 /* enable fw processing */
26 #define ENE_FW1_HAS_EXTRA_BUF 0x04 /* fw uses extra buffer*/
27 #define ENE_FW1_EXTRA_BUF_HND 0x08 /* extra buffer handshake bit*/
30 #define ENE_FW1_WPATTERN 0x20 /* enable wake pattern */
31 #define ENE_FW1_WAKE 0x40 /* enable wake from S3 */
32 #define ENE_FW1_IRQ 0x80 /* enable interrupt */
36 #define ENE_FW2_BUF_WPTR 0x01 /* which half of the buffer to read */
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/kernel/linux/linux-5.10/drivers/usb/renesas_usbhs/
Dcommon.h1 /* SPDX-License-Identifier: GPL-1.0+ */
100 #define D2FIFOSEL 0x00F0 /* for R-Car Gen2 */
101 #define D2FIFOCTR 0x00F2 /* for R-Car Gen2 */
102 #define D3FIFOSEL 0x00F4 /* for R-Car Gen2 */
103 #define D3FIFOCTR 0x00F6 /* for R-Car Gen2 */
107 #define SCKE (1 << 10) /* USB Module Clock Enable */
108 #define CNEN (1 << 8) /* Single-ended receiver operation Enable */
109 #define HSE (1 << 7) /* High-Speed Operation Enable */
111 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
113 #define USBE (1 << 0) /* USB Module Operation Enable */
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_mitigations.c1 // SPDX-License-Identifier: MIT
40 return -ENOMEM; in mitigations_set()
43 bool enable = true; in mitigations_set() local
61 enable = !enable; in mitigations_set()
66 enable = !enable; in mitigations_set()
75 if (enable) in mitigations_set()
85 err = -EINVAL; in mitigations_set()
97 static int mitigations_get(char *buffer, const struct kernel_param *kp) in mitigations_get() argument
101 bool enable; in mitigations_get() local
104 return scnprintf(buffer, PAGE_SIZE, "%s\n", "off"); in mitigations_get()
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/kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl/
Dhw_atl_llh.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
119 /* set interrupt mapping enable rx */
123 /* set interrupt mapping enable tx */
157 void hw_atl_itr_rsc_en_set(struct aq_hw_s *aq_hw, u32 enable);
167 /* set rx dca enable */
173 /* set rx descriptor data buffer size */
178 /* set rx descriptor dca enable */
182 /* set rx descriptor enable */
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/kernel/linux/linux-5.10/drivers/net/wan/
Dhd64570.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* SCA HD64570 register definitions - all addresses for mode 0 (8086 MPU)
24 #define DMER 0x09 /* DMA Master Enable */
32 #define IER0 0x14 /* Interrupt Enable 0 */
33 #define IER1 0x15 /* Interrupt Enable 1 */
34 #define IER2 0x16 /* Interrupt Enable 2 */
42 /* MSCI channel (port) 0 registers - offset 0x20
43 MSCI channel (port) 1 registers - offset 0x40 */
48 #define TRBL 0x00 /* TX/RX buffer L */
49 #define TRBH 0x01 /* TX/RX buffer H */
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/kernel/linux/linux-5.10/drivers/pci/
Dvc.c1 // SPDX-License-Identifier: GPL-2.0
19 * pci_vc_save_restore_dwords - Save or restore a series of dwords
22 * @buf: buffer to save to or restore from
40 * pci_vc_load_arb_table - load and wait for VC arbitration table
63 * pci_vc_load_port_arb_table - Load and wait for VC port arbitration table
66 * @res: VC resource number, ie. VCn (0-7)
91 * pci_vc_enable - Enable virtual channel
94 * @res: VC res number, ie. VCn (0-7)
96 * A VC is enabled by setting the enable bit in matching resource control
98 * end of the link. To keep this simple we enable from the downstream device.
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/kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/
Dixgbe_dcb_82598.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 #define IXGBE_DPMCS_TDPAC 0x00000001 /* 0 Round Robin, 1 DFP - Deficit Fixed Priority */
15 #define IXGBE_RUPPBMR_MQA 0x80000000 /* Enable UP to queue mapping */
18 #define IXGBE_RT2CR_LSP 0x80000000 /* LSP enable bit */
20 #define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet buffers enable */
21 #define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores (RSS) enable */
33 #define IXGBE_PDPMCS_TPPAC 0x00000020 /* 0 Round Robin, 1 for DFP - Deficit Fixed Priority */
35 #define IXGBE_PDPMCS_TRM 0x00000100 /* Transmit Recycle Mode enable */
37 #define IXGBE_DTXCTL_ENDBUBD 0x00000004 /* Enable DBU buffer division */
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/kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
Dhw_atl2_llh.h1 /* SPDX-License-Identifier: GPL-2.0-only */
25 /* set new RPF enable */
26 void hw_atl2_rpf_new_enable_set(struct aq_hw_s *aq_hw, u32 enable);
41 /* set tx random TC-queue mapping enable bit */
45 /* set tx buffer clock gate enable */
69 /* set enable action resolver section */
72 /* get data from firmware shared input buffer */
76 /* set data into firmware shared input buffer */
80 /* get data from firmware shared output buffer */
84 /* set host finished write shared buffer indication */
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/kernel/linux/linux-5.10/arch/mips/include/asm/dec/
Dioasic_addrs.h53 #define IO_REG_SCSI_DMA_BP 0x10 /* SCSI DMA Buffer Pointer */
67 #define IO_REG_ISDN_T_DMA_BP 0x90 /* ISDN Transmit DMA Buffer Pointer */
69 #define IO_REG_ISDN_R_DMA_BP 0xb0 /* ISDN Receive DMA Buffer Pointer */
72 #define IO_REG_DATA_0 0xc0 /* System Data Buffer 0 */
73 #define IO_REG_DATA_1 0xd0 /* System Data Buffer 1 */
74 #define IO_REG_DATA_2 0xe0 /* System Data Buffer 2 */
75 #define IO_REG_DATA_3 0xf0 /* System Data Buffer 3 */
100 #define IO_REG_SCSI_SCR 0x1b0 /* SCSI Partial-Word DMA Control */
103 #define IO_REG_FCTR 0x1e0 /* Free-Running Counter */
115 #define IO_SSR_SCC0A_TX_DMA_EN (1<<31) /* SCC0A transmit DMA enable */
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7192.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
21 - adi,ad7190
22 - adi,ad7192
23 - adi,ad7193
24 - adi,ad7195
29 spi-cpol: true
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/kernel/linux/linux-5.10/sound/soc/intel/skylake/
Dskl-sst-cldma.h1 /* SPDX-License-Identifier: GPL-2.0-only */
20 #define SKL_CL_DMA_SD_INT_COMPLETE 0x04 /* Buffer completion interrupt */
60 /* Interrupt On Completion Enable */
66 /* FIFO Error Interrupt Enable */
72 /* Descriptor Error Interrupt Enable */
110 /* Buffer Completion Interrupt Status */
134 /* CL: Stream Descriptor x Buffer Descriptor List Pointer Lower Base Address */
142 /* Buffer Descriptor List Lower Base Address */
148 /* Buffer Descriptor List Upper Base Address */
155 * Code Loader - Software Position Based FIFO
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Dskl-sst-cldma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * skl-sst-cldma.c - Code Loader DMA handler
14 #include "../common/sst-dsp.h"
15 #include "../common/sst-dsp-priv.h"
29 static void skl_cldma_stream_run(struct sst_dsp *ctx, bool enable) in skl_cldma_stream_run() argument
36 CL_SD_CTL_RUN_MASK, CL_SD_CTL_RUN(enable)); in skl_cldma_stream_run()
44 if (enable && val) in skl_cldma_stream_run()
46 else if (!enable && !val) in skl_cldma_stream_run()
49 } while (--timeout); in skl_cldma_stream_run()
52 dev_err(ctx->dev, "Failed to set Run bit=%d enable=%d\n", val, enable); in skl_cldma_stream_run()
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/kernel/linux/linux-5.10/include/linux/iio/
Dbuffer_impl.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 * INDIO_BUFFER_FLAG_FIXED_WATERMARK - Watermark level of the buffer can not be
14 * configured. It has a fixed value which will be buffer specific.
19 * struct iio_buffer_access_funcs - access functions for buffers.
20 * @store_to: actually store stuff to the buffer
23 * the buffer.
27 * @set_length: set number of datums in buffer
28 * @enable: called if the buffer is attached to a device and the
31 * @disable: called if the buffer is attached to a device and the
32 * device stops sampling. Calles are balanced with @enable.
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/kernel/linux/linux-5.10/drivers/media/platform/omap3isp/
Dispstat.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - Statistics core
15 #include <linux/dma-mapping.h>
22 #define ISP_STAT_USES_DMAENGINE(stat) ((stat)->dma_ch != NULL)
36 * the next buffer to start to be written in the same point where the overflow
38 * go back to a valid state is having a valid buffer processing. Of course it
39 * requires at least a doubled buffer size to avoid an access to invalid memory
43 * configuration was created. It produces the minimum buffer size for each H3A
45 * will be enabled every time a SBL overflow occur. As the output buffer size
56 #define IS_H3A_AF(stat) ((stat) == &(stat)->isp->isp_af)
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/kernel/linux/linux-5.10/drivers/net/ethernet/xilinx/
Dxilinx_axienet.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
39 /* Enable recognition of flow control frames on Rx. Default: enabled (set) */
52 /* Enable Length/Type error checking for incoming frames. When this option is
60 /* Enable the transmitter. Default: enabled (set) */
63 /* Enable the receiver. Default: enabled (set) */
90 #define XAXIDMA_BD_BUFA_OFFSET 0x08 /* Buffer address */
91 #define XAXIDMA_BD_CTRL_LEN_OFFSET 0x18 /* Control/buffer length */
147 #define XAE_IFGP_OFFSET 0x00000008 /* Tx Inter-frame gap adjustment*/
150 #define XAE_IE_OFFSET 0x00000014 /* Interrupt enable */
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dtonga_ih.c38 * Starting with r6xx, interrupts are handled via a ring buffer.
45 * writes vectors to the ring buffer, it increments the
54 * tonga_ih_enable_interrupts - Enable the interrupt ring buffer
58 * Enable the interrupt ring buffer (VI).
67 adev->irq.ih.enabled = true; in tonga_ih_enable_interrupts()
71 * tonga_ih_disable_interrupts - Disable the interrupt ring buffer
75 * Disable the interrupt ring buffer (VI).
87 adev->irq.ih.enabled = false; in tonga_ih_disable_interrupts()
88 adev->irq.ih.rptr = 0; in tonga_ih_disable_interrupts()
92 * tonga_ih_irq_init - init and enable the interrupt ring
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dr852.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2009 - Maxim Levitsky
30 #define R852_CTL_CARDENABLE 0x10 /* probably (#CE) - always set*/
31 #define R852_CTL_ECC_ENABLE 0x20 /* enable ecc engine */
42 #define R852_CARD_STA_BUSY 0x80 /* card is busy - (#R/B) */
44 /* card detection irq status & enable*/
46 #define R852_CARD_IRQ_ENABLE 0x07 /* IRQ enable */
52 #define R852_CARD_IRQ_GENABLE 0x80 /* general enable */
57 /* hardware enable */
71 /* physical DMA address - 32 bit value*/
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mmhubbub.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
34 mcif_wb20->mcif_wb_regs->reg
37 mcif_wb20->base.ctx
41 mcif_wb20->mcif_wb_shift->field_name, mcif_wb20->mcif_wb_mask->field_name
48 * unsigned long long luma_address[4]; //4 frame buffer
60 …* unsigned int sw_int_en; // Software interrupt enable, frame end and overf…
61 * unsigned int sw_slice_int_en; // slice end interrupt enable
62 * unsigned int sw_overrun_int_en; // overrun error interrupt enable
63 * unsigned int vce_int_en; // VCE interrupt enable, frame end and overflow
64 …* unsigned int vce_slice_int_en; // VCE slice end interrupt enable, frame end and …
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/kernel/linux/linux-5.10/drivers/net/wireless/marvell/mwifiex/
D11h.c4 * Copyright 2011-2020 NXP
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
26 priv->state_11h.is_11h_enabled = true; in mwifiex_init_11h_params()
27 priv->state_11h.is_11h_active = false; in mwifiex_init_11h_params()
32 return priv->state_11h.is_11h_active; in mwifiex_is_11h_active()
34 /* This function appends 11h info to a buffer while joining an
38 mwifiex_11h_process_infra_join(struct mwifiex_private *priv, u8 **buffer, in mwifiex_11h_process_infra_join() argument
48 if (!buffer || !(*buffer)) in mwifiex_11h_process_infra_join()
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/kernel/linux/linux-5.10/sound/firewire/dice/
Ddice-proc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * dice_proc.c - a part of driver for Dice based devices
11 static int dice_proc_read_mem(struct snd_dice *dice, void *buffer, in dice_proc_read_mem() argument
17 err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST, in dice_proc_read_mem()
19 buffer, 4 * quadlets, 0); in dice_proc_read_mem()
24 be32_to_cpus(&((u32 *)buffer)[i]); in dice_proc_read_mem()
45 for (i = 0; i < size - 2; ++i) { in dice_proc_fixup_string()
53 s[size - 1] = '\0'; in dice_proc_fixup_string()
57 struct snd_info_buffer *buffer) in dice_proc_read() argument
70 struct snd_dice *dice = entry->private_data; in dice_proc_read()
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/kernel/linux/linux-5.10/kernel/trace/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 See Documentation/trace/ftrace-design.rst
21 See Documentation/trace/ftrace-design.rst
26 See Documentation/trace/ftrace-design.rst
37 See Documentation/trace/ftrace-design.rst
42 See Documentation/trace/ftrace-design.rst
47 Arch supports the gcc options -pg with -mfentry
52 Arch supports the gcc options -pg with -mrecord-mcount and -nop-mcount
130 Enable the kernel tracing infrastructure.
135 bool "Boot-time Tracing support"
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/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dr600_hdmi.c87 dev_err(rdev->dev, "Unknown bits per sample 0x%x, using 16\n", in r600_audio_status()
118 struct drm_device *dev = rdev->ddev; in r600_audio_update_hdmi()
123 if (rdev->audio.pin[0].channels != audio_status.channels || in r600_audio_update_hdmi()
124 rdev->audio.pin[0].rate != audio_status.rate || in r600_audio_update_hdmi()
125 rdev->audio.pin[0].bits_per_sample != audio_status.bits_per_sample || in r600_audio_update_hdmi()
126 rdev->audio.pin[0].status_bits != audio_status.status_bits || in r600_audio_update_hdmi()
127 rdev->audio.pin[0].category_code != audio_status.category_code) { in r600_audio_update_hdmi()
128 rdev->audio.pin[0] = audio_status; in r600_audio_update_hdmi()
132 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { in r600_audio_update_hdmi()
140 /* enable the audio stream */
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