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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dsnps,dw-axi-dmac.txt4 - compatible: "snps,axi-dma-1.01a"
5 - reg: Address range of the DMAC registers. This should include
6 all of the per-channel registers.
7 - interrupt: Should contain the DMAC interrupt number.
8 - dma-channels: Number of channels supported by hardware.
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
12 - snps,priority: Priority of channel. Array size is equal to the number of
13 dma-channels. Priority value must be programmed within [0:dma-channels-1]
[all …]
Dsnps,dma-spear1340.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: "dma-controller.yaml#"
18 const: snps,dma-spear1340
20 "#dma-cells":
40 clock-names:
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/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dcx24116.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver
5 Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com>
6 Copyright (C) 2006-2007 Georg Acher
7 Copyright (C) 2007-2008 Darron Broad
45 #define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw"
74 /* Select DVB-S demodulator, else DVB-S2 */
115 /* DiSEqC burst */
119 /* DiSEqC tone burst */
128 MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\
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/kernel/linux/linux-5.10/net/netfilter/
Dxt_hashlimit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * xt_hashlimit - Netfilter module to limit the number of packets per time
6 * (C) 2003-2004 by Harald Welte <laforge@netfilter.org>
7 * (C) 2006-2012 Patrick McHardy <kaber@trash.net>
8 * Copyright © CC Computer Consultants GmbH, 2007 - 2008
50 MODULE_DESCRIPTION("Xtables: per hash-bucket rate-limit match");
90 /* static / read-only parts in the beginning */
109 int64_t burst; member
144 to->mode = cfg->mode; in cfg_copy()
145 to->avg = cfg->avg; in cfg_copy()
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/kernel/linux/linux-5.10/net/core/
Dpktgen.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 * MAC address typo fixed. 010417 --ro
24 * Integrated. 020301 --DaveM
25 * Added multiskb option 020301 --DaveM
26 * Scaling of results. 020417--sigurdur@linpro.no
27 * Significant re-work of the module:
31 * * Allow configuration of ranges, like min/max IP address, MACs,
32 * and UDP-ports, for both source and destination, and can
35 * * Place 12-byte packet in UDP payload with magic number,
37 * * Add receiver code that detects dropped pkts, re-ordered pkts, and
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/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/
Dbcm63xx_enet.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 /* maximum burst len for dma (4 bytes unit) */
24 * must be low enough so that a DMA transfer of above burst length can
29 * hardware maximum rx/tx packet size including FCS, max mtu is
30 * actually 2047, but if we set max rx size register to 2047 we won't
253 /* maximum dma burst size */
/kernel/linux/linux-5.10/drivers/dma/
Dsun4i-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "virt-dma.h"
25 #define SUN4I_DMA_CFG_DST_BURST_LENGTH(len) ((len) << 23) argument
29 #define SUN4I_DMA_CFG_SRC_BURST_LENGTH(len) ((len) << 7) argument
74 #define SUN4I_DDMA_PARA_DST_DATA_BLK_SIZE(n) (((n) - 1) << 24)
75 #define SUN4I_DDMA_PARA_DST_WAIT_CYCLES(n) (((n) - 1) << 16)
76 #define SUN4I_DDMA_PARA_SRC_DATA_BLK_SIZE(n) (((n) - 1) << 8)
77 #define SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(n) (((n) - 1) << 0)
112 #define SUN4I_NDMA_NR_MAX_VCHANS (29 * 2 - 1)
149 size_t len; member
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Dpxa_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
22 #include <linux/dma/pxa-dma.h>
25 #include "virt-dma.h"
36 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
38 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
39 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
64 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
65 #define PXA_DCMD_BURST8 (1 << 16) /* 8 byte burst */
66 #define PXA_DCMD_BURST16 (2 << 16) /* 16 byte burst */
[all …]
Dpl330.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
246 * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
247 * should be enough for P<->M and M<->M respectively.
303 * and burst size/length are assumed same.
351 BURST, enumerator
382 /* Index of the last submitted request or -1 if the DMA is stopped */
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Dnbpfaxi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013-2014 Renesas Electronics Europe Ltd.
10 #include <linux/dma-mapping.h>
23 #include <dt-bindings/dma/nbpfaxi.h>
105 * 1. high-level descriptor, containing a struct dma_async_tx_descriptor object
109 * allocated from coherent memory - one per SG segment
116 * Therefore for both cases (a) and (b) at run-time objects (2) and (3) shall be
143 * struct nbpf_desc - DMA transfer descriptor
162 #define NBPF_DESCS_PER_PAGE ((PAGE_SIZE - sizeof(struct list_head)) / \
176 * struct nbpf_channel - one DMAC channel
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Damba-pl08x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2010 ST-Ericsson SA
27 * - CH_CONFIG register at different offset,
28 * - separate CH_CONTROL2 register for transfer size,
29 * - bigger maximum transfer size,
30 * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word,
31 * - no support for peripheral flow control.
36 * On burst request from peripheral
37 * Destination burst from DMAC to peripheral
38 * Clear burst request
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/kernel/linux/linux-5.10/arch/mips/include/asm/octeon/
Dcvmx-pko.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
44 * - PKO indexes are no longer stored in the FAU. A large
48 * - The PKO <b>use_locking</b> parameter can now have a global
52 * - PKO 3 word commands are now supported. Use
60 #include <asm/octeon/cvmx-fpa.h>
61 #include <asm/octeon/cvmx-pow.h>
62 #include <asm/octeon/cvmx-cmd-queue.h>
63 #include <asm/octeon/cvmx-pko-defs.h>
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/kernel/linux/linux-5.10/block/
Dbfq-iosched.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <linux/blk-cgroup.h>
13 #include "blk-cgroup-rwstat.h"
31 * Soft real-time applications are extremely more latency sensitive
32 * than interactive ones. Over-raise the weight of the former to
40 * struct bfq_service_tree - per ioprio_class service tree.
42 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
65 * struct bfq_sched_data - multi-class scheduler.
75 * queue requests are served according to B-WF2Q+.
80 * before the current in-service entity is expired, 2) the in-service
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/kernel/linux/linux-5.10/include/linux/
Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
96 * it is to be repeated and other per-transfer attributes.
103 * | Frame-1 | Frame-2 | ~ | Frame-'numf' |
[all …]
/kernel/linux/linux-5.10/drivers/crypto/qce/
Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
24 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
31 /* burst size alignment requirement */
94 void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
/kernel/linux/linux-5.10/drivers/dma/dw/
Dregs.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2005-2007 Atmel Corporation
6 * Copyright (C) 2010-2011 ST Microelectronics
14 #include <linux/io-64-nonatomic-hi-lo.h>
33 * Redefine this macro to handle differences between 32- and 64-bit
64 /* per-channel registers */
89 /* iDMA 32-bit support */
96 /* per-channel configuration registers */
101 /* top-level parameters */
108 /* iDMA 32-bit support */
[all …]
Dof.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2007-2008 Atmel Corporation
6 * Copyright (C) 2010-2011 ST Microelectronics
19 struct dw_dma *dw = ofdma->of_dma_data; in dw_dma_of_xlate()
21 .dma_dev = dw->dma.dev, in dw_dma_of_xlate()
25 if (dma_spec->args_count < 3 || dma_spec->args_count > 4) in dw_dma_of_xlate()
28 slave.src_id = dma_spec->args[0]; in dw_dma_of_xlate()
29 slave.dst_id = dma_spec->args[0]; in dw_dma_of_xlate()
30 slave.m_master = dma_spec->args[1]; in dw_dma_of_xlate()
31 slave.p_master = dma_spec->args[2]; in dw_dma_of_xlate()
[all …]
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Ddas1800.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Comedi driver for Keithley DAS-1700/DAS-1800 series boards
6 * COMEDI - Linux Control and Measurement Device Interface
14 * Devices: [Keithley Metrabyte] DAS-1701ST (das-1701st),
15 * DAS-1701ST-DA (das-1701st-da), DAS-1701/AO (das-1701ao),
16 * DAS-1702ST (das-1702st), DAS-1702ST-DA (das-1702st-da),
17 * DAS-1702HR (das-1702hr), DAS-1702HR-DA (das-1702hr-da),
18 * DAS-1702/AO (das-1702ao), DAS-1801ST (das-1801st),
19 * DAS-1801ST-DA (das-1801st-da), DAS-1801HC (das-1801hc),
20 * DAS-1801AO (das-1801ao), DAS-1802ST (das-1802st),
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_gmbus.c3 * Copyright © 2006-2008,2010 Intel Corporation
27 * Chris Wilson <chris@chris-wilson.co.uk>
31 #include <linux/i2c-algo-bit.h>
129 return pin < size && get_gmbus_pin(dev_priv, pin)->name; in intel_gmbus_is_valid_pin()
191 struct drm_i915_private *i915 = bus->dev_priv; in get_reserved()
192 struct intel_uncore *uncore = &i915->uncore; in get_reserved()
197 reserved = intel_uncore_read_notrace(uncore, bus->gpio_reg) & in get_reserved()
207 struct intel_uncore *uncore = &bus->dev_priv->uncore; in get_clock()
211 bus->gpio_reg, in get_clock()
213 intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved); in get_clock()
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dda850-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "ti,da850-evm", "ti,da850";
13 model = "DA850/AM1808/OMAP-L138 EVM";
16 stdout-path = &serial2;
27 backlight: backlight-pwm {
28 pinctrl-names = "default";
29 pinctrl-0 = <&ecap2_pins>;
[all …]
Ds5pv210-goni.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
38 pmic_ap_clk: clock-0 {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <32768>;
[all …]
Dexynos4210-trats.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
30 stdout-path = "serial2:115200n8";
33 vemmc_reg: regulator-0 {
34 compatible = "regulator-fixed";
35 regulator-name = "VMEM_VDD_2.8V";
36 regulator-min-microvolt = <2800000>;
37 regulator-max-microvolt = <2800000>;
39 enable-active-high;
[all …]
/kernel/linux/linux-5.10/drivers/dma/ti/
Dedma.c17 #include <linux/dma-mapping.h>
37 #include "../virt-dma.h"
79 #define EDMA_DMAQNUM 0x0240 /* 8 registers (4 on OMAP-L1xx) */
109 #define GET_NUM_DMACH(x) (x & 0x7) /* bits 0-2 */
110 #define GET_NUM_QDMACH(x) ((x & 0x70) >> 4) /* bits 4-6 */
111 #define GET_NUM_PAENTRY(x) ((x & 0x7000) >> 12) /* bits 12-14 */
112 #define GET_NUM_EVQUE(x) ((x & 0x70000) >> 16) /* bits 16-18 */
113 #define GET_NUM_REGN(x) ((x & 0x300000) >> 20) /* bits 20-21 */
120 * Max of 20 segments per channel to conserve PaRAM slots
123 * fail. Today davinci-pcm is the only user of this driver and
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/kernel/linux/linux-5.10/drivers/dma/xilinx/
Dzynqmp_dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 #include <linux/io-64-nonatomic-lo-hi.h>
120 /* Max number of descriptors per channel */
123 /* Max transfer size per descriptor */
126 /* Max burst lengths */
143 #define ZYNQMP_DMA_DESC_SIZE(chan) (chan->desc_size)
151 * struct zynqmp_dma_desc_ll - Hw linked list descriptor
167 * struct zynqmp_dma_desc_sw - Per Transaction structure
170 * @len: Transfer length for simple mode dma
182 u32 len; member
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/kernel/linux/linux-5.10/drivers/spi/
Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/dma-mapping.h>
27 #include <linux/platform_data/dma-imx.h>
123 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
128 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
133 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
138 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
144 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
146 if (spi_imx->rx_buf) { \
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