1 /* 2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 */ 18 19 #ifndef __BARRIERS_H__ 20 #define __BARRIERS_H__ 21 22 #ifndef __ASSEMBLY__ 23 24 #ifndef CONFIG_ARM64 25 /* 26 * CP15 Barrier instructions 27 * Please note that we have separate barrier instructions in ARMv7 28 * However, we use the CP15 based instructtions because we use 29 * -march=armv5 in U-Boot 30 */ 31 #define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0)) 32 #define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)) 33 #define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)) 34 35 #endif /* !CONFIG_ARM64 */ 36 37 #if __LINUX_ARM_ARCH__ >= 7 38 #define ISB asm volatile ("isb sy" : : : "memory") 39 #define DSB asm volatile ("dsb sy" : : : "memory") 40 #define DMB asm volatile ("dmb sy" : : : "memory") 41 #elif __LINUX_ARM_ARCH__ == 6 42 #define ISB CP15ISB 43 #define DSB CP15DSB 44 #define DMB CP15DMB 45 #else 46 #define ISB asm volatile ("" : : : "memory") 47 #define DSB CP15DSB 48 #define DMB asm volatile ("" : : : "memory") 49 #endif 50 51 #define isb() ISB 52 #define dsb() DSB 53 #define dmb() DMB 54 #endif /* __ASSEMBLY__ */ 55 #endif /* __BARRIERS_H__ */ 56