1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * arch/arm/include/asm/pgtable.h
4 *
5 * Copyright (C) 1995-2002 Russell King
6 */
7 #ifndef _ASMARM_PGTABLE_H
8 #define _ASMARM_PGTABLE_H
9
10 #include <linux/const.h>
11 #include <asm/proc-fns.h>
12
13 #ifndef CONFIG_MMU
14
15 #include <asm-generic/pgtable-nopud.h>
16 #include <asm/pgtable-nommu.h>
17
18 #else
19
20 #include <asm-generic/pgtable-nopud.h>
21 #include <asm/memory.h>
22 #include <asm/pgtable-hwdef.h>
23
24
25 #include <asm/tlbflush.h>
26
27 #ifdef CONFIG_ARM_LPAE
28 #include <asm/pgtable-3level.h>
29 #else
30 #include <asm/pgtable-2level.h>
31 #endif
32
33 /*
34 * Just any arbitrary offset to the start of the vmalloc VM area: the
35 * current 8MB value just means that there will be a 8MB "hole" after the
36 * physical memory until the kernel virtual memory starts. That means that
37 * any out-of-bounds memory accesses will hopefully be caught.
38 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
39 * area for the same reason. ;)
40 */
41 #define VMALLOC_OFFSET (8*1024*1024)
42 #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
43 #define VMALLOC_END 0xff800000UL
44 #define VMALLOC_DEFAULT_BASE (VMALLOC_END - (240 << 20) - VMALLOC_OFFSET)
45
46 #define LIBRARY_TEXT_START 0x0c000000
47
48 #ifndef __ASSEMBLY__
49 extern void __pte_error(const char *file, int line, pte_t);
50 extern void __pmd_error(const char *file, int line, pmd_t);
51 extern void __pgd_error(const char *file, int line, pgd_t);
52
53 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte)
54 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd)
55 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd)
56
57 /*
58 * This is the lowest virtual address we can permit any user space
59 * mapping to be mapped at. This is particularly important for
60 * non-high vector CPUs.
61 */
62 #define FIRST_USER_ADDRESS (PAGE_SIZE * 2)
63
64 /*
65 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
66 * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
67 * page shared between user and kernel).
68 */
69 #ifdef CONFIG_ARM_LPAE
70 #define USER_PGTABLES_CEILING TASK_SIZE
71 #endif
72
73 /*
74 * The pgprot_* and protection_map entries will be fixed up in runtime
75 * to include the cachable and bufferable bits based on memory policy,
76 * as well as any architecture dependent bits like global/ASID and SMP
77 * shared mapping bits.
78 */
79 #define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG
80
81 extern pgprot_t pgprot_user;
82 extern pgprot_t pgprot_kernel;
83
84 #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
85
86 #define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY | L_PTE_NONE)
87 #define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
88 #define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER)
89 #define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
90 #define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
91 #define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
92 #define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
93 #define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_XN)
94 #define PAGE_KERNEL_EXEC pgprot_kernel
95
96 #define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE)
97 #define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
98 #define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
99 #define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
100 #define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
101 #define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
102 #define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
103
104 #define __pgprot_modify(prot,mask,bits) \
105 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
106
107 #define pgprot_noncached(prot) \
108 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
109
110 #define pgprot_writecombine(prot) \
111 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
112
113 #define pgprot_stronglyordered(prot) \
114 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
115
116 #define pgprot_device(prot) \
117 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_DEV_SHARED | L_PTE_SHARED | L_PTE_DIRTY | L_PTE_XN)
118
119 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
120 #define pgprot_dmacoherent(prot) \
121 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
122 #define __HAVE_PHYS_MEM_ACCESS_PROT
123 struct file;
124 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
125 unsigned long size, pgprot_t vma_prot);
126 #else
127 #define pgprot_dmacoherent(prot) \
128 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
129 #endif
130
131 #endif /* __ASSEMBLY__ */
132
133 /*
134 * The table below defines the page protection levels that we insert into our
135 * Linux page table version. These get translated into the best that the
136 * architecture can perform. Note that on most ARM hardware:
137 * 1) We cannot do execute protection
138 * 2) If we could do execute protection, then read is implied
139 * 3) write implies read permissions
140 */
141 #define __P000 __PAGE_NONE
142 #define __P001 __PAGE_READONLY
143 #define __P010 __PAGE_COPY
144 #define __P011 __PAGE_COPY
145 #define __P100 __PAGE_READONLY_EXEC
146 #define __P101 __PAGE_READONLY_EXEC
147 #define __P110 __PAGE_COPY_EXEC
148 #define __P111 __PAGE_COPY_EXEC
149
150 #define __S000 __PAGE_NONE
151 #define __S001 __PAGE_READONLY
152 #define __S010 __PAGE_SHARED
153 #define __S011 __PAGE_SHARED
154 #define __S100 __PAGE_READONLY_EXEC
155 #define __S101 __PAGE_READONLY_EXEC
156 #define __S110 __PAGE_SHARED_EXEC
157 #define __S111 __PAGE_SHARED_EXEC
158
159 #ifndef __ASSEMBLY__
160 /*
161 * ZERO_PAGE is a global shared page that is always zero: used
162 * for zero-mapped memory areas etc..
163 */
164 extern struct page *empty_zero_page;
165 #define ZERO_PAGE(vaddr) (empty_zero_page)
166
167
168 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
169
170 #define pmd_none(pmd) (!pmd_val(pmd))
171
pmd_page_vaddr(pmd_t pmd)172 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
173 {
174 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
175 }
176
177 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
178
179 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
180 #define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
181
182 #define pte_page(pte) pfn_to_page(pte_pfn(pte))
183 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
184
185 #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
186
187 #define pte_isset(pte, val) ((u32)(val) == (val) ? pte_val(pte) & (val) \
188 : !!(pte_val(pte) & (val)))
189 #define pte_isclear(pte, val) (!(pte_val(pte) & (val)))
190
191 #define pte_none(pte) (!pte_val(pte))
192 #define pte_present(pte) (pte_isset((pte), L_PTE_PRESENT))
193 #define pte_valid(pte) (pte_isset((pte), L_PTE_VALID))
194 #define pte_accessible(mm, pte) (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
195 #define pte_write(pte) (pte_isclear((pte), L_PTE_RDONLY))
196 #define pte_dirty(pte) (pte_isset((pte), L_PTE_DIRTY))
197 #define pte_young(pte) (pte_isset((pte), L_PTE_YOUNG))
198 #define pte_exec(pte) (pte_isclear((pte), L_PTE_XN))
199
200 #define pte_valid_user(pte) \
201 (pte_valid(pte) && pte_isset((pte), L_PTE_USER) && pte_young(pte))
202
pte_access_permitted(pte_t pte,bool write)203 static inline bool pte_access_permitted(pte_t pte, bool write)
204 {
205 pteval_t mask = L_PTE_PRESENT | L_PTE_USER;
206 pteval_t needed = mask;
207
208 if (write)
209 mask |= L_PTE_RDONLY;
210
211 return (pte_val(pte) & mask) == needed;
212 }
213 #define pte_access_permitted pte_access_permitted
214
215 #if __LINUX_ARM_ARCH__ < 6
__sync_icache_dcache(pte_t pteval)216 static inline void __sync_icache_dcache(pte_t pteval)
217 {
218 }
219 #else
220 extern void __sync_icache_dcache(pte_t pteval);
221 #endif
222
223 void set_pte_at(struct mm_struct *mm, unsigned long addr,
224 pte_t *ptep, pte_t pteval);
225
clear_pte_bit(pte_t pte,pgprot_t prot)226 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
227 {
228 pte_val(pte) &= ~pgprot_val(prot);
229 return pte;
230 }
231
set_pte_bit(pte_t pte,pgprot_t prot)232 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
233 {
234 pte_val(pte) |= pgprot_val(prot);
235 return pte;
236 }
237
pte_wrprotect(pte_t pte)238 static inline pte_t pte_wrprotect(pte_t pte)
239 {
240 return set_pte_bit(pte, __pgprot(L_PTE_RDONLY));
241 }
242
pte_mkwrite(pte_t pte)243 static inline pte_t pte_mkwrite(pte_t pte)
244 {
245 return clear_pte_bit(pte, __pgprot(L_PTE_RDONLY));
246 }
247
pte_mkclean(pte_t pte)248 static inline pte_t pte_mkclean(pte_t pte)
249 {
250 return clear_pte_bit(pte, __pgprot(L_PTE_DIRTY));
251 }
252
pte_mkdirty(pte_t pte)253 static inline pte_t pte_mkdirty(pte_t pte)
254 {
255 return set_pte_bit(pte, __pgprot(L_PTE_DIRTY));
256 }
257
pte_mkold(pte_t pte)258 static inline pte_t pte_mkold(pte_t pte)
259 {
260 return clear_pte_bit(pte, __pgprot(L_PTE_YOUNG));
261 }
262
pte_mkyoung(pte_t pte)263 static inline pte_t pte_mkyoung(pte_t pte)
264 {
265 return set_pte_bit(pte, __pgprot(L_PTE_YOUNG));
266 }
267
pte_mkexec(pte_t pte)268 static inline pte_t pte_mkexec(pte_t pte)
269 {
270 return clear_pte_bit(pte, __pgprot(L_PTE_XN));
271 }
272
pte_mknexec(pte_t pte)273 static inline pte_t pte_mknexec(pte_t pte)
274 {
275 return set_pte_bit(pte, __pgprot(L_PTE_XN));
276 }
277
pte_modify(pte_t pte,pgprot_t newprot)278 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
279 {
280 const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER |
281 L_PTE_NONE | L_PTE_VALID;
282 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
283 return pte;
284 }
285
286 /*
287 * Encode and decode a swap entry. Swap entries are stored in the Linux
288 * page tables as follows:
289 *
290 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
291 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
292 * <--------------- offset ------------------------> < type -> 0 0
293 *
294 * This gives us up to 31 swap files and 128GB per swap file. Note that
295 * the offset field is always non-zero.
296 */
297 #define __SWP_TYPE_SHIFT 2
298 #define __SWP_TYPE_BITS 5
299 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
300 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
301
302 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
303 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
304 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
305
306 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
307 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
308
309 /*
310 * It is an error for the kernel to have more swap files than we can
311 * encode in the PTEs. This ensures that we know when MAX_SWAPFILES
312 * is increased beyond what we presently support.
313 */
314 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
315
316 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
317 /* FIXME: this is not correct */
318 #define kern_addr_valid(addr) (1)
319
320 /*
321 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
322 */
323 #define HAVE_ARCH_UNMAPPED_AREA
324 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
325
326 #endif /* !__ASSEMBLY__ */
327
328 #endif /* CONFIG_MMU */
329
330 #endif /* _ASMARM_PGTABLE_H */
331