1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright 2020 IBM Corp.
3 // Copyright (c) 2019-2020 Intel Corporation
4
5 #include <linux/atomic.h>
6 #include <linux/bitfield.h>
7 #include <linux/clk.h>
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/interrupt.h>
12 #include <linux/jiffies.h>
13 #include <linux/module.h>
14 #include <linux/mutex.h>
15 #include <linux/of.h>
16 #include <linux/of_irq.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/platform_device.h>
19 #include <linux/sched.h>
20 #include <linux/spinlock.h>
21 #include <linux/string.h>
22 #include <linux/v4l2-controls.h>
23 #include <linux/videodev2.h>
24 #include <linux/wait.h>
25 #include <linux/workqueue.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-dev.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-dv-timings.h>
30 #include <media/v4l2-event.h>
31 #include <media/v4l2-ioctl.h>
32 #include <media/videobuf2-dma-contig.h>
33
34 #define DEVICE_NAME "aspeed-video"
35
36 #define ASPEED_VIDEO_JPEG_NUM_QUALITIES 12
37 #define ASPEED_VIDEO_JPEG_HEADER_SIZE 10
38 #define ASPEED_VIDEO_JPEG_QUANT_SIZE 116
39 #define ASPEED_VIDEO_JPEG_DCT_SIZE 34
40
41 #define MAX_FRAME_RATE 60
42 #define MAX_HEIGHT 1200
43 #define MAX_WIDTH 1920
44 #define MIN_HEIGHT 480
45 #define MIN_WIDTH 640
46
47 #define NUM_POLARITY_CHECKS 10
48 #define INVALID_RESOLUTION_RETRIES 2
49 #define INVALID_RESOLUTION_DELAY msecs_to_jiffies(250)
50 #define RESOLUTION_CHANGE_DELAY msecs_to_jiffies(500)
51 #define MODE_DETECT_TIMEOUT msecs_to_jiffies(500)
52 #define STOP_TIMEOUT msecs_to_jiffies(1000)
53 #define DIRECT_FETCH_THRESHOLD 0x0c0000 /* 1024 * 768 */
54
55 #define VE_MAX_SRC_BUFFER_SIZE 0x8ca000 /* 1920 * 1200, 32bpp */
56 #define VE_JPEG_HEADER_SIZE 0x006000 /* 512 * 12 * 4 */
57
58 #define VE_PROTECTION_KEY 0x000
59 #define VE_PROTECTION_KEY_UNLOCK 0x1a038aa8
60
61 #define VE_SEQ_CTRL 0x004
62 #define VE_SEQ_CTRL_TRIG_MODE_DET BIT(0)
63 #define VE_SEQ_CTRL_TRIG_CAPTURE BIT(1)
64 #define VE_SEQ_CTRL_FORCE_IDLE BIT(2)
65 #define VE_SEQ_CTRL_MULT_FRAME BIT(3)
66 #define VE_SEQ_CTRL_TRIG_COMP BIT(4)
67 #define VE_SEQ_CTRL_AUTO_COMP BIT(5)
68 #define VE_SEQ_CTRL_EN_WATCHDOG BIT(7)
69 #define VE_SEQ_CTRL_YUV420 BIT(10)
70 #define VE_SEQ_CTRL_COMP_FMT GENMASK(11, 10)
71 #define VE_SEQ_CTRL_HALT BIT(12)
72 #define VE_SEQ_CTRL_EN_WATCHDOG_COMP BIT(14)
73 #define VE_SEQ_CTRL_TRIG_JPG BIT(15)
74 #define VE_SEQ_CTRL_CAP_BUSY BIT(16)
75 #define VE_SEQ_CTRL_COMP_BUSY BIT(18)
76
77 #define AST2500_VE_SEQ_CTRL_JPEG_MODE BIT(13)
78 #define AST2400_VE_SEQ_CTRL_JPEG_MODE BIT(8)
79
80 #define VE_CTRL 0x008
81 #define VE_CTRL_HSYNC_POL BIT(0)
82 #define VE_CTRL_VSYNC_POL BIT(1)
83 #define VE_CTRL_SOURCE BIT(2)
84 #define VE_CTRL_INT_DE BIT(4)
85 #define VE_CTRL_DIRECT_FETCH BIT(5)
86 #define VE_CTRL_YUV BIT(6)
87 #define VE_CTRL_RGB BIT(7)
88 #define VE_CTRL_CAPTURE_FMT GENMASK(7, 6)
89 #define VE_CTRL_AUTO_OR_CURSOR BIT(8)
90 #define VE_CTRL_CLK_INVERSE BIT(11)
91 #define VE_CTRL_CLK_DELAY GENMASK(11, 9)
92 #define VE_CTRL_INTERLACE BIT(14)
93 #define VE_CTRL_HSYNC_POL_CTRL BIT(15)
94 #define VE_CTRL_FRC GENMASK(23, 16)
95
96 #define VE_TGS_0 0x00c
97 #define VE_TGS_1 0x010
98 #define VE_TGS_FIRST GENMASK(28, 16)
99 #define VE_TGS_LAST GENMASK(12, 0)
100
101 #define VE_SCALING_FACTOR 0x014
102 #define VE_SCALING_FILTER0 0x018
103 #define VE_SCALING_FILTER1 0x01c
104 #define VE_SCALING_FILTER2 0x020
105 #define VE_SCALING_FILTER3 0x024
106
107 #define VE_CAP_WINDOW 0x030
108 #define VE_COMP_WINDOW 0x034
109 #define VE_COMP_PROC_OFFSET 0x038
110 #define VE_COMP_OFFSET 0x03c
111 #define VE_JPEG_ADDR 0x040
112 #define VE_SRC0_ADDR 0x044
113 #define VE_SRC_SCANLINE_OFFSET 0x048
114 #define VE_SRC1_ADDR 0x04c
115 #define VE_COMP_ADDR 0x054
116
117 #define VE_STREAM_BUF_SIZE 0x058
118 #define VE_STREAM_BUF_SIZE_N_PACKETS GENMASK(5, 3)
119 #define VE_STREAM_BUF_SIZE_P_SIZE GENMASK(2, 0)
120
121 #define VE_COMP_CTRL 0x060
122 #define VE_COMP_CTRL_VQ_DCT_ONLY BIT(0)
123 #define VE_COMP_CTRL_VQ_4COLOR BIT(1)
124 #define VE_COMP_CTRL_QUANTIZE BIT(2)
125 #define VE_COMP_CTRL_EN_BQ BIT(4)
126 #define VE_COMP_CTRL_EN_CRYPTO BIT(5)
127 #define VE_COMP_CTRL_DCT_CHR GENMASK(10, 6)
128 #define VE_COMP_CTRL_DCT_LUM GENMASK(15, 11)
129 #define VE_COMP_CTRL_EN_HQ BIT(16)
130 #define VE_COMP_CTRL_RSVD BIT(19)
131 #define VE_COMP_CTRL_ENCODE GENMASK(21, 20)
132 #define VE_COMP_CTRL_HQ_DCT_CHR GENMASK(26, 22)
133 #define VE_COMP_CTRL_HQ_DCT_LUM GENMASK(31, 27)
134
135 #define AST2400_VE_COMP_SIZE_READ_BACK 0x078
136 #define AST2600_VE_COMP_SIZE_READ_BACK 0x084
137
138 #define VE_SRC_LR_EDGE_DET 0x090
139 #define VE_SRC_LR_EDGE_DET_LEFT GENMASK(11, 0)
140 #define VE_SRC_LR_EDGE_DET_NO_V BIT(12)
141 #define VE_SRC_LR_EDGE_DET_NO_H BIT(13)
142 #define VE_SRC_LR_EDGE_DET_NO_DISP BIT(14)
143 #define VE_SRC_LR_EDGE_DET_NO_CLK BIT(15)
144 #define VE_SRC_LR_EDGE_DET_RT_SHF 16
145 #define VE_SRC_LR_EDGE_DET_RT GENMASK(27, VE_SRC_LR_EDGE_DET_RT_SHF)
146 #define VE_SRC_LR_EDGE_DET_INTERLACE BIT(31)
147
148 #define VE_SRC_TB_EDGE_DET 0x094
149 #define VE_SRC_TB_EDGE_DET_TOP GENMASK(12, 0)
150 #define VE_SRC_TB_EDGE_DET_BOT_SHF 16
151 #define VE_SRC_TB_EDGE_DET_BOT GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF)
152
153 #define VE_MODE_DETECT_STATUS 0x098
154 #define VE_MODE_DETECT_H_PIXELS GENMASK(11, 0)
155 #define VE_MODE_DETECT_V_LINES_SHF 16
156 #define VE_MODE_DETECT_V_LINES GENMASK(27, VE_MODE_DETECT_V_LINES_SHF)
157 #define VE_MODE_DETECT_STATUS_VSYNC BIT(28)
158 #define VE_MODE_DETECT_STATUS_HSYNC BIT(29)
159
160 #define VE_SYNC_STATUS 0x09c
161 #define VE_SYNC_STATUS_HSYNC GENMASK(11, 0)
162 #define VE_SYNC_STATUS_VSYNC_SHF 16
163 #define VE_SYNC_STATUS_VSYNC GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF)
164
165 #define VE_INTERRUPT_CTRL 0x304
166 #define VE_INTERRUPT_STATUS 0x308
167 #define VE_INTERRUPT_MODE_DETECT_WD BIT(0)
168 #define VE_INTERRUPT_CAPTURE_COMPLETE BIT(1)
169 #define VE_INTERRUPT_COMP_READY BIT(2)
170 #define VE_INTERRUPT_COMP_COMPLETE BIT(3)
171 #define VE_INTERRUPT_MODE_DETECT BIT(4)
172 #define VE_INTERRUPT_FRAME_COMPLETE BIT(5)
173 #define VE_INTERRUPT_DECODE_ERR BIT(6)
174 #define VE_INTERRUPT_HALT_READY BIT(8)
175 #define VE_INTERRUPT_HANG_WD BIT(9)
176 #define VE_INTERRUPT_STREAM_DESC BIT(10)
177 #define VE_INTERRUPT_VSYNC_DESC BIT(11)
178
179 #define VE_MODE_DETECT 0x30c
180 #define VE_MEM_RESTRICT_START 0x310
181 #define VE_MEM_RESTRICT_END 0x314
182
183 enum {
184 VIDEO_MODE_DETECT_DONE,
185 VIDEO_RES_CHANGE,
186 VIDEO_RES_DETECT,
187 VIDEO_STREAMING,
188 VIDEO_FRAME_INPRG,
189 VIDEO_STOPPED,
190 VIDEO_CLOCKS_ON,
191 };
192
193 struct aspeed_video_addr {
194 unsigned int size;
195 dma_addr_t dma;
196 void *virt;
197 };
198
199 struct aspeed_video_buffer {
200 struct vb2_v4l2_buffer vb;
201 struct list_head link;
202 };
203
204 #define to_aspeed_video_buffer(x) \
205 container_of((x), struct aspeed_video_buffer, vb)
206
207 struct aspeed_video {
208 void __iomem *base;
209 struct clk *eclk;
210 struct clk *vclk;
211
212 struct device *dev;
213 struct v4l2_ctrl_handler ctrl_handler;
214 struct v4l2_device v4l2_dev;
215 struct v4l2_pix_format pix_fmt;
216 struct v4l2_bt_timings active_timings;
217 struct v4l2_bt_timings detected_timings;
218 u32 v4l2_input_status;
219 struct vb2_queue queue;
220 struct video_device vdev;
221 struct mutex video_lock; /* v4l2 and videobuf2 lock */
222
223 u32 jpeg_mode;
224 u32 comp_size_read;
225
226 wait_queue_head_t wait;
227 spinlock_t lock; /* buffer list lock */
228 struct delayed_work res_work;
229 struct list_head buffers;
230 unsigned long flags;
231 unsigned int sequence;
232
233 unsigned int max_compressed_size;
234 struct aspeed_video_addr srcs[2];
235 struct aspeed_video_addr jpeg;
236
237 bool yuv420;
238 unsigned int frame_rate;
239 unsigned int jpeg_quality;
240
241 unsigned int frame_bottom;
242 unsigned int frame_left;
243 unsigned int frame_right;
244 unsigned int frame_top;
245 };
246
247 #define to_aspeed_video(x) container_of((x), struct aspeed_video, v4l2_dev)
248
249 struct aspeed_video_config {
250 u32 jpeg_mode;
251 u32 comp_size_read;
252 };
253
254 static const struct aspeed_video_config ast2400_config = {
255 .jpeg_mode = AST2400_VE_SEQ_CTRL_JPEG_MODE,
256 .comp_size_read = AST2400_VE_COMP_SIZE_READ_BACK,
257 };
258
259 static const struct aspeed_video_config ast2500_config = {
260 .jpeg_mode = AST2500_VE_SEQ_CTRL_JPEG_MODE,
261 .comp_size_read = AST2400_VE_COMP_SIZE_READ_BACK,
262 };
263
264 static const struct aspeed_video_config ast2600_config = {
265 .jpeg_mode = AST2500_VE_SEQ_CTRL_JPEG_MODE,
266 .comp_size_read = AST2600_VE_COMP_SIZE_READ_BACK,
267 };
268
269 static const u32 aspeed_video_jpeg_header[ASPEED_VIDEO_JPEG_HEADER_SIZE] = {
270 0xe0ffd8ff, 0x464a1000, 0x01004649, 0x60000101, 0x00006000, 0x0f00feff,
271 0x00002d05, 0x00000000, 0x00000000, 0x00dbff00
272 };
273
274 static const u32 aspeed_video_jpeg_quant[ASPEED_VIDEO_JPEG_QUANT_SIZE] = {
275 0x081100c0, 0x00000000, 0x00110103, 0x03011102, 0xc4ff0111, 0x00001f00,
276 0x01010501, 0x01010101, 0x00000000, 0x00000000, 0x04030201, 0x08070605,
277 0xff0b0a09, 0x10b500c4, 0x03010200, 0x03040203, 0x04040505, 0x7d010000,
278 0x00030201, 0x12051104, 0x06413121, 0x07615113, 0x32147122, 0x08a19181,
279 0xc1b14223, 0xf0d15215, 0x72623324, 0x160a0982, 0x1a191817, 0x28272625,
280 0x35342a29, 0x39383736, 0x4544433a, 0x49484746, 0x5554534a, 0x59585756,
281 0x6564635a, 0x69686766, 0x7574736a, 0x79787776, 0x8584837a, 0x89888786,
282 0x9493928a, 0x98979695, 0xa3a29a99, 0xa7a6a5a4, 0xb2aaa9a8, 0xb6b5b4b3,
283 0xbab9b8b7, 0xc5c4c3c2, 0xc9c8c7c6, 0xd4d3d2ca, 0xd8d7d6d5, 0xe2e1dad9,
284 0xe6e5e4e3, 0xeae9e8e7, 0xf4f3f2f1, 0xf8f7f6f5, 0xc4fffaf9, 0x00011f00,
285 0x01010103, 0x01010101, 0x00000101, 0x00000000, 0x04030201, 0x08070605,
286 0xff0b0a09, 0x11b500c4, 0x02010200, 0x04030404, 0x04040507, 0x77020100,
287 0x03020100, 0x21050411, 0x41120631, 0x71610751, 0x81322213, 0x91421408,
288 0x09c1b1a1, 0xf0523323, 0xd1726215, 0x3424160a, 0x17f125e1, 0x261a1918,
289 0x2a292827, 0x38373635, 0x44433a39, 0x48474645, 0x54534a49, 0x58575655,
290 0x64635a59, 0x68676665, 0x74736a69, 0x78777675, 0x83827a79, 0x87868584,
291 0x928a8988, 0x96959493, 0x9a999897, 0xa5a4a3a2, 0xa9a8a7a6, 0xb4b3b2aa,
292 0xb8b7b6b5, 0xc3c2bab9, 0xc7c6c5c4, 0xd2cac9c8, 0xd6d5d4d3, 0xdad9d8d7,
293 0xe5e4e3e2, 0xe9e8e7e6, 0xf4f3f2ea, 0xf8f7f6f5, 0xdafffaf9, 0x01030c00,
294 0x03110200, 0x003f0011
295 };
296
297 static const u32 aspeed_video_jpeg_dct[ASPEED_VIDEO_JPEG_NUM_QUALITIES]
298 [ASPEED_VIDEO_JPEG_DCT_SIZE] = {
299 { 0x0d140043, 0x0c0f110f, 0x11101114, 0x17141516, 0x1e20321e,
300 0x3d1e1b1b, 0x32242e2b, 0x4b4c3f48, 0x44463f47, 0x61735a50,
301 0x566c5550, 0x88644644, 0x7a766c65, 0x4d808280, 0x8c978d60,
302 0x7e73967d, 0xdbff7b80, 0x1f014300, 0x272d2121, 0x3030582d,
303 0x697bb958, 0xb8b9b97b, 0xb9b8a6a6, 0xb9b9b9b9, 0xb9b9b9b9,
304 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9,
305 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xffb9b9b9 },
306 { 0x0c110043, 0x0a0d0f0d, 0x0f0e0f11, 0x14111213, 0x1a1c2b1a,
307 0x351a1818, 0x2b1f2826, 0x4142373f, 0x3c3d373e, 0x55644e46,
308 0x4b5f4a46, 0x77573d3c, 0x6b675f58, 0x43707170, 0x7a847b54,
309 0x6e64836d, 0xdbff6c70, 0x1b014300, 0x22271d1d, 0x2a2a4c27,
310 0x5b6ba04c, 0xa0a0a06b, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
311 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
312 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xffa0a0a0 },
313 { 0x090e0043, 0x090a0c0a, 0x0c0b0c0e, 0x110e0f10, 0x15172415,
314 0x2c151313, 0x241a211f, 0x36372e34, 0x31322e33, 0x4653413a,
315 0x3e4e3d3a, 0x62483231, 0x58564e49, 0x385d5e5d, 0x656d6645,
316 0x5b536c5a, 0xdbff595d, 0x16014300, 0x1c201818, 0x22223f20,
317 0x4b58853f, 0x85858558, 0x85858585, 0x85858585, 0x85858585,
318 0x85858585, 0x85858585, 0x85858585, 0x85858585, 0x85858585,
319 0x85858585, 0x85858585, 0x85858585, 0xff858585 },
320 { 0x070b0043, 0x07080a08, 0x0a090a0b, 0x0d0b0c0c, 0x11121c11,
321 0x23110f0f, 0x1c141a19, 0x2b2b2429, 0x27282428, 0x3842332e,
322 0x313e302e, 0x4e392827, 0x46443e3a, 0x2c4a4a4a, 0x50565137,
323 0x48425647, 0xdbff474a, 0x12014300, 0x161a1313, 0x1c1c331a,
324 0x3d486c33, 0x6c6c6c48, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
325 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
326 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0xff6c6c6c },
327 { 0x06090043, 0x05060706, 0x07070709, 0x0a09090a, 0x0d0e160d,
328 0x1b0d0c0c, 0x16101413, 0x21221c20, 0x1e1f1c20, 0x2b332824,
329 0x26302624, 0x3d2d1f1e, 0x3735302d, 0x22393a39, 0x3f443f2b,
330 0x38334338, 0xdbff3739, 0x0d014300, 0x11130e0e, 0x15152613,
331 0x2d355026, 0x50505035, 0x50505050, 0x50505050, 0x50505050,
332 0x50505050, 0x50505050, 0x50505050, 0x50505050, 0x50505050,
333 0x50505050, 0x50505050, 0x50505050, 0xff505050 },
334 { 0x04060043, 0x03040504, 0x05040506, 0x07060606, 0x09090f09,
335 0x12090808, 0x0f0a0d0d, 0x16161315, 0x14151315, 0x1d221b18,
336 0x19201918, 0x281e1514, 0x2423201e, 0x17262726, 0x2a2d2a1c,
337 0x25222d25, 0xdbff2526, 0x09014300, 0x0b0d0a0a, 0x0e0e1a0d,
338 0x1f25371a, 0x37373725, 0x37373737, 0x37373737, 0x37373737,
339 0x37373737, 0x37373737, 0x37373737, 0x37373737, 0x37373737,
340 0x37373737, 0x37373737, 0x37373737, 0xff373737 },
341 { 0x02030043, 0x01020202, 0x02020203, 0x03030303, 0x04040704,
342 0x09040404, 0x07050606, 0x0b0b090a, 0x0a0a090a, 0x0e110d0c,
343 0x0c100c0c, 0x140f0a0a, 0x1211100f, 0x0b131313, 0x1516150e,
344 0x12111612, 0xdbff1213, 0x04014300, 0x05060505, 0x07070d06,
345 0x0f121b0d, 0x1b1b1b12, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
346 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
347 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0xff1b1b1b },
348 { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
349 0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
350 0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
351 0x0c0b0f0c, 0xdbff0c0c, 0x03014300, 0x03040303, 0x04040804,
352 0x0a0c1208, 0x1212120c, 0x12121212, 0x12121212, 0x12121212,
353 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212,
354 0x12121212, 0x12121212, 0x12121212, 0xff121212 },
355 { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
356 0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
357 0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
358 0x0c0b0f0c, 0xdbff0c0c, 0x02014300, 0x03030202, 0x04040703,
359 0x080a0f07, 0x0f0f0f0a, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
360 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
361 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0xff0f0f0f },
362 { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x02020302,
363 0x04020202, 0x03020303, 0x05050405, 0x05050405, 0x07080606,
364 0x06080606, 0x0a070505, 0x09080807, 0x05090909, 0x0a0b0a07,
365 0x09080b09, 0xdbff0909, 0x02014300, 0x02030202, 0x03030503,
366 0x07080c05, 0x0c0c0c08, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
367 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
368 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0xff0c0c0c },
369 { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010201,
370 0x03010101, 0x02010202, 0x03030303, 0x03030303, 0x04050404,
371 0x04050404, 0x06050303, 0x06050505, 0x03060606, 0x07070704,
372 0x06050706, 0xdbff0606, 0x01014300, 0x01020101, 0x02020402,
373 0x05060904, 0x09090906, 0x09090909, 0x09090909, 0x09090909,
374 0x09090909, 0x09090909, 0x09090909, 0x09090909, 0x09090909,
375 0x09090909, 0x09090909, 0x09090909, 0xff090909 },
376 { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010101,
377 0x01010101, 0x01010101, 0x01010101, 0x01010101, 0x02020202,
378 0x02020202, 0x03020101, 0x03020202, 0x01030303, 0x03030302,
379 0x03020303, 0xdbff0403, 0x01014300, 0x01010101, 0x01010201,
380 0x03040602, 0x06060604, 0x06060606, 0x06060606, 0x06060606,
381 0x06060606, 0x06060606, 0x06060606, 0x06060606, 0x06060606,
382 0x06060606, 0x06060606, 0x06060606, 0xff060606 }
383 };
384
385 static const struct v4l2_dv_timings_cap aspeed_video_timings_cap = {
386 .type = V4L2_DV_BT_656_1120,
387 .bt = {
388 .min_width = MIN_WIDTH,
389 .max_width = MAX_WIDTH,
390 .min_height = MIN_HEIGHT,
391 .max_height = MAX_HEIGHT,
392 .min_pixelclock = 6574080, /* 640 x 480 x 24Hz */
393 .max_pixelclock = 138240000, /* 1920 x 1200 x 60Hz */
394 .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
395 V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF,
396 .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
397 V4L2_DV_BT_CAP_REDUCED_BLANKING |
398 V4L2_DV_BT_CAP_CUSTOM,
399 },
400 };
401
aspeed_video_init_jpeg_table(u32 * table,bool yuv420)402 static void aspeed_video_init_jpeg_table(u32 *table, bool yuv420)
403 {
404 int i;
405 unsigned int base;
406
407 for (i = 0; i < ASPEED_VIDEO_JPEG_NUM_QUALITIES; i++) {
408 base = 256 * i; /* AST HW requires this header spacing */
409 memcpy(&table[base], aspeed_video_jpeg_header,
410 sizeof(aspeed_video_jpeg_header));
411
412 base += ASPEED_VIDEO_JPEG_HEADER_SIZE;
413 memcpy(&table[base], aspeed_video_jpeg_dct[i],
414 sizeof(aspeed_video_jpeg_dct[i]));
415
416 base += ASPEED_VIDEO_JPEG_DCT_SIZE;
417 memcpy(&table[base], aspeed_video_jpeg_quant,
418 sizeof(aspeed_video_jpeg_quant));
419
420 if (yuv420)
421 table[base + 2] = 0x00220103;
422 }
423 }
424
aspeed_video_update(struct aspeed_video * video,u32 reg,u32 clear,u32 bits)425 static void aspeed_video_update(struct aspeed_video *video, u32 reg, u32 clear,
426 u32 bits)
427 {
428 u32 t = readl(video->base + reg);
429 u32 before = t;
430
431 t &= ~clear;
432 t |= bits;
433 writel(t, video->base + reg);
434 dev_dbg(video->dev, "update %03x[%08x -> %08x]\n", reg, before,
435 readl(video->base + reg));
436 }
437
aspeed_video_read(struct aspeed_video * video,u32 reg)438 static u32 aspeed_video_read(struct aspeed_video *video, u32 reg)
439 {
440 u32 t = readl(video->base + reg);
441
442 dev_dbg(video->dev, "read %03x[%08x]\n", reg, t);
443 return t;
444 }
445
aspeed_video_write(struct aspeed_video * video,u32 reg,u32 val)446 static void aspeed_video_write(struct aspeed_video *video, u32 reg, u32 val)
447 {
448 writel(val, video->base + reg);
449 dev_dbg(video->dev, "write %03x[%08x]\n", reg,
450 readl(video->base + reg));
451 }
452
aspeed_video_start_frame(struct aspeed_video * video)453 static int aspeed_video_start_frame(struct aspeed_video *video)
454 {
455 dma_addr_t addr;
456 unsigned long flags;
457 struct aspeed_video_buffer *buf;
458 u32 seq_ctrl = aspeed_video_read(video, VE_SEQ_CTRL);
459
460 if (video->v4l2_input_status) {
461 dev_dbg(video->dev, "No signal; don't start frame\n");
462 return 0;
463 }
464
465 if (!(seq_ctrl & VE_SEQ_CTRL_COMP_BUSY) ||
466 !(seq_ctrl & VE_SEQ_CTRL_CAP_BUSY)) {
467 dev_dbg(video->dev, "Engine busy; don't start frame\n");
468 return -EBUSY;
469 }
470
471 spin_lock_irqsave(&video->lock, flags);
472 buf = list_first_entry_or_null(&video->buffers,
473 struct aspeed_video_buffer, link);
474 if (!buf) {
475 spin_unlock_irqrestore(&video->lock, flags);
476 dev_dbg(video->dev, "No buffers; don't start frame\n");
477 return -EPROTO;
478 }
479
480 set_bit(VIDEO_FRAME_INPRG, &video->flags);
481 addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
482 spin_unlock_irqrestore(&video->lock, flags);
483
484 aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
485 aspeed_video_write(video, VE_COMP_OFFSET, 0);
486 aspeed_video_write(video, VE_COMP_ADDR, addr);
487
488 aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
489 VE_INTERRUPT_COMP_COMPLETE);
490
491 aspeed_video_update(video, VE_SEQ_CTRL, 0,
492 VE_SEQ_CTRL_TRIG_CAPTURE | VE_SEQ_CTRL_TRIG_COMP);
493
494 return 0;
495 }
496
aspeed_video_enable_mode_detect(struct aspeed_video * video)497 static void aspeed_video_enable_mode_detect(struct aspeed_video *video)
498 {
499 /* Enable mode detect interrupts */
500 aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
501 VE_INTERRUPT_MODE_DETECT);
502
503 /* Disable mode detect in order to re-trigger */
504 aspeed_video_update(video, VE_SEQ_CTRL,
505 VE_SEQ_CTRL_TRIG_MODE_DET, 0);
506
507 /* Trigger mode detect */
508 aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_TRIG_MODE_DET);
509 }
510
aspeed_video_off(struct aspeed_video * video)511 static void aspeed_video_off(struct aspeed_video *video)
512 {
513 if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
514 return;
515
516 /* Disable interrupts */
517 aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
518 aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
519
520 /* Turn off the relevant clocks */
521 clk_disable(video->eclk);
522 clk_disable(video->vclk);
523
524 clear_bit(VIDEO_CLOCKS_ON, &video->flags);
525 }
526
aspeed_video_on(struct aspeed_video * video)527 static void aspeed_video_on(struct aspeed_video *video)
528 {
529 if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
530 return;
531
532 /* Turn on the relevant clocks */
533 clk_enable(video->vclk);
534 clk_enable(video->eclk);
535
536 set_bit(VIDEO_CLOCKS_ON, &video->flags);
537 }
538
aspeed_video_bufs_done(struct aspeed_video * video,enum vb2_buffer_state state)539 static void aspeed_video_bufs_done(struct aspeed_video *video,
540 enum vb2_buffer_state state)
541 {
542 unsigned long flags;
543 struct aspeed_video_buffer *buf;
544
545 spin_lock_irqsave(&video->lock, flags);
546 list_for_each_entry(buf, &video->buffers, link)
547 vb2_buffer_done(&buf->vb.vb2_buf, state);
548 INIT_LIST_HEAD(&video->buffers);
549 spin_unlock_irqrestore(&video->lock, flags);
550 }
551
aspeed_video_irq_res_change(struct aspeed_video * video,ulong delay)552 static void aspeed_video_irq_res_change(struct aspeed_video *video, ulong delay)
553 {
554 dev_dbg(video->dev, "Resolution changed; resetting\n");
555
556 set_bit(VIDEO_RES_CHANGE, &video->flags);
557 clear_bit(VIDEO_FRAME_INPRG, &video->flags);
558
559 video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
560
561 aspeed_video_off(video);
562 aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
563
564 schedule_delayed_work(&video->res_work, delay);
565 }
566
aspeed_video_irq(int irq,void * arg)567 static irqreturn_t aspeed_video_irq(int irq, void *arg)
568 {
569 struct aspeed_video *video = arg;
570 u32 sts = aspeed_video_read(video, VE_INTERRUPT_STATUS);
571
572 /*
573 * Resolution changed or signal was lost; reset the engine and
574 * re-initialize
575 */
576 if (sts & VE_INTERRUPT_MODE_DETECT_WD) {
577 aspeed_video_irq_res_change(video, 0);
578 return IRQ_HANDLED;
579 }
580
581 if (sts & VE_INTERRUPT_MODE_DETECT) {
582 if (test_bit(VIDEO_RES_DETECT, &video->flags)) {
583 aspeed_video_update(video, VE_INTERRUPT_CTRL,
584 VE_INTERRUPT_MODE_DETECT, 0);
585 aspeed_video_write(video, VE_INTERRUPT_STATUS,
586 VE_INTERRUPT_MODE_DETECT);
587 sts &= ~VE_INTERRUPT_MODE_DETECT;
588 set_bit(VIDEO_MODE_DETECT_DONE, &video->flags);
589 wake_up_interruptible_all(&video->wait);
590 } else {
591 /*
592 * Signal acquired while NOT doing resolution
593 * detection; reset the engine and re-initialize
594 */
595 aspeed_video_irq_res_change(video,
596 RESOLUTION_CHANGE_DELAY);
597 return IRQ_HANDLED;
598 }
599 }
600
601 if (sts & VE_INTERRUPT_COMP_COMPLETE) {
602 struct aspeed_video_buffer *buf;
603 u32 frame_size = aspeed_video_read(video,
604 video->comp_size_read);
605
606 spin_lock(&video->lock);
607 clear_bit(VIDEO_FRAME_INPRG, &video->flags);
608 buf = list_first_entry_or_null(&video->buffers,
609 struct aspeed_video_buffer,
610 link);
611 if (buf) {
612 vb2_set_plane_payload(&buf->vb.vb2_buf, 0, frame_size);
613
614 if (!list_is_last(&buf->link, &video->buffers)) {
615 buf->vb.vb2_buf.timestamp = ktime_get_ns();
616 buf->vb.sequence = video->sequence++;
617 buf->vb.field = V4L2_FIELD_NONE;
618 vb2_buffer_done(&buf->vb.vb2_buf,
619 VB2_BUF_STATE_DONE);
620 list_del(&buf->link);
621 }
622 }
623 spin_unlock(&video->lock);
624
625 aspeed_video_update(video, VE_SEQ_CTRL,
626 VE_SEQ_CTRL_TRIG_CAPTURE |
627 VE_SEQ_CTRL_FORCE_IDLE |
628 VE_SEQ_CTRL_TRIG_COMP, 0);
629 aspeed_video_update(video, VE_INTERRUPT_CTRL,
630 VE_INTERRUPT_COMP_COMPLETE, 0);
631 aspeed_video_write(video, VE_INTERRUPT_STATUS,
632 VE_INTERRUPT_COMP_COMPLETE);
633 sts &= ~VE_INTERRUPT_COMP_COMPLETE;
634 if (test_bit(VIDEO_STREAMING, &video->flags) && buf)
635 aspeed_video_start_frame(video);
636 }
637
638 /*
639 * CAPTURE_COMPLETE and FRAME_COMPLETE interrupts come even when these
640 * are disabled in the VE_INTERRUPT_CTRL register so clear them to
641 * prevent unnecessary interrupt calls.
642 */
643 if (sts & VE_INTERRUPT_CAPTURE_COMPLETE)
644 sts &= ~VE_INTERRUPT_CAPTURE_COMPLETE;
645 if (sts & VE_INTERRUPT_FRAME_COMPLETE)
646 sts &= ~VE_INTERRUPT_FRAME_COMPLETE;
647
648 return sts ? IRQ_NONE : IRQ_HANDLED;
649 }
650
aspeed_video_check_and_set_polarity(struct aspeed_video * video)651 static void aspeed_video_check_and_set_polarity(struct aspeed_video *video)
652 {
653 int i;
654 int hsync_counter = 0;
655 int vsync_counter = 0;
656 u32 sts, ctrl;
657
658 for (i = 0; i < NUM_POLARITY_CHECKS; ++i) {
659 sts = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
660 if (sts & VE_MODE_DETECT_STATUS_VSYNC)
661 vsync_counter--;
662 else
663 vsync_counter++;
664
665 if (sts & VE_MODE_DETECT_STATUS_HSYNC)
666 hsync_counter--;
667 else
668 hsync_counter++;
669 }
670
671 ctrl = aspeed_video_read(video, VE_CTRL);
672
673 if (hsync_counter < 0) {
674 ctrl |= VE_CTRL_HSYNC_POL;
675 video->detected_timings.polarities &=
676 ~V4L2_DV_HSYNC_POS_POL;
677 } else {
678 ctrl &= ~VE_CTRL_HSYNC_POL;
679 video->detected_timings.polarities |=
680 V4L2_DV_HSYNC_POS_POL;
681 }
682
683 if (vsync_counter < 0) {
684 ctrl |= VE_CTRL_VSYNC_POL;
685 video->detected_timings.polarities &=
686 ~V4L2_DV_VSYNC_POS_POL;
687 } else {
688 ctrl &= ~VE_CTRL_VSYNC_POL;
689 video->detected_timings.polarities |=
690 V4L2_DV_VSYNC_POS_POL;
691 }
692
693 aspeed_video_write(video, VE_CTRL, ctrl);
694 }
695
aspeed_video_alloc_buf(struct aspeed_video * video,struct aspeed_video_addr * addr,unsigned int size)696 static bool aspeed_video_alloc_buf(struct aspeed_video *video,
697 struct aspeed_video_addr *addr,
698 unsigned int size)
699 {
700 addr->virt = dma_alloc_coherent(video->dev, size, &addr->dma,
701 GFP_KERNEL);
702 if (!addr->virt)
703 return false;
704
705 addr->size = size;
706 return true;
707 }
708
aspeed_video_free_buf(struct aspeed_video * video,struct aspeed_video_addr * addr)709 static void aspeed_video_free_buf(struct aspeed_video *video,
710 struct aspeed_video_addr *addr)
711 {
712 dma_free_coherent(video->dev, addr->size, addr->virt, addr->dma);
713 addr->size = 0;
714 addr->dma = 0ULL;
715 addr->virt = NULL;
716 }
717
718 /*
719 * Get the minimum HW-supported compression buffer size for the frame size.
720 * Assume worst-case JPEG compression size is 1/8 raw size. This should be
721 * plenty even for maximum quality; any worse and the engine will simply return
722 * incomplete JPEGs.
723 */
aspeed_video_calc_compressed_size(struct aspeed_video * video,unsigned int frame_size)724 static void aspeed_video_calc_compressed_size(struct aspeed_video *video,
725 unsigned int frame_size)
726 {
727 int i, j;
728 u32 compression_buffer_size_reg = 0;
729 unsigned int size;
730 const unsigned int num_compression_packets = 4;
731 const unsigned int compression_packet_size = 1024;
732 const unsigned int max_compressed_size = frame_size / 2; /* 4bpp / 8 */
733
734 video->max_compressed_size = UINT_MAX;
735
736 for (i = 0; i < 6; ++i) {
737 for (j = 0; j < 8; ++j) {
738 size = (num_compression_packets << i) *
739 (compression_packet_size << j);
740 if (size < max_compressed_size)
741 continue;
742
743 if (size < video->max_compressed_size) {
744 compression_buffer_size_reg = (i << 3) | j;
745 video->max_compressed_size = size;
746 }
747 }
748 }
749
750 aspeed_video_write(video, VE_STREAM_BUF_SIZE,
751 compression_buffer_size_reg);
752
753 dev_dbg(video->dev, "Max compressed size: %x\n",
754 video->max_compressed_size);
755 }
756
757 #define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags)
758
aspeed_video_get_resolution(struct aspeed_video * video)759 static void aspeed_video_get_resolution(struct aspeed_video *video)
760 {
761 bool invalid_resolution = true;
762 int rc;
763 int tries = 0;
764 u32 mds;
765 u32 src_lr_edge;
766 u32 src_tb_edge;
767 u32 sync;
768 struct v4l2_bt_timings *det = &video->detected_timings;
769
770 det->width = MIN_WIDTH;
771 det->height = MIN_HEIGHT;
772 video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
773
774 do {
775 if (tries) {
776 set_current_state(TASK_INTERRUPTIBLE);
777 if (schedule_timeout(INVALID_RESOLUTION_DELAY))
778 return;
779 }
780
781 set_bit(VIDEO_RES_DETECT, &video->flags);
782 aspeed_video_update(video, VE_CTRL,
783 VE_CTRL_VSYNC_POL | VE_CTRL_HSYNC_POL, 0);
784 aspeed_video_enable_mode_detect(video);
785
786 rc = wait_event_interruptible_timeout(video->wait,
787 res_check(video),
788 MODE_DETECT_TIMEOUT);
789 if (!rc) {
790 dev_dbg(video->dev, "Timed out; first mode detect\n");
791 clear_bit(VIDEO_RES_DETECT, &video->flags);
792 return;
793 }
794
795 aspeed_video_check_and_set_polarity(video);
796
797 aspeed_video_enable_mode_detect(video);
798
799 rc = wait_event_interruptible_timeout(video->wait,
800 res_check(video),
801 MODE_DETECT_TIMEOUT);
802 clear_bit(VIDEO_RES_DETECT, &video->flags);
803 if (!rc) {
804 dev_dbg(video->dev, "Timed out; second mode detect\n");
805 return;
806 }
807
808 src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET);
809 src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
810 mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
811 sync = aspeed_video_read(video, VE_SYNC_STATUS);
812
813 video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >>
814 VE_SRC_TB_EDGE_DET_BOT_SHF;
815 video->frame_top = src_tb_edge & VE_SRC_TB_EDGE_DET_TOP;
816 det->vfrontporch = video->frame_top;
817 det->vbackporch = ((mds & VE_MODE_DETECT_V_LINES) >>
818 VE_MODE_DETECT_V_LINES_SHF) - video->frame_bottom;
819 det->vsync = (sync & VE_SYNC_STATUS_VSYNC) >>
820 VE_SYNC_STATUS_VSYNC_SHF;
821 if (video->frame_top > video->frame_bottom)
822 continue;
823
824 video->frame_right = (src_lr_edge & VE_SRC_LR_EDGE_DET_RT) >>
825 VE_SRC_LR_EDGE_DET_RT_SHF;
826 video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT;
827 det->hfrontporch = video->frame_left;
828 det->hbackporch = (mds & VE_MODE_DETECT_H_PIXELS) -
829 video->frame_right;
830 det->hsync = sync & VE_SYNC_STATUS_HSYNC;
831 if (video->frame_left > video->frame_right)
832 continue;
833
834 invalid_resolution = false;
835 } while (invalid_resolution && (tries++ < INVALID_RESOLUTION_RETRIES));
836
837 if (invalid_resolution) {
838 dev_dbg(video->dev, "Invalid resolution detected\n");
839 return;
840 }
841
842 det->height = (video->frame_bottom - video->frame_top) + 1;
843 det->width = (video->frame_right - video->frame_left) + 1;
844 video->v4l2_input_status = 0;
845
846 /*
847 * Enable mode-detect watchdog, resolution-change watchdog and
848 * automatic compression after frame capture.
849 */
850 aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
851 VE_INTERRUPT_MODE_DETECT_WD);
852 aspeed_video_update(video, VE_SEQ_CTRL, 0,
853 VE_SEQ_CTRL_AUTO_COMP | VE_SEQ_CTRL_EN_WATCHDOG);
854
855 dev_dbg(video->dev, "Got resolution: %dx%d\n", det->width,
856 det->height);
857 }
858
aspeed_video_set_resolution(struct aspeed_video * video)859 static void aspeed_video_set_resolution(struct aspeed_video *video)
860 {
861 struct v4l2_bt_timings *act = &video->active_timings;
862 unsigned int size = act->width * act->height;
863
864 /* Set capture/compression frame sizes */
865 aspeed_video_calc_compressed_size(video, size);
866
867 if (video->active_timings.width == 1680) {
868 /*
869 * This is a workaround to fix a silicon bug on A1 and A2
870 * revisions. Since it doesn't break capturing operation of
871 * other revisions, use it for all revisions without checking
872 * the revision ID. It picked 1728 which is a very next
873 * 64-pixels aligned value to 1680 to minimize memory bandwidth
874 * and to get better access speed from video engine.
875 */
876 aspeed_video_write(video, VE_CAP_WINDOW,
877 1728 << 16 | act->height);
878 size += (1728 - 1680) * video->active_timings.height;
879 } else {
880 aspeed_video_write(video, VE_CAP_WINDOW,
881 act->width << 16 | act->height);
882 }
883 aspeed_video_write(video, VE_COMP_WINDOW,
884 act->width << 16 | act->height);
885 aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4);
886
887 /* Don't use direct mode below 1024 x 768 (irqs don't fire) */
888 if (size < DIRECT_FETCH_THRESHOLD) {
889 aspeed_video_write(video, VE_TGS_0,
890 FIELD_PREP(VE_TGS_FIRST,
891 video->frame_left - 1) |
892 FIELD_PREP(VE_TGS_LAST,
893 video->frame_right));
894 aspeed_video_write(video, VE_TGS_1,
895 FIELD_PREP(VE_TGS_FIRST, video->frame_top) |
896 FIELD_PREP(VE_TGS_LAST,
897 video->frame_bottom + 1));
898 aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_INT_DE);
899 } else {
900 aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_DIRECT_FETCH);
901 }
902
903 size *= 4;
904
905 if (size != video->srcs[0].size) {
906 if (video->srcs[0].size)
907 aspeed_video_free_buf(video, &video->srcs[0]);
908 if (video->srcs[1].size)
909 aspeed_video_free_buf(video, &video->srcs[1]);
910
911 if (!aspeed_video_alloc_buf(video, &video->srcs[0], size))
912 goto err_mem;
913 if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
914 goto err_mem;
915
916 aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
917 aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
918 }
919
920 return;
921
922 err_mem:
923 dev_err(video->dev, "Failed to allocate source buffers\n");
924
925 if (video->srcs[0].size)
926 aspeed_video_free_buf(video, &video->srcs[0]);
927 }
928
aspeed_video_init_regs(struct aspeed_video * video)929 static void aspeed_video_init_regs(struct aspeed_video *video)
930 {
931 u32 comp_ctrl = VE_COMP_CTRL_RSVD |
932 FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
933 FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
934 u32 ctrl = VE_CTRL_AUTO_OR_CURSOR;
935 u32 seq_ctrl = video->jpeg_mode;
936
937 if (video->frame_rate)
938 ctrl |= FIELD_PREP(VE_CTRL_FRC, video->frame_rate);
939
940 if (video->yuv420)
941 seq_ctrl |= VE_SEQ_CTRL_YUV420;
942
943 /* Unlock VE registers */
944 aspeed_video_write(video, VE_PROTECTION_KEY, VE_PROTECTION_KEY_UNLOCK);
945
946 /* Disable interrupts */
947 aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
948 aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
949
950 /* Clear the offset */
951 aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
952 aspeed_video_write(video, VE_COMP_OFFSET, 0);
953
954 aspeed_video_write(video, VE_JPEG_ADDR, video->jpeg.dma);
955
956 /* Set control registers */
957 aspeed_video_write(video, VE_SEQ_CTRL, seq_ctrl);
958 aspeed_video_write(video, VE_CTRL, ctrl);
959 aspeed_video_write(video, VE_COMP_CTRL, comp_ctrl);
960
961 /* Don't downscale */
962 aspeed_video_write(video, VE_SCALING_FACTOR, 0x10001000);
963 aspeed_video_write(video, VE_SCALING_FILTER0, 0x00200000);
964 aspeed_video_write(video, VE_SCALING_FILTER1, 0x00200000);
965 aspeed_video_write(video, VE_SCALING_FILTER2, 0x00200000);
966 aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
967
968 /* Set mode detection defaults */
969 aspeed_video_write(video, VE_MODE_DETECT, 0x22666500);
970 }
971
aspeed_video_start(struct aspeed_video * video)972 static void aspeed_video_start(struct aspeed_video *video)
973 {
974 aspeed_video_on(video);
975
976 aspeed_video_init_regs(video);
977
978 /* Resolution set to 640x480 if no signal found */
979 aspeed_video_get_resolution(video);
980
981 /* Set timings since the device is being opened for the first time */
982 video->active_timings = video->detected_timings;
983 aspeed_video_set_resolution(video);
984
985 video->pix_fmt.width = video->active_timings.width;
986 video->pix_fmt.height = video->active_timings.height;
987 video->pix_fmt.sizeimage = video->max_compressed_size;
988 }
989
aspeed_video_stop(struct aspeed_video * video)990 static void aspeed_video_stop(struct aspeed_video *video)
991 {
992 set_bit(VIDEO_STOPPED, &video->flags);
993 cancel_delayed_work_sync(&video->res_work);
994
995 aspeed_video_off(video);
996
997 if (video->srcs[0].size)
998 aspeed_video_free_buf(video, &video->srcs[0]);
999
1000 if (video->srcs[1].size)
1001 aspeed_video_free_buf(video, &video->srcs[1]);
1002
1003 video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
1004 video->flags = 0;
1005 }
1006
aspeed_video_querycap(struct file * file,void * fh,struct v4l2_capability * cap)1007 static int aspeed_video_querycap(struct file *file, void *fh,
1008 struct v4l2_capability *cap)
1009 {
1010 strscpy(cap->driver, DEVICE_NAME, sizeof(cap->driver));
1011 strscpy(cap->card, "Aspeed Video Engine", sizeof(cap->card));
1012 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
1013 DEVICE_NAME);
1014
1015 return 0;
1016 }
1017
aspeed_video_enum_format(struct file * file,void * fh,struct v4l2_fmtdesc * f)1018 static int aspeed_video_enum_format(struct file *file, void *fh,
1019 struct v4l2_fmtdesc *f)
1020 {
1021 if (f->index)
1022 return -EINVAL;
1023
1024 f->pixelformat = V4L2_PIX_FMT_JPEG;
1025
1026 return 0;
1027 }
1028
aspeed_video_get_format(struct file * file,void * fh,struct v4l2_format * f)1029 static int aspeed_video_get_format(struct file *file, void *fh,
1030 struct v4l2_format *f)
1031 {
1032 struct aspeed_video *video = video_drvdata(file);
1033
1034 f->fmt.pix = video->pix_fmt;
1035
1036 return 0;
1037 }
1038
aspeed_video_enum_input(struct file * file,void * fh,struct v4l2_input * inp)1039 static int aspeed_video_enum_input(struct file *file, void *fh,
1040 struct v4l2_input *inp)
1041 {
1042 struct aspeed_video *video = video_drvdata(file);
1043
1044 if (inp->index)
1045 return -EINVAL;
1046
1047 strscpy(inp->name, "Host VGA capture", sizeof(inp->name));
1048 inp->type = V4L2_INPUT_TYPE_CAMERA;
1049 inp->capabilities = V4L2_IN_CAP_DV_TIMINGS;
1050 inp->status = video->v4l2_input_status;
1051
1052 return 0;
1053 }
1054
aspeed_video_get_input(struct file * file,void * fh,unsigned int * i)1055 static int aspeed_video_get_input(struct file *file, void *fh, unsigned int *i)
1056 {
1057 *i = 0;
1058
1059 return 0;
1060 }
1061
aspeed_video_set_input(struct file * file,void * fh,unsigned int i)1062 static int aspeed_video_set_input(struct file *file, void *fh, unsigned int i)
1063 {
1064 if (i)
1065 return -EINVAL;
1066
1067 return 0;
1068 }
1069
aspeed_video_get_parm(struct file * file,void * fh,struct v4l2_streamparm * a)1070 static int aspeed_video_get_parm(struct file *file, void *fh,
1071 struct v4l2_streamparm *a)
1072 {
1073 struct aspeed_video *video = video_drvdata(file);
1074
1075 a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1076 a->parm.capture.readbuffers = 3;
1077 a->parm.capture.timeperframe.numerator = 1;
1078 if (!video->frame_rate)
1079 a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
1080 else
1081 a->parm.capture.timeperframe.denominator = video->frame_rate;
1082
1083 return 0;
1084 }
1085
aspeed_video_set_parm(struct file * file,void * fh,struct v4l2_streamparm * a)1086 static int aspeed_video_set_parm(struct file *file, void *fh,
1087 struct v4l2_streamparm *a)
1088 {
1089 unsigned int frame_rate = 0;
1090 struct aspeed_video *video = video_drvdata(file);
1091
1092 a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1093 a->parm.capture.readbuffers = 3;
1094
1095 if (a->parm.capture.timeperframe.numerator)
1096 frame_rate = a->parm.capture.timeperframe.denominator /
1097 a->parm.capture.timeperframe.numerator;
1098
1099 if (!frame_rate || frame_rate > MAX_FRAME_RATE) {
1100 frame_rate = 0;
1101 a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
1102 a->parm.capture.timeperframe.numerator = 1;
1103 }
1104
1105 if (video->frame_rate != frame_rate) {
1106 video->frame_rate = frame_rate;
1107 aspeed_video_update(video, VE_CTRL, VE_CTRL_FRC,
1108 FIELD_PREP(VE_CTRL_FRC, frame_rate));
1109 }
1110
1111 return 0;
1112 }
1113
aspeed_video_enum_framesizes(struct file * file,void * fh,struct v4l2_frmsizeenum * fsize)1114 static int aspeed_video_enum_framesizes(struct file *file, void *fh,
1115 struct v4l2_frmsizeenum *fsize)
1116 {
1117 struct aspeed_video *video = video_drvdata(file);
1118
1119 if (fsize->index)
1120 return -EINVAL;
1121
1122 if (fsize->pixel_format != V4L2_PIX_FMT_JPEG)
1123 return -EINVAL;
1124
1125 fsize->discrete.width = video->pix_fmt.width;
1126 fsize->discrete.height = video->pix_fmt.height;
1127 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1128
1129 return 0;
1130 }
1131
aspeed_video_enum_frameintervals(struct file * file,void * fh,struct v4l2_frmivalenum * fival)1132 static int aspeed_video_enum_frameintervals(struct file *file, void *fh,
1133 struct v4l2_frmivalenum *fival)
1134 {
1135 struct aspeed_video *video = video_drvdata(file);
1136
1137 if (fival->index)
1138 return -EINVAL;
1139
1140 if (fival->width != video->detected_timings.width ||
1141 fival->height != video->detected_timings.height)
1142 return -EINVAL;
1143
1144 if (fival->pixel_format != V4L2_PIX_FMT_JPEG)
1145 return -EINVAL;
1146
1147 fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
1148
1149 fival->stepwise.min.denominator = MAX_FRAME_RATE;
1150 fival->stepwise.min.numerator = 1;
1151 fival->stepwise.max.denominator = 1;
1152 fival->stepwise.max.numerator = 1;
1153 fival->stepwise.step = fival->stepwise.max;
1154
1155 return 0;
1156 }
1157
aspeed_video_set_dv_timings(struct file * file,void * fh,struct v4l2_dv_timings * timings)1158 static int aspeed_video_set_dv_timings(struct file *file, void *fh,
1159 struct v4l2_dv_timings *timings)
1160 {
1161 struct aspeed_video *video = video_drvdata(file);
1162
1163 if (timings->bt.width == video->active_timings.width &&
1164 timings->bt.height == video->active_timings.height)
1165 return 0;
1166
1167 if (vb2_is_busy(&video->queue))
1168 return -EBUSY;
1169
1170 video->active_timings = timings->bt;
1171
1172 aspeed_video_set_resolution(video);
1173
1174 video->pix_fmt.width = timings->bt.width;
1175 video->pix_fmt.height = timings->bt.height;
1176 video->pix_fmt.sizeimage = video->max_compressed_size;
1177
1178 timings->type = V4L2_DV_BT_656_1120;
1179
1180 return 0;
1181 }
1182
aspeed_video_get_dv_timings(struct file * file,void * fh,struct v4l2_dv_timings * timings)1183 static int aspeed_video_get_dv_timings(struct file *file, void *fh,
1184 struct v4l2_dv_timings *timings)
1185 {
1186 struct aspeed_video *video = video_drvdata(file);
1187
1188 timings->type = V4L2_DV_BT_656_1120;
1189 timings->bt = video->active_timings;
1190
1191 return 0;
1192 }
1193
aspeed_video_query_dv_timings(struct file * file,void * fh,struct v4l2_dv_timings * timings)1194 static int aspeed_video_query_dv_timings(struct file *file, void *fh,
1195 struct v4l2_dv_timings *timings)
1196 {
1197 int rc;
1198 struct aspeed_video *video = video_drvdata(file);
1199
1200 /*
1201 * This blocks only if the driver is currently in the process of
1202 * detecting a new resolution; in the event of no signal or timeout
1203 * this function is woken up.
1204 */
1205 if (file->f_flags & O_NONBLOCK) {
1206 if (test_bit(VIDEO_RES_CHANGE, &video->flags))
1207 return -EAGAIN;
1208 } else {
1209 rc = wait_event_interruptible(video->wait,
1210 !test_bit(VIDEO_RES_CHANGE,
1211 &video->flags));
1212 if (rc)
1213 return -EINTR;
1214 }
1215
1216 timings->type = V4L2_DV_BT_656_1120;
1217 timings->bt = video->detected_timings;
1218
1219 return video->v4l2_input_status ? -ENOLINK : 0;
1220 }
1221
aspeed_video_enum_dv_timings(struct file * file,void * fh,struct v4l2_enum_dv_timings * timings)1222 static int aspeed_video_enum_dv_timings(struct file *file, void *fh,
1223 struct v4l2_enum_dv_timings *timings)
1224 {
1225 return v4l2_enum_dv_timings_cap(timings, &aspeed_video_timings_cap,
1226 NULL, NULL);
1227 }
1228
aspeed_video_dv_timings_cap(struct file * file,void * fh,struct v4l2_dv_timings_cap * cap)1229 static int aspeed_video_dv_timings_cap(struct file *file, void *fh,
1230 struct v4l2_dv_timings_cap *cap)
1231 {
1232 *cap = aspeed_video_timings_cap;
1233
1234 return 0;
1235 }
1236
aspeed_video_sub_event(struct v4l2_fh * fh,const struct v4l2_event_subscription * sub)1237 static int aspeed_video_sub_event(struct v4l2_fh *fh,
1238 const struct v4l2_event_subscription *sub)
1239 {
1240 switch (sub->type) {
1241 case V4L2_EVENT_SOURCE_CHANGE:
1242 return v4l2_src_change_event_subscribe(fh, sub);
1243 }
1244
1245 return v4l2_ctrl_subscribe_event(fh, sub);
1246 }
1247
1248 static const struct v4l2_ioctl_ops aspeed_video_ioctl_ops = {
1249 .vidioc_querycap = aspeed_video_querycap,
1250
1251 .vidioc_enum_fmt_vid_cap = aspeed_video_enum_format,
1252 .vidioc_g_fmt_vid_cap = aspeed_video_get_format,
1253 .vidioc_s_fmt_vid_cap = aspeed_video_get_format,
1254 .vidioc_try_fmt_vid_cap = aspeed_video_get_format,
1255
1256 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1257 .vidioc_querybuf = vb2_ioctl_querybuf,
1258 .vidioc_qbuf = vb2_ioctl_qbuf,
1259 .vidioc_expbuf = vb2_ioctl_expbuf,
1260 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1261 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1262 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1263 .vidioc_streamon = vb2_ioctl_streamon,
1264 .vidioc_streamoff = vb2_ioctl_streamoff,
1265
1266 .vidioc_enum_input = aspeed_video_enum_input,
1267 .vidioc_g_input = aspeed_video_get_input,
1268 .vidioc_s_input = aspeed_video_set_input,
1269
1270 .vidioc_g_parm = aspeed_video_get_parm,
1271 .vidioc_s_parm = aspeed_video_set_parm,
1272 .vidioc_enum_framesizes = aspeed_video_enum_framesizes,
1273 .vidioc_enum_frameintervals = aspeed_video_enum_frameintervals,
1274
1275 .vidioc_s_dv_timings = aspeed_video_set_dv_timings,
1276 .vidioc_g_dv_timings = aspeed_video_get_dv_timings,
1277 .vidioc_query_dv_timings = aspeed_video_query_dv_timings,
1278 .vidioc_enum_dv_timings = aspeed_video_enum_dv_timings,
1279 .vidioc_dv_timings_cap = aspeed_video_dv_timings_cap,
1280
1281 .vidioc_subscribe_event = aspeed_video_sub_event,
1282 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1283 };
1284
aspeed_video_update_jpeg_quality(struct aspeed_video * video)1285 static void aspeed_video_update_jpeg_quality(struct aspeed_video *video)
1286 {
1287 u32 comp_ctrl = FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
1288 FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
1289
1290 aspeed_video_update(video, VE_COMP_CTRL,
1291 VE_COMP_CTRL_DCT_LUM | VE_COMP_CTRL_DCT_CHR,
1292 comp_ctrl);
1293 }
1294
aspeed_video_update_subsampling(struct aspeed_video * video)1295 static void aspeed_video_update_subsampling(struct aspeed_video *video)
1296 {
1297 if (video->jpeg.virt)
1298 aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
1299
1300 if (video->yuv420)
1301 aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_YUV420);
1302 else
1303 aspeed_video_update(video, VE_SEQ_CTRL, VE_SEQ_CTRL_YUV420, 0);
1304 }
1305
aspeed_video_set_ctrl(struct v4l2_ctrl * ctrl)1306 static int aspeed_video_set_ctrl(struct v4l2_ctrl *ctrl)
1307 {
1308 struct aspeed_video *video = container_of(ctrl->handler,
1309 struct aspeed_video,
1310 ctrl_handler);
1311
1312 switch (ctrl->id) {
1313 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
1314 video->jpeg_quality = ctrl->val;
1315 aspeed_video_update_jpeg_quality(video);
1316 break;
1317 case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
1318 if (ctrl->val == V4L2_JPEG_CHROMA_SUBSAMPLING_420) {
1319 video->yuv420 = true;
1320 aspeed_video_update_subsampling(video);
1321 } else {
1322 video->yuv420 = false;
1323 aspeed_video_update_subsampling(video);
1324 }
1325 break;
1326 default:
1327 return -EINVAL;
1328 }
1329
1330 return 0;
1331 }
1332
1333 static const struct v4l2_ctrl_ops aspeed_video_ctrl_ops = {
1334 .s_ctrl = aspeed_video_set_ctrl,
1335 };
1336
aspeed_video_resolution_work(struct work_struct * work)1337 static void aspeed_video_resolution_work(struct work_struct *work)
1338 {
1339 struct delayed_work *dwork = to_delayed_work(work);
1340 struct aspeed_video *video = container_of(dwork, struct aspeed_video,
1341 res_work);
1342
1343 aspeed_video_on(video);
1344
1345 /* Exit early in case no clients remain */
1346 if (test_bit(VIDEO_STOPPED, &video->flags))
1347 goto done;
1348
1349 aspeed_video_init_regs(video);
1350
1351 aspeed_video_get_resolution(video);
1352
1353 if (video->detected_timings.width != video->active_timings.width ||
1354 video->detected_timings.height != video->active_timings.height) {
1355 static const struct v4l2_event ev = {
1356 .type = V4L2_EVENT_SOURCE_CHANGE,
1357 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
1358 };
1359
1360 v4l2_event_queue(&video->vdev, &ev);
1361 } else if (test_bit(VIDEO_STREAMING, &video->flags)) {
1362 /* No resolution change so just restart streaming */
1363 aspeed_video_start_frame(video);
1364 }
1365
1366 done:
1367 clear_bit(VIDEO_RES_CHANGE, &video->flags);
1368 wake_up_interruptible_all(&video->wait);
1369 }
1370
aspeed_video_open(struct file * file)1371 static int aspeed_video_open(struct file *file)
1372 {
1373 int rc;
1374 struct aspeed_video *video = video_drvdata(file);
1375
1376 mutex_lock(&video->video_lock);
1377
1378 rc = v4l2_fh_open(file);
1379 if (rc) {
1380 mutex_unlock(&video->video_lock);
1381 return rc;
1382 }
1383
1384 if (v4l2_fh_is_singular_file(file))
1385 aspeed_video_start(video);
1386
1387 mutex_unlock(&video->video_lock);
1388
1389 return 0;
1390 }
1391
aspeed_video_release(struct file * file)1392 static int aspeed_video_release(struct file *file)
1393 {
1394 int rc;
1395 struct aspeed_video *video = video_drvdata(file);
1396
1397 mutex_lock(&video->video_lock);
1398
1399 if (v4l2_fh_is_singular_file(file))
1400 aspeed_video_stop(video);
1401
1402 rc = _vb2_fop_release(file, NULL);
1403
1404 mutex_unlock(&video->video_lock);
1405
1406 return rc;
1407 }
1408
1409 static const struct v4l2_file_operations aspeed_video_v4l2_fops = {
1410 .owner = THIS_MODULE,
1411 .read = vb2_fop_read,
1412 .poll = vb2_fop_poll,
1413 .unlocked_ioctl = video_ioctl2,
1414 .mmap = vb2_fop_mmap,
1415 .open = aspeed_video_open,
1416 .release = aspeed_video_release,
1417 };
1418
aspeed_video_queue_setup(struct vb2_queue * q,unsigned int * num_buffers,unsigned int * num_planes,unsigned int sizes[],struct device * alloc_devs[])1419 static int aspeed_video_queue_setup(struct vb2_queue *q,
1420 unsigned int *num_buffers,
1421 unsigned int *num_planes,
1422 unsigned int sizes[],
1423 struct device *alloc_devs[])
1424 {
1425 struct aspeed_video *video = vb2_get_drv_priv(q);
1426
1427 if (*num_planes) {
1428 if (sizes[0] < video->max_compressed_size)
1429 return -EINVAL;
1430
1431 return 0;
1432 }
1433
1434 *num_planes = 1;
1435 sizes[0] = video->max_compressed_size;
1436
1437 return 0;
1438 }
1439
aspeed_video_buf_prepare(struct vb2_buffer * vb)1440 static int aspeed_video_buf_prepare(struct vb2_buffer *vb)
1441 {
1442 struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
1443
1444 if (vb2_plane_size(vb, 0) < video->max_compressed_size)
1445 return -EINVAL;
1446
1447 return 0;
1448 }
1449
aspeed_video_start_streaming(struct vb2_queue * q,unsigned int count)1450 static int aspeed_video_start_streaming(struct vb2_queue *q,
1451 unsigned int count)
1452 {
1453 int rc;
1454 struct aspeed_video *video = vb2_get_drv_priv(q);
1455
1456 video->sequence = 0;
1457
1458 rc = aspeed_video_start_frame(video);
1459 if (rc) {
1460 aspeed_video_bufs_done(video, VB2_BUF_STATE_QUEUED);
1461 return rc;
1462 }
1463
1464 set_bit(VIDEO_STREAMING, &video->flags);
1465 return 0;
1466 }
1467
aspeed_video_stop_streaming(struct vb2_queue * q)1468 static void aspeed_video_stop_streaming(struct vb2_queue *q)
1469 {
1470 int rc;
1471 struct aspeed_video *video = vb2_get_drv_priv(q);
1472
1473 clear_bit(VIDEO_STREAMING, &video->flags);
1474
1475 rc = wait_event_timeout(video->wait,
1476 !test_bit(VIDEO_FRAME_INPRG, &video->flags),
1477 STOP_TIMEOUT);
1478 if (!rc) {
1479 dev_dbg(video->dev, "Timed out when stopping streaming\n");
1480
1481 /*
1482 * Need to force stop any DMA and try and get HW into a good
1483 * state for future calls to start streaming again.
1484 */
1485 aspeed_video_off(video);
1486 aspeed_video_on(video);
1487
1488 aspeed_video_init_regs(video);
1489
1490 aspeed_video_get_resolution(video);
1491 }
1492
1493 aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
1494 }
1495
aspeed_video_buf_queue(struct vb2_buffer * vb)1496 static void aspeed_video_buf_queue(struct vb2_buffer *vb)
1497 {
1498 bool empty;
1499 struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
1500 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1501 struct aspeed_video_buffer *avb = to_aspeed_video_buffer(vbuf);
1502 unsigned long flags;
1503
1504 spin_lock_irqsave(&video->lock, flags);
1505 empty = list_empty(&video->buffers);
1506 list_add_tail(&avb->link, &video->buffers);
1507 spin_unlock_irqrestore(&video->lock, flags);
1508
1509 if (test_bit(VIDEO_STREAMING, &video->flags) &&
1510 !test_bit(VIDEO_FRAME_INPRG, &video->flags) && empty)
1511 aspeed_video_start_frame(video);
1512 }
1513
1514 static const struct vb2_ops aspeed_video_vb2_ops = {
1515 .queue_setup = aspeed_video_queue_setup,
1516 .wait_prepare = vb2_ops_wait_prepare,
1517 .wait_finish = vb2_ops_wait_finish,
1518 .buf_prepare = aspeed_video_buf_prepare,
1519 .start_streaming = aspeed_video_start_streaming,
1520 .stop_streaming = aspeed_video_stop_streaming,
1521 .buf_queue = aspeed_video_buf_queue,
1522 };
1523
aspeed_video_setup_video(struct aspeed_video * video)1524 static int aspeed_video_setup_video(struct aspeed_video *video)
1525 {
1526 const u64 mask = ~(BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_444) |
1527 BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_420));
1528 struct v4l2_device *v4l2_dev = &video->v4l2_dev;
1529 struct vb2_queue *vbq = &video->queue;
1530 struct video_device *vdev = &video->vdev;
1531 int rc;
1532
1533 video->pix_fmt.pixelformat = V4L2_PIX_FMT_JPEG;
1534 video->pix_fmt.field = V4L2_FIELD_NONE;
1535 video->pix_fmt.colorspace = V4L2_COLORSPACE_SRGB;
1536 video->pix_fmt.quantization = V4L2_QUANTIZATION_FULL_RANGE;
1537 video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
1538
1539 rc = v4l2_device_register(video->dev, v4l2_dev);
1540 if (rc) {
1541 dev_err(video->dev, "Failed to register v4l2 device\n");
1542 return rc;
1543 }
1544
1545 v4l2_ctrl_handler_init(&video->ctrl_handler, 2);
1546 v4l2_ctrl_new_std(&video->ctrl_handler, &aspeed_video_ctrl_ops,
1547 V4L2_CID_JPEG_COMPRESSION_QUALITY, 0,
1548 ASPEED_VIDEO_JPEG_NUM_QUALITIES - 1, 1, 0);
1549 v4l2_ctrl_new_std_menu(&video->ctrl_handler, &aspeed_video_ctrl_ops,
1550 V4L2_CID_JPEG_CHROMA_SUBSAMPLING,
1551 V4L2_JPEG_CHROMA_SUBSAMPLING_420, mask,
1552 V4L2_JPEG_CHROMA_SUBSAMPLING_444);
1553
1554 rc = video->ctrl_handler.error;
1555 if (rc) {
1556 v4l2_ctrl_handler_free(&video->ctrl_handler);
1557 v4l2_device_unregister(v4l2_dev);
1558
1559 dev_err(video->dev, "Failed to init controls: %d\n", rc);
1560 return rc;
1561 }
1562
1563 v4l2_dev->ctrl_handler = &video->ctrl_handler;
1564
1565 vbq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1566 vbq->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
1567 vbq->dev = v4l2_dev->dev;
1568 vbq->lock = &video->video_lock;
1569 vbq->ops = &aspeed_video_vb2_ops;
1570 vbq->mem_ops = &vb2_dma_contig_memops;
1571 vbq->drv_priv = video;
1572 vbq->buf_struct_size = sizeof(struct aspeed_video_buffer);
1573 vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1574 vbq->min_buffers_needed = 3;
1575
1576 rc = vb2_queue_init(vbq);
1577 if (rc) {
1578 v4l2_ctrl_handler_free(&video->ctrl_handler);
1579 v4l2_device_unregister(v4l2_dev);
1580
1581 dev_err(video->dev, "Failed to init vb2 queue\n");
1582 return rc;
1583 }
1584
1585 vdev->queue = vbq;
1586 vdev->fops = &aspeed_video_v4l2_fops;
1587 vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
1588 V4L2_CAP_STREAMING;
1589 vdev->v4l2_dev = v4l2_dev;
1590 strscpy(vdev->name, DEVICE_NAME, sizeof(vdev->name));
1591 vdev->vfl_type = VFL_TYPE_VIDEO;
1592 vdev->vfl_dir = VFL_DIR_RX;
1593 vdev->release = video_device_release_empty;
1594 vdev->ioctl_ops = &aspeed_video_ioctl_ops;
1595 vdev->lock = &video->video_lock;
1596
1597 video_set_drvdata(vdev, video);
1598 rc = video_register_device(vdev, VFL_TYPE_VIDEO, 0);
1599 if (rc) {
1600 v4l2_ctrl_handler_free(&video->ctrl_handler);
1601 v4l2_device_unregister(v4l2_dev);
1602
1603 dev_err(video->dev, "Failed to register video device\n");
1604 return rc;
1605 }
1606
1607 return 0;
1608 }
1609
aspeed_video_init(struct aspeed_video * video)1610 static int aspeed_video_init(struct aspeed_video *video)
1611 {
1612 int irq;
1613 int rc;
1614 struct device *dev = video->dev;
1615
1616 irq = irq_of_parse_and_map(dev->of_node, 0);
1617 if (!irq) {
1618 dev_err(dev, "Unable to find IRQ\n");
1619 return -ENODEV;
1620 }
1621
1622 rc = devm_request_threaded_irq(dev, irq, NULL, aspeed_video_irq,
1623 IRQF_ONESHOT, DEVICE_NAME, video);
1624 if (rc < 0) {
1625 dev_err(dev, "Unable to request IRQ %d\n", irq);
1626 return rc;
1627 }
1628
1629 video->eclk = devm_clk_get(dev, "eclk");
1630 if (IS_ERR(video->eclk)) {
1631 dev_err(dev, "Unable to get ECLK\n");
1632 return PTR_ERR(video->eclk);
1633 }
1634
1635 rc = clk_prepare(video->eclk);
1636 if (rc)
1637 return rc;
1638
1639 video->vclk = devm_clk_get(dev, "vclk");
1640 if (IS_ERR(video->vclk)) {
1641 dev_err(dev, "Unable to get VCLK\n");
1642 rc = PTR_ERR(video->vclk);
1643 goto err_unprepare_eclk;
1644 }
1645
1646 rc = clk_prepare(video->vclk);
1647 if (rc)
1648 goto err_unprepare_eclk;
1649
1650 of_reserved_mem_device_init(dev);
1651
1652 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
1653 if (rc) {
1654 dev_err(dev, "Failed to set DMA mask\n");
1655 goto err_release_reserved_mem;
1656 }
1657
1658 if (!aspeed_video_alloc_buf(video, &video->jpeg,
1659 VE_JPEG_HEADER_SIZE)) {
1660 dev_err(dev, "Failed to allocate DMA for JPEG header\n");
1661 rc = -ENOMEM;
1662 goto err_release_reserved_mem;
1663 }
1664
1665 aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
1666
1667 return 0;
1668
1669 err_release_reserved_mem:
1670 of_reserved_mem_device_release(dev);
1671 clk_unprepare(video->vclk);
1672 err_unprepare_eclk:
1673 clk_unprepare(video->eclk);
1674
1675 return rc;
1676 }
1677
1678 static const struct of_device_id aspeed_video_of_match[] = {
1679 { .compatible = "aspeed,ast2400-video-engine", .data = &ast2400_config },
1680 { .compatible = "aspeed,ast2500-video-engine", .data = &ast2500_config },
1681 { .compatible = "aspeed,ast2600-video-engine", .data = &ast2600_config },
1682 {}
1683 };
1684 MODULE_DEVICE_TABLE(of, aspeed_video_of_match);
1685
aspeed_video_probe(struct platform_device * pdev)1686 static int aspeed_video_probe(struct platform_device *pdev)
1687 {
1688 const struct aspeed_video_config *config;
1689 const struct of_device_id *match;
1690 struct aspeed_video *video;
1691 int rc;
1692
1693 video = devm_kzalloc(&pdev->dev, sizeof(*video), GFP_KERNEL);
1694 if (!video)
1695 return -ENOMEM;
1696
1697 video->base = devm_platform_ioremap_resource(pdev, 0);
1698 if (IS_ERR(video->base))
1699 return PTR_ERR(video->base);
1700
1701 match = of_match_node(aspeed_video_of_match, pdev->dev.of_node);
1702 if (!match)
1703 return -EINVAL;
1704
1705 config = match->data;
1706 video->jpeg_mode = config->jpeg_mode;
1707 video->comp_size_read = config->comp_size_read;
1708
1709 video->frame_rate = 30;
1710 video->dev = &pdev->dev;
1711 spin_lock_init(&video->lock);
1712 mutex_init(&video->video_lock);
1713 init_waitqueue_head(&video->wait);
1714 INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work);
1715 INIT_LIST_HEAD(&video->buffers);
1716
1717 rc = aspeed_video_init(video);
1718 if (rc)
1719 return rc;
1720
1721 rc = aspeed_video_setup_video(video);
1722 if (rc) {
1723 clk_unprepare(video->vclk);
1724 clk_unprepare(video->eclk);
1725 return rc;
1726 }
1727
1728 return 0;
1729 }
1730
aspeed_video_remove(struct platform_device * pdev)1731 static int aspeed_video_remove(struct platform_device *pdev)
1732 {
1733 struct device *dev = &pdev->dev;
1734 struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
1735 struct aspeed_video *video = to_aspeed_video(v4l2_dev);
1736
1737 aspeed_video_off(video);
1738
1739 clk_unprepare(video->vclk);
1740 clk_unprepare(video->eclk);
1741
1742 vb2_video_unregister_device(&video->vdev);
1743
1744 v4l2_ctrl_handler_free(&video->ctrl_handler);
1745
1746 v4l2_device_unregister(v4l2_dev);
1747
1748 dma_free_coherent(video->dev, VE_JPEG_HEADER_SIZE, video->jpeg.virt,
1749 video->jpeg.dma);
1750
1751 of_reserved_mem_device_release(dev);
1752
1753 return 0;
1754 }
1755
1756 static struct platform_driver aspeed_video_driver = {
1757 .driver = {
1758 .name = DEVICE_NAME,
1759 .of_match_table = aspeed_video_of_match,
1760 },
1761 .probe = aspeed_video_probe,
1762 .remove = aspeed_video_remove,
1763 };
1764
1765 module_platform_driver(aspeed_video_driver);
1766
1767 MODULE_DESCRIPTION("ASPEED Video Engine Driver");
1768 MODULE_AUTHOR("Eddie James");
1769 MODULE_LICENSE("GPL v2");
1770