1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
4 */
5
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8 #ifdef CONFIG_RFS_ACCEL
9 #include <linux/cpu_rmap.h>
10 #endif /* CONFIG_RFS_ACCEL */
11 #include <linux/ethtool.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/numa.h>
15 #include <linux/pci.h>
16 #include <linux/utsname.h>
17 #include <linux/version.h>
18 #include <linux/vmalloc.h>
19 #include <net/ip.h>
20
21 #include "ena_netdev.h"
22 #include <linux/bpf_trace.h>
23 #include "ena_pci_id_tbl.h"
24
25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
26 MODULE_DESCRIPTION(DEVICE_NAME);
27 MODULE_LICENSE("GPL");
28
29 /* Time in jiffies before concluding the transmitter is hung. */
30 #define TX_TIMEOUT (5 * HZ)
31
32 #define ENA_NAPI_BUDGET 64
33
34 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
35 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
36 static int debug = -1;
37 module_param(debug, int, 0);
38 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
39
40 static struct ena_aenq_handlers aenq_handlers;
41
42 static struct workqueue_struct *ena_wq;
43
44 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
45
46 static int ena_rss_init_default(struct ena_adapter *adapter);
47 static void check_for_admin_com_state(struct ena_adapter *adapter);
48 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
49 static int ena_restore_device(struct ena_adapter *adapter);
50
51 static void ena_init_io_rings(struct ena_adapter *adapter,
52 int first_index, int count);
53 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
54 int count);
55 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
56 int count);
57 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
58 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
59 int first_index,
60 int count);
61 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
62 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
63 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
64 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
65 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
66 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
67 int first_index, int count);
68 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
69 int first_index, int count);
70 static int ena_up(struct ena_adapter *adapter);
71 static void ena_down(struct ena_adapter *adapter);
72 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
73 struct ena_ring *rx_ring);
74 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
75 struct ena_ring *rx_ring);
76 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
77 struct ena_tx_buffer *tx_info);
78 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
79 int first_index, int count);
80
ena_tx_timeout(struct net_device * dev,unsigned int txqueue)81 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
82 {
83 struct ena_adapter *adapter = netdev_priv(dev);
84
85 /* Change the state of the device to trigger reset
86 * Check that we are not in the middle or a trigger already
87 */
88
89 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
90 return;
91
92 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
93 u64_stats_update_begin(&adapter->syncp);
94 adapter->dev_stats.tx_timeout++;
95 u64_stats_update_end(&adapter->syncp);
96
97 netif_err(adapter, tx_err, dev, "Transmit time out\n");
98 }
99
update_rx_ring_mtu(struct ena_adapter * adapter,int mtu)100 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
101 {
102 int i;
103
104 for (i = 0; i < adapter->num_io_queues; i++)
105 adapter->rx_ring[i].mtu = mtu;
106 }
107
ena_change_mtu(struct net_device * dev,int new_mtu)108 static int ena_change_mtu(struct net_device *dev, int new_mtu)
109 {
110 struct ena_adapter *adapter = netdev_priv(dev);
111 int ret;
112
113 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
114 if (!ret) {
115 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu);
116 update_rx_ring_mtu(adapter, new_mtu);
117 dev->mtu = new_mtu;
118 } else {
119 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
120 new_mtu);
121 }
122
123 return ret;
124 }
125
ena_xmit_common(struct net_device * dev,struct ena_ring * ring,struct ena_tx_buffer * tx_info,struct ena_com_tx_ctx * ena_tx_ctx,u16 next_to_use,u32 bytes)126 static int ena_xmit_common(struct net_device *dev,
127 struct ena_ring *ring,
128 struct ena_tx_buffer *tx_info,
129 struct ena_com_tx_ctx *ena_tx_ctx,
130 u16 next_to_use,
131 u32 bytes)
132 {
133 struct ena_adapter *adapter = netdev_priv(dev);
134 int rc, nb_hw_desc;
135
136 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
137 ena_tx_ctx))) {
138 netif_dbg(adapter, tx_queued, dev,
139 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
140 ring->qid);
141 ena_com_write_sq_doorbell(ring->ena_com_io_sq);
142 }
143
144 /* prepare the packet's descriptors to dma engine */
145 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
146 &nb_hw_desc);
147
148 /* In case there isn't enough space in the queue for the packet,
149 * we simply drop it. All other failure reasons of
150 * ena_com_prepare_tx() are fatal and therefore require a device reset.
151 */
152 if (unlikely(rc)) {
153 netif_err(adapter, tx_queued, dev,
154 "Failed to prepare tx bufs\n");
155 u64_stats_update_begin(&ring->syncp);
156 ring->tx_stats.prepare_ctx_err++;
157 u64_stats_update_end(&ring->syncp);
158 if (rc != -ENOMEM) {
159 adapter->reset_reason =
160 ENA_REGS_RESET_DRIVER_INVALID_STATE;
161 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
162 }
163 return rc;
164 }
165
166 u64_stats_update_begin(&ring->syncp);
167 ring->tx_stats.cnt++;
168 ring->tx_stats.bytes += bytes;
169 u64_stats_update_end(&ring->syncp);
170
171 tx_info->tx_descs = nb_hw_desc;
172 tx_info->last_jiffies = jiffies;
173 tx_info->print_once = 0;
174
175 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
176 ring->ring_size);
177 return 0;
178 }
179
180 /* This is the XDP napi callback. XDP queues use a separate napi callback
181 * than Rx/Tx queues.
182 */
ena_xdp_io_poll(struct napi_struct * napi,int budget)183 static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
184 {
185 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
186 u32 xdp_work_done, xdp_budget;
187 struct ena_ring *xdp_ring;
188 int napi_comp_call = 0;
189 int ret;
190
191 xdp_ring = ena_napi->xdp_ring;
192 xdp_ring->first_interrupt = ena_napi->first_interrupt;
193
194 xdp_budget = budget;
195
196 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
197 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
198 napi_complete_done(napi, 0);
199 return 0;
200 }
201
202 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
203
204 /* If the device is about to reset or down, avoid unmask
205 * the interrupt and return 0 so NAPI won't reschedule
206 */
207 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
208 napi_complete_done(napi, 0);
209 ret = 0;
210 } else if (xdp_budget > xdp_work_done) {
211 napi_comp_call = 1;
212 if (napi_complete_done(napi, xdp_work_done))
213 ena_unmask_interrupt(xdp_ring, NULL);
214 ena_update_ring_numa_node(xdp_ring, NULL);
215 ret = xdp_work_done;
216 } else {
217 ret = xdp_budget;
218 }
219
220 u64_stats_update_begin(&xdp_ring->syncp);
221 xdp_ring->tx_stats.napi_comp += napi_comp_call;
222 xdp_ring->tx_stats.tx_poll++;
223 u64_stats_update_end(&xdp_ring->syncp);
224
225 return ret;
226 }
227
ena_xdp_tx_map_buff(struct ena_ring * xdp_ring,struct ena_tx_buffer * tx_info,struct xdp_buff * xdp,void ** push_hdr,u32 * push_len)228 static int ena_xdp_tx_map_buff(struct ena_ring *xdp_ring,
229 struct ena_tx_buffer *tx_info,
230 struct xdp_buff *xdp,
231 void **push_hdr,
232 u32 *push_len)
233 {
234 struct ena_adapter *adapter = xdp_ring->adapter;
235 struct ena_com_buf *ena_buf;
236 dma_addr_t dma = 0;
237 u32 size;
238
239 tx_info->xdpf = xdp_convert_buff_to_frame(xdp);
240 size = tx_info->xdpf->len;
241 ena_buf = tx_info->bufs;
242
243 /* llq push buffer */
244 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
245 *push_hdr = tx_info->xdpf->data;
246
247 if (size - *push_len > 0) {
248 dma = dma_map_single(xdp_ring->dev,
249 *push_hdr + *push_len,
250 size - *push_len,
251 DMA_TO_DEVICE);
252 if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
253 goto error_report_dma_error;
254
255 tx_info->map_linear_data = 1;
256 tx_info->num_of_bufs = 1;
257 }
258
259 ena_buf->paddr = dma;
260 ena_buf->len = size;
261
262 return 0;
263
264 error_report_dma_error:
265 u64_stats_update_begin(&xdp_ring->syncp);
266 xdp_ring->tx_stats.dma_mapping_err++;
267 u64_stats_update_end(&xdp_ring->syncp);
268 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n");
269
270 xdp_return_frame_rx_napi(tx_info->xdpf);
271 tx_info->xdpf = NULL;
272 tx_info->num_of_bufs = 0;
273
274 return -EINVAL;
275 }
276
ena_xdp_xmit_buff(struct net_device * dev,struct xdp_buff * xdp,int qid,struct ena_rx_buffer * rx_info)277 static int ena_xdp_xmit_buff(struct net_device *dev,
278 struct xdp_buff *xdp,
279 int qid,
280 struct ena_rx_buffer *rx_info)
281 {
282 struct ena_adapter *adapter = netdev_priv(dev);
283 struct ena_com_tx_ctx ena_tx_ctx = {};
284 struct ena_tx_buffer *tx_info;
285 struct ena_ring *xdp_ring;
286 u16 next_to_use, req_id;
287 int rc;
288 void *push_hdr;
289 u32 push_len;
290
291 xdp_ring = &adapter->tx_ring[qid];
292 next_to_use = xdp_ring->next_to_use;
293 req_id = xdp_ring->free_ids[next_to_use];
294 tx_info = &xdp_ring->tx_buffer_info[req_id];
295 tx_info->num_of_bufs = 0;
296 page_ref_inc(rx_info->page);
297 tx_info->xdp_rx_page = rx_info->page;
298
299 rc = ena_xdp_tx_map_buff(xdp_ring, tx_info, xdp, &push_hdr, &push_len);
300 if (unlikely(rc))
301 goto error_drop_packet;
302
303 ena_tx_ctx.ena_bufs = tx_info->bufs;
304 ena_tx_ctx.push_header = push_hdr;
305 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
306 ena_tx_ctx.req_id = req_id;
307 ena_tx_ctx.header_len = push_len;
308
309 rc = ena_xmit_common(dev,
310 xdp_ring,
311 tx_info,
312 &ena_tx_ctx,
313 next_to_use,
314 xdp->data_end - xdp->data);
315 if (rc)
316 goto error_unmap_dma;
317 /* trigger the dma engine. ena_com_write_sq_doorbell()
318 * has a mb
319 */
320 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq);
321 u64_stats_update_begin(&xdp_ring->syncp);
322 xdp_ring->tx_stats.doorbells++;
323 u64_stats_update_end(&xdp_ring->syncp);
324
325 return NETDEV_TX_OK;
326
327 error_unmap_dma:
328 ena_unmap_tx_buff(xdp_ring, tx_info);
329 tx_info->xdpf = NULL;
330 error_drop_packet:
331 __free_page(tx_info->xdp_rx_page);
332 return NETDEV_TX_OK;
333 }
334
ena_xdp_execute(struct ena_ring * rx_ring,struct xdp_buff * xdp,struct ena_rx_buffer * rx_info)335 static int ena_xdp_execute(struct ena_ring *rx_ring,
336 struct xdp_buff *xdp,
337 struct ena_rx_buffer *rx_info)
338 {
339 struct bpf_prog *xdp_prog;
340 u32 verdict = XDP_PASS;
341 u64 *xdp_stat;
342
343 rcu_read_lock();
344 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
345
346 if (!xdp_prog)
347 goto out;
348
349 verdict = bpf_prog_run_xdp(xdp_prog, xdp);
350
351 if (verdict == XDP_TX) {
352 ena_xdp_xmit_buff(rx_ring->netdev,
353 xdp,
354 rx_ring->qid + rx_ring->adapter->num_io_queues,
355 rx_info);
356
357 xdp_stat = &rx_ring->rx_stats.xdp_tx;
358 } else if (unlikely(verdict == XDP_ABORTED)) {
359 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
360 xdp_stat = &rx_ring->rx_stats.xdp_aborted;
361 } else if (unlikely(verdict == XDP_DROP)) {
362 xdp_stat = &rx_ring->rx_stats.xdp_drop;
363 } else if (unlikely(verdict == XDP_PASS)) {
364 xdp_stat = &rx_ring->rx_stats.xdp_pass;
365 } else {
366 bpf_warn_invalid_xdp_action(verdict);
367 xdp_stat = &rx_ring->rx_stats.xdp_invalid;
368 }
369
370 u64_stats_update_begin(&rx_ring->syncp);
371 (*xdp_stat)++;
372 u64_stats_update_end(&rx_ring->syncp);
373 out:
374 rcu_read_unlock();
375
376 return verdict;
377 }
378
ena_init_all_xdp_queues(struct ena_adapter * adapter)379 static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
380 {
381 adapter->xdp_first_ring = adapter->num_io_queues;
382 adapter->xdp_num_queues = adapter->num_io_queues;
383
384 ena_init_io_rings(adapter,
385 adapter->xdp_first_ring,
386 adapter->xdp_num_queues);
387 }
388
ena_setup_and_create_all_xdp_queues(struct ena_adapter * adapter)389 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
390 {
391 int rc = 0;
392
393 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
394 adapter->xdp_num_queues);
395 if (rc)
396 goto setup_err;
397
398 rc = ena_create_io_tx_queues_in_range(adapter,
399 adapter->xdp_first_ring,
400 adapter->xdp_num_queues);
401 if (rc)
402 goto create_err;
403
404 return 0;
405
406 create_err:
407 ena_free_all_io_tx_resources(adapter);
408 setup_err:
409 return rc;
410 }
411
412 /* Provides a way for both kernel and bpf-prog to know
413 * more about the RX-queue a given XDP frame arrived on.
414 */
ena_xdp_register_rxq_info(struct ena_ring * rx_ring)415 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
416 {
417 int rc;
418
419 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid);
420
421 if (rc) {
422 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
423 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
424 rx_ring->qid, rc);
425 goto err;
426 }
427
428 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
429 NULL);
430
431 if (rc) {
432 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
433 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
434 rx_ring->qid, rc);
435 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
436 }
437
438 err:
439 return rc;
440 }
441
ena_xdp_unregister_rxq_info(struct ena_ring * rx_ring)442 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
443 {
444 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
445 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
446 }
447
ena_xdp_exchange_program_rx_in_range(struct ena_adapter * adapter,struct bpf_prog * prog,int first,int count)448 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
449 struct bpf_prog *prog,
450 int first, int count)
451 {
452 struct ena_ring *rx_ring;
453 int i = 0;
454
455 for (i = first; i < count; i++) {
456 rx_ring = &adapter->rx_ring[i];
457 xchg(&rx_ring->xdp_bpf_prog, prog);
458 if (prog) {
459 ena_xdp_register_rxq_info(rx_ring);
460 rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
461 } else {
462 ena_xdp_unregister_rxq_info(rx_ring);
463 rx_ring->rx_headroom = 0;
464 }
465 }
466 }
467
ena_xdp_exchange_program(struct ena_adapter * adapter,struct bpf_prog * prog)468 static void ena_xdp_exchange_program(struct ena_adapter *adapter,
469 struct bpf_prog *prog)
470 {
471 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
472
473 ena_xdp_exchange_program_rx_in_range(adapter,
474 prog,
475 0,
476 adapter->num_io_queues);
477
478 if (old_bpf_prog)
479 bpf_prog_put(old_bpf_prog);
480 }
481
ena_destroy_and_free_all_xdp_queues(struct ena_adapter * adapter)482 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
483 {
484 bool was_up;
485 int rc;
486
487 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
488
489 if (was_up)
490 ena_down(adapter);
491
492 adapter->xdp_first_ring = 0;
493 adapter->xdp_num_queues = 0;
494 ena_xdp_exchange_program(adapter, NULL);
495 if (was_up) {
496 rc = ena_up(adapter);
497 if (rc)
498 return rc;
499 }
500 return 0;
501 }
502
ena_xdp_set(struct net_device * netdev,struct netdev_bpf * bpf)503 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
504 {
505 struct ena_adapter *adapter = netdev_priv(netdev);
506 struct bpf_prog *prog = bpf->prog;
507 struct bpf_prog *old_bpf_prog;
508 int rc, prev_mtu;
509 bool is_up;
510
511 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
512 rc = ena_xdp_allowed(adapter);
513 if (rc == ENA_XDP_ALLOWED) {
514 old_bpf_prog = adapter->xdp_bpf_prog;
515 if (prog) {
516 if (!is_up) {
517 ena_init_all_xdp_queues(adapter);
518 } else if (!old_bpf_prog) {
519 ena_down(adapter);
520 ena_init_all_xdp_queues(adapter);
521 }
522 ena_xdp_exchange_program(adapter, prog);
523
524 if (is_up && !old_bpf_prog) {
525 rc = ena_up(adapter);
526 if (rc)
527 return rc;
528 }
529 } else if (old_bpf_prog) {
530 rc = ena_destroy_and_free_all_xdp_queues(adapter);
531 if (rc)
532 return rc;
533 }
534
535 prev_mtu = netdev->max_mtu;
536 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
537
538 if (!old_bpf_prog)
539 netif_info(adapter, drv, adapter->netdev,
540 "XDP program is set, changing the max_mtu from %d to %d",
541 prev_mtu, netdev->max_mtu);
542
543 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
544 netif_err(adapter, drv, adapter->netdev,
545 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
546 netdev->mtu, ENA_XDP_MAX_MTU);
547 NL_SET_ERR_MSG_MOD(bpf->extack,
548 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
549 return -EINVAL;
550 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
551 netif_err(adapter, drv, adapter->netdev,
552 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
553 adapter->num_io_queues, adapter->max_num_io_queues);
554 NL_SET_ERR_MSG_MOD(bpf->extack,
555 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
556 return -EINVAL;
557 }
558
559 return 0;
560 }
561
562 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp
563 * program as well as to query the current xdp program id.
564 */
ena_xdp(struct net_device * netdev,struct netdev_bpf * bpf)565 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
566 {
567 switch (bpf->command) {
568 case XDP_SETUP_PROG:
569 return ena_xdp_set(netdev, bpf);
570 default:
571 return -EINVAL;
572 }
573 return 0;
574 }
575
ena_init_rx_cpu_rmap(struct ena_adapter * adapter)576 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
577 {
578 #ifdef CONFIG_RFS_ACCEL
579 u32 i;
580 int rc;
581
582 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
583 if (!adapter->netdev->rx_cpu_rmap)
584 return -ENOMEM;
585 for (i = 0; i < adapter->num_io_queues; i++) {
586 int irq_idx = ENA_IO_IRQ_IDX(i);
587
588 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
589 pci_irq_vector(adapter->pdev, irq_idx));
590 if (rc) {
591 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
592 adapter->netdev->rx_cpu_rmap = NULL;
593 return rc;
594 }
595 }
596 #endif /* CONFIG_RFS_ACCEL */
597 return 0;
598 }
599
ena_init_io_rings_common(struct ena_adapter * adapter,struct ena_ring * ring,u16 qid)600 static void ena_init_io_rings_common(struct ena_adapter *adapter,
601 struct ena_ring *ring, u16 qid)
602 {
603 ring->qid = qid;
604 ring->pdev = adapter->pdev;
605 ring->dev = &adapter->pdev->dev;
606 ring->netdev = adapter->netdev;
607 ring->napi = &adapter->ena_napi[qid].napi;
608 ring->adapter = adapter;
609 ring->ena_dev = adapter->ena_dev;
610 ring->per_napi_packets = 0;
611 ring->cpu = 0;
612 ring->first_interrupt = false;
613 ring->no_interrupt_event_cnt = 0;
614 u64_stats_init(&ring->syncp);
615 }
616
ena_init_io_rings(struct ena_adapter * adapter,int first_index,int count)617 static void ena_init_io_rings(struct ena_adapter *adapter,
618 int first_index, int count)
619 {
620 struct ena_com_dev *ena_dev;
621 struct ena_ring *txr, *rxr;
622 int i;
623
624 ena_dev = adapter->ena_dev;
625
626 for (i = first_index; i < first_index + count; i++) {
627 txr = &adapter->tx_ring[i];
628 rxr = &adapter->rx_ring[i];
629
630 /* TX common ring state */
631 ena_init_io_rings_common(adapter, txr, i);
632
633 /* TX specific ring state */
634 txr->ring_size = adapter->requested_tx_ring_size;
635 txr->tx_max_header_size = ena_dev->tx_max_header_size;
636 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
637 txr->sgl_size = adapter->max_tx_sgl_size;
638 txr->smoothed_interval =
639 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
640 txr->disable_meta_caching = adapter->disable_meta_caching;
641
642 /* Don't init RX queues for xdp queues */
643 if (!ENA_IS_XDP_INDEX(adapter, i)) {
644 /* RX common ring state */
645 ena_init_io_rings_common(adapter, rxr, i);
646
647 /* RX specific ring state */
648 rxr->ring_size = adapter->requested_rx_ring_size;
649 rxr->rx_copybreak = adapter->rx_copybreak;
650 rxr->sgl_size = adapter->max_rx_sgl_size;
651 rxr->smoothed_interval =
652 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
653 rxr->empty_rx_queue = 0;
654 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
655 }
656 }
657 }
658
659 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
660 * @adapter: network interface device structure
661 * @qid: queue index
662 *
663 * Return 0 on success, negative on failure
664 */
ena_setup_tx_resources(struct ena_adapter * adapter,int qid)665 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
666 {
667 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
668 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
669 int size, i, node;
670
671 if (tx_ring->tx_buffer_info) {
672 netif_err(adapter, ifup,
673 adapter->netdev, "tx_buffer_info info is not NULL");
674 return -EEXIST;
675 }
676
677 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
678 node = cpu_to_node(ena_irq->cpu);
679
680 tx_ring->tx_buffer_info = vzalloc_node(size, node);
681 if (!tx_ring->tx_buffer_info) {
682 tx_ring->tx_buffer_info = vzalloc(size);
683 if (!tx_ring->tx_buffer_info)
684 goto err_tx_buffer_info;
685 }
686
687 size = sizeof(u16) * tx_ring->ring_size;
688 tx_ring->free_ids = vzalloc_node(size, node);
689 if (!tx_ring->free_ids) {
690 tx_ring->free_ids = vzalloc(size);
691 if (!tx_ring->free_ids)
692 goto err_tx_free_ids;
693 }
694
695 size = tx_ring->tx_max_header_size;
696 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
697 if (!tx_ring->push_buf_intermediate_buf) {
698 tx_ring->push_buf_intermediate_buf = vzalloc(size);
699 if (!tx_ring->push_buf_intermediate_buf)
700 goto err_push_buf_intermediate_buf;
701 }
702
703 /* Req id ring for TX out of order completions */
704 for (i = 0; i < tx_ring->ring_size; i++)
705 tx_ring->free_ids[i] = i;
706
707 /* Reset tx statistics */
708 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
709
710 tx_ring->next_to_use = 0;
711 tx_ring->next_to_clean = 0;
712 tx_ring->cpu = ena_irq->cpu;
713 return 0;
714
715 err_push_buf_intermediate_buf:
716 vfree(tx_ring->free_ids);
717 tx_ring->free_ids = NULL;
718 err_tx_free_ids:
719 vfree(tx_ring->tx_buffer_info);
720 tx_ring->tx_buffer_info = NULL;
721 err_tx_buffer_info:
722 return -ENOMEM;
723 }
724
725 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
726 * @adapter: network interface device structure
727 * @qid: queue index
728 *
729 * Free all transmit software resources
730 */
ena_free_tx_resources(struct ena_adapter * adapter,int qid)731 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
732 {
733 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
734
735 vfree(tx_ring->tx_buffer_info);
736 tx_ring->tx_buffer_info = NULL;
737
738 vfree(tx_ring->free_ids);
739 tx_ring->free_ids = NULL;
740
741 vfree(tx_ring->push_buf_intermediate_buf);
742 tx_ring->push_buf_intermediate_buf = NULL;
743 }
744
ena_setup_tx_resources_in_range(struct ena_adapter * adapter,int first_index,int count)745 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
746 int first_index,
747 int count)
748 {
749 int i, rc = 0;
750
751 for (i = first_index; i < first_index + count; i++) {
752 rc = ena_setup_tx_resources(adapter, i);
753 if (rc)
754 goto err_setup_tx;
755 }
756
757 return 0;
758
759 err_setup_tx:
760
761 netif_err(adapter, ifup, adapter->netdev,
762 "Tx queue %d: allocation failed\n", i);
763
764 /* rewind the index freeing the rings as we go */
765 while (first_index < i--)
766 ena_free_tx_resources(adapter, i);
767 return rc;
768 }
769
ena_free_all_io_tx_resources_in_range(struct ena_adapter * adapter,int first_index,int count)770 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
771 int first_index, int count)
772 {
773 int i;
774
775 for (i = first_index; i < first_index + count; i++)
776 ena_free_tx_resources(adapter, i);
777 }
778
779 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
780 * @adapter: board private structure
781 *
782 * Free all transmit software resources
783 */
ena_free_all_io_tx_resources(struct ena_adapter * adapter)784 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
785 {
786 ena_free_all_io_tx_resources_in_range(adapter,
787 0,
788 adapter->xdp_num_queues +
789 adapter->num_io_queues);
790 }
791
792 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
793 * @adapter: network interface device structure
794 * @qid: queue index
795 *
796 * Returns 0 on success, negative on failure
797 */
ena_setup_rx_resources(struct ena_adapter * adapter,u32 qid)798 static int ena_setup_rx_resources(struct ena_adapter *adapter,
799 u32 qid)
800 {
801 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
802 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
803 int size, node, i;
804
805 if (rx_ring->rx_buffer_info) {
806 netif_err(adapter, ifup, adapter->netdev,
807 "rx_buffer_info is not NULL");
808 return -EEXIST;
809 }
810
811 /* alloc extra element so in rx path
812 * we can always prefetch rx_info + 1
813 */
814 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
815 node = cpu_to_node(ena_irq->cpu);
816
817 rx_ring->rx_buffer_info = vzalloc_node(size, node);
818 if (!rx_ring->rx_buffer_info) {
819 rx_ring->rx_buffer_info = vzalloc(size);
820 if (!rx_ring->rx_buffer_info)
821 return -ENOMEM;
822 }
823
824 size = sizeof(u16) * rx_ring->ring_size;
825 rx_ring->free_ids = vzalloc_node(size, node);
826 if (!rx_ring->free_ids) {
827 rx_ring->free_ids = vzalloc(size);
828 if (!rx_ring->free_ids) {
829 vfree(rx_ring->rx_buffer_info);
830 rx_ring->rx_buffer_info = NULL;
831 return -ENOMEM;
832 }
833 }
834
835 /* Req id ring for receiving RX pkts out of order */
836 for (i = 0; i < rx_ring->ring_size; i++)
837 rx_ring->free_ids[i] = i;
838
839 /* Reset rx statistics */
840 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
841
842 rx_ring->next_to_clean = 0;
843 rx_ring->next_to_use = 0;
844 rx_ring->cpu = ena_irq->cpu;
845
846 return 0;
847 }
848
849 /* ena_free_rx_resources - Free I/O Rx Resources
850 * @adapter: network interface device structure
851 * @qid: queue index
852 *
853 * Free all receive software resources
854 */
ena_free_rx_resources(struct ena_adapter * adapter,u32 qid)855 static void ena_free_rx_resources(struct ena_adapter *adapter,
856 u32 qid)
857 {
858 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
859
860 vfree(rx_ring->rx_buffer_info);
861 rx_ring->rx_buffer_info = NULL;
862
863 vfree(rx_ring->free_ids);
864 rx_ring->free_ids = NULL;
865 }
866
867 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
868 * @adapter: board private structure
869 *
870 * Return 0 on success, negative on failure
871 */
ena_setup_all_rx_resources(struct ena_adapter * adapter)872 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
873 {
874 int i, rc = 0;
875
876 for (i = 0; i < adapter->num_io_queues; i++) {
877 rc = ena_setup_rx_resources(adapter, i);
878 if (rc)
879 goto err_setup_rx;
880 }
881
882 return 0;
883
884 err_setup_rx:
885
886 netif_err(adapter, ifup, adapter->netdev,
887 "Rx queue %d: allocation failed\n", i);
888
889 /* rewind the index freeing the rings as we go */
890 while (i--)
891 ena_free_rx_resources(adapter, i);
892 return rc;
893 }
894
895 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
896 * @adapter: board private structure
897 *
898 * Free all receive software resources
899 */
ena_free_all_io_rx_resources(struct ena_adapter * adapter)900 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
901 {
902 int i;
903
904 for (i = 0; i < adapter->num_io_queues; i++)
905 ena_free_rx_resources(adapter, i);
906 }
907
ena_alloc_rx_page(struct ena_ring * rx_ring,struct ena_rx_buffer * rx_info,gfp_t gfp)908 static int ena_alloc_rx_page(struct ena_ring *rx_ring,
909 struct ena_rx_buffer *rx_info, gfp_t gfp)
910 {
911 int headroom = rx_ring->rx_headroom;
912 struct ena_com_buf *ena_buf;
913 struct page *page;
914 dma_addr_t dma;
915
916 /* restore page offset value in case it has been changed by device */
917 rx_info->page_offset = headroom;
918
919 /* if previous allocated page is not used */
920 if (unlikely(rx_info->page))
921 return 0;
922
923 page = alloc_page(gfp);
924 if (unlikely(!page)) {
925 u64_stats_update_begin(&rx_ring->syncp);
926 rx_ring->rx_stats.page_alloc_fail++;
927 u64_stats_update_end(&rx_ring->syncp);
928 return -ENOMEM;
929 }
930
931 /* To enable NIC-side port-mirroring, AKA SPAN port,
932 * we make the buffer readable from the nic as well
933 */
934 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
935 DMA_BIDIRECTIONAL);
936 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
937 u64_stats_update_begin(&rx_ring->syncp);
938 rx_ring->rx_stats.dma_mapping_err++;
939 u64_stats_update_end(&rx_ring->syncp);
940
941 __free_page(page);
942 return -EIO;
943 }
944 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
945 "Allocate page %p, rx_info %p\n", page, rx_info);
946
947 rx_info->page = page;
948 ena_buf = &rx_info->ena_buf;
949 ena_buf->paddr = dma + headroom;
950 ena_buf->len = ENA_PAGE_SIZE - headroom;
951
952 return 0;
953 }
954
ena_free_rx_page(struct ena_ring * rx_ring,struct ena_rx_buffer * rx_info)955 static void ena_free_rx_page(struct ena_ring *rx_ring,
956 struct ena_rx_buffer *rx_info)
957 {
958 struct page *page = rx_info->page;
959 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
960
961 if (unlikely(!page)) {
962 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
963 "Trying to free unallocated buffer\n");
964 return;
965 }
966
967 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom,
968 ENA_PAGE_SIZE,
969 DMA_BIDIRECTIONAL);
970
971 __free_page(page);
972 rx_info->page = NULL;
973 }
974
ena_refill_rx_bufs(struct ena_ring * rx_ring,u32 num)975 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
976 {
977 u16 next_to_use, req_id;
978 u32 i;
979 int rc;
980
981 next_to_use = rx_ring->next_to_use;
982
983 for (i = 0; i < num; i++) {
984 struct ena_rx_buffer *rx_info;
985
986 req_id = rx_ring->free_ids[next_to_use];
987
988 rx_info = &rx_ring->rx_buffer_info[req_id];
989
990 rc = ena_alloc_rx_page(rx_ring, rx_info,
991 GFP_ATOMIC | __GFP_COMP);
992 if (unlikely(rc < 0)) {
993 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
994 "Failed to allocate buffer for rx queue %d\n",
995 rx_ring->qid);
996 break;
997 }
998 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
999 &rx_info->ena_buf,
1000 req_id);
1001 if (unlikely(rc)) {
1002 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1003 "Failed to add buffer for rx queue %d\n",
1004 rx_ring->qid);
1005 break;
1006 }
1007 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1008 rx_ring->ring_size);
1009 }
1010
1011 if (unlikely(i < num)) {
1012 u64_stats_update_begin(&rx_ring->syncp);
1013 rx_ring->rx_stats.refil_partial++;
1014 u64_stats_update_end(&rx_ring->syncp);
1015 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1016 "Refilled rx qid %d with only %d buffers (from %d)\n",
1017 rx_ring->qid, i, num);
1018 }
1019
1020 /* ena_com_write_sq_doorbell issues a wmb() */
1021 if (likely(i))
1022 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1023
1024 rx_ring->next_to_use = next_to_use;
1025
1026 return i;
1027 }
1028
ena_free_rx_bufs(struct ena_adapter * adapter,u32 qid)1029 static void ena_free_rx_bufs(struct ena_adapter *adapter,
1030 u32 qid)
1031 {
1032 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1033 u32 i;
1034
1035 for (i = 0; i < rx_ring->ring_size; i++) {
1036 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1037
1038 if (rx_info->page)
1039 ena_free_rx_page(rx_ring, rx_info);
1040 }
1041 }
1042
1043 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
1044 * @adapter: board private structure
1045 */
ena_refill_all_rx_bufs(struct ena_adapter * adapter)1046 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1047 {
1048 struct ena_ring *rx_ring;
1049 int i, rc, bufs_num;
1050
1051 for (i = 0; i < adapter->num_io_queues; i++) {
1052 rx_ring = &adapter->rx_ring[i];
1053 bufs_num = rx_ring->ring_size - 1;
1054 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1055
1056 if (unlikely(rc != bufs_num))
1057 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1058 "Refilling Queue %d failed. allocated %d buffers from: %d\n",
1059 i, rc, bufs_num);
1060 }
1061 }
1062
ena_free_all_rx_bufs(struct ena_adapter * adapter)1063 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1064 {
1065 int i;
1066
1067 for (i = 0; i < adapter->num_io_queues; i++)
1068 ena_free_rx_bufs(adapter, i);
1069 }
1070
ena_unmap_tx_buff(struct ena_ring * tx_ring,struct ena_tx_buffer * tx_info)1071 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1072 struct ena_tx_buffer *tx_info)
1073 {
1074 struct ena_com_buf *ena_buf;
1075 u32 cnt;
1076 int i;
1077
1078 ena_buf = tx_info->bufs;
1079 cnt = tx_info->num_of_bufs;
1080
1081 if (unlikely(!cnt))
1082 return;
1083
1084 if (tx_info->map_linear_data) {
1085 dma_unmap_single(tx_ring->dev,
1086 dma_unmap_addr(ena_buf, paddr),
1087 dma_unmap_len(ena_buf, len),
1088 DMA_TO_DEVICE);
1089 ena_buf++;
1090 cnt--;
1091 }
1092
1093 /* unmap remaining mapped pages */
1094 for (i = 0; i < cnt; i++) {
1095 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1096 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1097 ena_buf++;
1098 }
1099 }
1100
1101 /* ena_free_tx_bufs - Free Tx Buffers per Queue
1102 * @tx_ring: TX ring for which buffers be freed
1103 */
ena_free_tx_bufs(struct ena_ring * tx_ring)1104 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1105 {
1106 bool print_once = true;
1107 u32 i;
1108
1109 for (i = 0; i < tx_ring->ring_size; i++) {
1110 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1111
1112 if (!tx_info->skb)
1113 continue;
1114
1115 if (print_once) {
1116 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev,
1117 "Free uncompleted tx skb qid %d idx 0x%x\n",
1118 tx_ring->qid, i);
1119 print_once = false;
1120 } else {
1121 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev,
1122 "Free uncompleted tx skb qid %d idx 0x%x\n",
1123 tx_ring->qid, i);
1124 }
1125
1126 ena_unmap_tx_buff(tx_ring, tx_info);
1127
1128 dev_kfree_skb_any(tx_info->skb);
1129 }
1130 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1131 tx_ring->qid));
1132 }
1133
ena_free_all_tx_bufs(struct ena_adapter * adapter)1134 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1135 {
1136 struct ena_ring *tx_ring;
1137 int i;
1138
1139 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1140 tx_ring = &adapter->tx_ring[i];
1141 ena_free_tx_bufs(tx_ring);
1142 }
1143 }
1144
ena_destroy_all_tx_queues(struct ena_adapter * adapter)1145 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1146 {
1147 u16 ena_qid;
1148 int i;
1149
1150 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1151 ena_qid = ENA_IO_TXQ_IDX(i);
1152 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1153 }
1154 }
1155
ena_destroy_all_rx_queues(struct ena_adapter * adapter)1156 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1157 {
1158 u16 ena_qid;
1159 int i;
1160
1161 for (i = 0; i < adapter->num_io_queues; i++) {
1162 ena_qid = ENA_IO_RXQ_IDX(i);
1163 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1164 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1165 }
1166 }
1167
ena_destroy_all_io_queues(struct ena_adapter * adapter)1168 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1169 {
1170 ena_destroy_all_tx_queues(adapter);
1171 ena_destroy_all_rx_queues(adapter);
1172 }
1173
handle_invalid_req_id(struct ena_ring * ring,u16 req_id,struct ena_tx_buffer * tx_info,bool is_xdp)1174 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1175 struct ena_tx_buffer *tx_info, bool is_xdp)
1176 {
1177 if (tx_info)
1178 netif_err(ring->adapter,
1179 tx_done,
1180 ring->netdev,
1181 "tx_info doesn't have valid %s",
1182 is_xdp ? "xdp frame" : "skb");
1183 else
1184 netif_err(ring->adapter,
1185 tx_done,
1186 ring->netdev,
1187 "Invalid req_id: %hu\n",
1188 req_id);
1189
1190 u64_stats_update_begin(&ring->syncp);
1191 ring->tx_stats.bad_req_id++;
1192 u64_stats_update_end(&ring->syncp);
1193
1194 /* Trigger device reset */
1195 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
1196 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags);
1197 return -EFAULT;
1198 }
1199
validate_tx_req_id(struct ena_ring * tx_ring,u16 req_id)1200 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1201 {
1202 struct ena_tx_buffer *tx_info;
1203
1204 tx_info = &tx_ring->tx_buffer_info[req_id];
1205 if (likely(tx_info->skb))
1206 return 0;
1207
1208 return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1209 }
1210
validate_xdp_req_id(struct ena_ring * xdp_ring,u16 req_id)1211 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1212 {
1213 struct ena_tx_buffer *tx_info;
1214
1215 tx_info = &xdp_ring->tx_buffer_info[req_id];
1216 if (likely(tx_info->xdpf))
1217 return 0;
1218
1219 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1220 }
1221
ena_clean_tx_irq(struct ena_ring * tx_ring,u32 budget)1222 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1223 {
1224 struct netdev_queue *txq;
1225 bool above_thresh;
1226 u32 tx_bytes = 0;
1227 u32 total_done = 0;
1228 u16 next_to_clean;
1229 u16 req_id;
1230 int tx_pkts = 0;
1231 int rc;
1232
1233 next_to_clean = tx_ring->next_to_clean;
1234 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1235
1236 while (tx_pkts < budget) {
1237 struct ena_tx_buffer *tx_info;
1238 struct sk_buff *skb;
1239
1240 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1241 &req_id);
1242 if (rc) {
1243 if (unlikely(rc == -EINVAL))
1244 handle_invalid_req_id(tx_ring, req_id, NULL,
1245 false);
1246 break;
1247 }
1248
1249 /* validate that the request id points to a valid skb */
1250 rc = validate_tx_req_id(tx_ring, req_id);
1251 if (rc)
1252 break;
1253
1254 tx_info = &tx_ring->tx_buffer_info[req_id];
1255 skb = tx_info->skb;
1256
1257 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
1258 prefetch(&skb->end);
1259
1260 tx_info->skb = NULL;
1261 tx_info->last_jiffies = 0;
1262
1263 ena_unmap_tx_buff(tx_ring, tx_info);
1264
1265 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1266 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1267 skb);
1268
1269 tx_bytes += skb->len;
1270 dev_kfree_skb(skb);
1271 tx_pkts++;
1272 total_done += tx_info->tx_descs;
1273
1274 tx_ring->free_ids[next_to_clean] = req_id;
1275 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1276 tx_ring->ring_size);
1277 }
1278
1279 tx_ring->next_to_clean = next_to_clean;
1280 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1281 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1282
1283 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1284
1285 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1286 "tx_poll: q %d done. total pkts: %d\n",
1287 tx_ring->qid, tx_pkts);
1288
1289 /* need to make the rings circular update visible to
1290 * ena_start_xmit() before checking for netif_queue_stopped().
1291 */
1292 smp_mb();
1293
1294 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1295 ENA_TX_WAKEUP_THRESH);
1296 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1297 __netif_tx_lock(txq, smp_processor_id());
1298 above_thresh =
1299 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1300 ENA_TX_WAKEUP_THRESH);
1301 if (netif_tx_queue_stopped(txq) && above_thresh &&
1302 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1303 netif_tx_wake_queue(txq);
1304 u64_stats_update_begin(&tx_ring->syncp);
1305 tx_ring->tx_stats.queue_wakeup++;
1306 u64_stats_update_end(&tx_ring->syncp);
1307 }
1308 __netif_tx_unlock(txq);
1309 }
1310
1311 return tx_pkts;
1312 }
1313
ena_alloc_skb(struct ena_ring * rx_ring,bool frags)1314 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
1315 {
1316 struct sk_buff *skb;
1317
1318 if (frags)
1319 skb = napi_get_frags(rx_ring->napi);
1320 else
1321 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1322 rx_ring->rx_copybreak);
1323
1324 if (unlikely(!skb)) {
1325 u64_stats_update_begin(&rx_ring->syncp);
1326 rx_ring->rx_stats.skb_alloc_fail++;
1327 u64_stats_update_end(&rx_ring->syncp);
1328 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1329 "Failed to allocate skb. frags: %d\n", frags);
1330 return NULL;
1331 }
1332
1333 return skb;
1334 }
1335
ena_rx_skb(struct ena_ring * rx_ring,struct ena_com_rx_buf_info * ena_bufs,u32 descs,u16 * next_to_clean)1336 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1337 struct ena_com_rx_buf_info *ena_bufs,
1338 u32 descs,
1339 u16 *next_to_clean)
1340 {
1341 struct sk_buff *skb;
1342 struct ena_rx_buffer *rx_info;
1343 u16 len, req_id, buf = 0;
1344 void *va;
1345
1346 len = ena_bufs[buf].len;
1347 req_id = ena_bufs[buf].req_id;
1348
1349 rx_info = &rx_ring->rx_buffer_info[req_id];
1350
1351 if (unlikely(!rx_info->page)) {
1352 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
1353 "Page is NULL\n");
1354 return NULL;
1355 }
1356
1357 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1358 "rx_info %p page %p\n",
1359 rx_info, rx_info->page);
1360
1361 /* save virt address of first buffer */
1362 va = page_address(rx_info->page) + rx_info->page_offset;
1363
1364 prefetch(va);
1365
1366 if (len <= rx_ring->rx_copybreak) {
1367 skb = ena_alloc_skb(rx_ring, false);
1368 if (unlikely(!skb))
1369 return NULL;
1370
1371 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1372 "RX allocated small packet. len %d. data_len %d\n",
1373 skb->len, skb->data_len);
1374
1375 /* sync this buffer for CPU use */
1376 dma_sync_single_for_cpu(rx_ring->dev,
1377 dma_unmap_addr(&rx_info->ena_buf, paddr),
1378 len,
1379 DMA_FROM_DEVICE);
1380 skb_copy_to_linear_data(skb, va, len);
1381 dma_sync_single_for_device(rx_ring->dev,
1382 dma_unmap_addr(&rx_info->ena_buf, paddr),
1383 len,
1384 DMA_FROM_DEVICE);
1385
1386 skb_put(skb, len);
1387 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1388 rx_ring->free_ids[*next_to_clean] = req_id;
1389 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1390 rx_ring->ring_size);
1391 return skb;
1392 }
1393
1394 skb = ena_alloc_skb(rx_ring, true);
1395 if (unlikely(!skb))
1396 return NULL;
1397
1398 do {
1399 dma_unmap_page(rx_ring->dev,
1400 dma_unmap_addr(&rx_info->ena_buf, paddr),
1401 ENA_PAGE_SIZE, DMA_BIDIRECTIONAL);
1402
1403 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1404 rx_info->page_offset, len, ENA_PAGE_SIZE);
1405
1406 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1407 "RX skb updated. len %d. data_len %d\n",
1408 skb->len, skb->data_len);
1409
1410 rx_info->page = NULL;
1411
1412 rx_ring->free_ids[*next_to_clean] = req_id;
1413 *next_to_clean =
1414 ENA_RX_RING_IDX_NEXT(*next_to_clean,
1415 rx_ring->ring_size);
1416 if (likely(--descs == 0))
1417 break;
1418
1419 buf++;
1420 len = ena_bufs[buf].len;
1421 req_id = ena_bufs[buf].req_id;
1422
1423 rx_info = &rx_ring->rx_buffer_info[req_id];
1424 } while (1);
1425
1426 return skb;
1427 }
1428
1429 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
1430 * @adapter: structure containing adapter specific data
1431 * @ena_rx_ctx: received packet context/metadata
1432 * @skb: skb currently being received and modified
1433 */
ena_rx_checksum(struct ena_ring * rx_ring,struct ena_com_rx_ctx * ena_rx_ctx,struct sk_buff * skb)1434 static void ena_rx_checksum(struct ena_ring *rx_ring,
1435 struct ena_com_rx_ctx *ena_rx_ctx,
1436 struct sk_buff *skb)
1437 {
1438 /* Rx csum disabled */
1439 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1440 skb->ip_summed = CHECKSUM_NONE;
1441 return;
1442 }
1443
1444 /* For fragmented packets the checksum isn't valid */
1445 if (ena_rx_ctx->frag) {
1446 skb->ip_summed = CHECKSUM_NONE;
1447 return;
1448 }
1449
1450 /* if IP and error */
1451 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1452 (ena_rx_ctx->l3_csum_err))) {
1453 /* ipv4 checksum error */
1454 skb->ip_summed = CHECKSUM_NONE;
1455 u64_stats_update_begin(&rx_ring->syncp);
1456 rx_ring->rx_stats.bad_csum++;
1457 u64_stats_update_end(&rx_ring->syncp);
1458 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1459 "RX IPv4 header checksum error\n");
1460 return;
1461 }
1462
1463 /* if TCP/UDP */
1464 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1465 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1466 if (unlikely(ena_rx_ctx->l4_csum_err)) {
1467 /* TCP/UDP checksum error */
1468 u64_stats_update_begin(&rx_ring->syncp);
1469 rx_ring->rx_stats.bad_csum++;
1470 u64_stats_update_end(&rx_ring->syncp);
1471 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1472 "RX L4 checksum error\n");
1473 skb->ip_summed = CHECKSUM_NONE;
1474 return;
1475 }
1476
1477 if (likely(ena_rx_ctx->l4_csum_checked)) {
1478 skb->ip_summed = CHECKSUM_UNNECESSARY;
1479 u64_stats_update_begin(&rx_ring->syncp);
1480 rx_ring->rx_stats.csum_good++;
1481 u64_stats_update_end(&rx_ring->syncp);
1482 } else {
1483 u64_stats_update_begin(&rx_ring->syncp);
1484 rx_ring->rx_stats.csum_unchecked++;
1485 u64_stats_update_end(&rx_ring->syncp);
1486 skb->ip_summed = CHECKSUM_NONE;
1487 }
1488 } else {
1489 skb->ip_summed = CHECKSUM_NONE;
1490 return;
1491 }
1492
1493 }
1494
ena_set_rx_hash(struct ena_ring * rx_ring,struct ena_com_rx_ctx * ena_rx_ctx,struct sk_buff * skb)1495 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1496 struct ena_com_rx_ctx *ena_rx_ctx,
1497 struct sk_buff *skb)
1498 {
1499 enum pkt_hash_types hash_type;
1500
1501 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1502 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1503 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1504
1505 hash_type = PKT_HASH_TYPE_L4;
1506 else
1507 hash_type = PKT_HASH_TYPE_NONE;
1508
1509 /* Override hash type if the packet is fragmented */
1510 if (ena_rx_ctx->frag)
1511 hash_type = PKT_HASH_TYPE_NONE;
1512
1513 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1514 }
1515 }
1516
ena_xdp_handle_buff(struct ena_ring * rx_ring,struct xdp_buff * xdp)1517 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
1518 {
1519 struct ena_rx_buffer *rx_info;
1520 int ret;
1521
1522 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1523 xdp->data = page_address(rx_info->page) + rx_info->page_offset;
1524 xdp_set_data_meta_invalid(xdp);
1525 xdp->data_hard_start = page_address(rx_info->page);
1526 xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len;
1527 /* If for some reason we received a bigger packet than
1528 * we expect, then we simply drop it
1529 */
1530 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1531 return XDP_DROP;
1532
1533 ret = ena_xdp_execute(rx_ring, xdp, rx_info);
1534
1535 /* The xdp program might expand the headers */
1536 if (ret == XDP_PASS) {
1537 rx_info->page_offset = xdp->data - xdp->data_hard_start;
1538 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1539 }
1540
1541 return ret;
1542 }
1543 /* ena_clean_rx_irq - Cleanup RX irq
1544 * @rx_ring: RX ring to clean
1545 * @napi: napi handler
1546 * @budget: how many packets driver is allowed to clean
1547 *
1548 * Returns the number of cleaned buffers.
1549 */
ena_clean_rx_irq(struct ena_ring * rx_ring,struct napi_struct * napi,u32 budget)1550 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1551 u32 budget)
1552 {
1553 u16 next_to_clean = rx_ring->next_to_clean;
1554 struct ena_com_rx_ctx ena_rx_ctx;
1555 struct ena_rx_buffer *rx_info;
1556 struct ena_adapter *adapter;
1557 u32 res_budget, work_done;
1558 int rx_copybreak_pkt = 0;
1559 int refill_threshold;
1560 struct sk_buff *skb;
1561 int refill_required;
1562 struct xdp_buff xdp;
1563 int total_len = 0;
1564 int xdp_verdict;
1565 int rc = 0;
1566 int i;
1567
1568 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1569 "%s qid %d\n", __func__, rx_ring->qid);
1570 res_budget = budget;
1571 xdp.rxq = &rx_ring->xdp_rxq;
1572 xdp.frame_sz = ENA_PAGE_SIZE;
1573
1574 do {
1575 xdp_verdict = XDP_PASS;
1576 skb = NULL;
1577 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1578 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1579 ena_rx_ctx.descs = 0;
1580 ena_rx_ctx.pkt_offset = 0;
1581 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1582 rx_ring->ena_com_io_sq,
1583 &ena_rx_ctx);
1584 if (unlikely(rc))
1585 goto error;
1586
1587 if (unlikely(ena_rx_ctx.descs == 0))
1588 break;
1589
1590 /* First descriptor might have an offset set by the device */
1591 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1592 rx_info->page_offset += ena_rx_ctx.pkt_offset;
1593
1594 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1595 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1596 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1597 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1598
1599 if (ena_xdp_present_ring(rx_ring))
1600 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1601
1602 /* allocate skb and fill it */
1603 if (xdp_verdict == XDP_PASS)
1604 skb = ena_rx_skb(rx_ring,
1605 rx_ring->ena_bufs,
1606 ena_rx_ctx.descs,
1607 &next_to_clean);
1608
1609 if (unlikely(!skb)) {
1610 /* The page might not actually be freed here since the
1611 * page reference count is incremented in
1612 * ena_xdp_xmit_buff(), and it will be decreased only
1613 * when send completion was received from the device
1614 */
1615 if (xdp_verdict == XDP_TX)
1616 ena_free_rx_page(rx_ring,
1617 &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]);
1618 for (i = 0; i < ena_rx_ctx.descs; i++) {
1619 rx_ring->free_ids[next_to_clean] =
1620 rx_ring->ena_bufs[i].req_id;
1621 next_to_clean =
1622 ENA_RX_RING_IDX_NEXT(next_to_clean,
1623 rx_ring->ring_size);
1624 }
1625 if (xdp_verdict != XDP_PASS) {
1626 res_budget--;
1627 continue;
1628 }
1629 break;
1630 }
1631
1632 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1633
1634 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1635
1636 skb_record_rx_queue(skb, rx_ring->qid);
1637
1638 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1639 total_len += rx_ring->ena_bufs[0].len;
1640 rx_copybreak_pkt++;
1641 napi_gro_receive(napi, skb);
1642 } else {
1643 total_len += skb->len;
1644 napi_gro_frags(napi);
1645 }
1646
1647 res_budget--;
1648 } while (likely(res_budget));
1649
1650 work_done = budget - res_budget;
1651 rx_ring->per_napi_packets += work_done;
1652 u64_stats_update_begin(&rx_ring->syncp);
1653 rx_ring->rx_stats.bytes += total_len;
1654 rx_ring->rx_stats.cnt += work_done;
1655 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1656 u64_stats_update_end(&rx_ring->syncp);
1657
1658 rx_ring->next_to_clean = next_to_clean;
1659
1660 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
1661 refill_threshold =
1662 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1663 ENA_RX_REFILL_THRESH_PACKET);
1664
1665 /* Optimization, try to batch new rx buffers */
1666 if (refill_required > refill_threshold) {
1667 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1668 ena_refill_rx_bufs(rx_ring, refill_required);
1669 }
1670
1671 return work_done;
1672
1673 error:
1674 adapter = netdev_priv(rx_ring->netdev);
1675
1676 if (rc == -ENOSPC) {
1677 u64_stats_update_begin(&rx_ring->syncp);
1678 rx_ring->rx_stats.bad_desc_num++;
1679 u64_stats_update_end(&rx_ring->syncp);
1680 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1681 } else {
1682 u64_stats_update_begin(&rx_ring->syncp);
1683 rx_ring->rx_stats.bad_req_id++;
1684 u64_stats_update_end(&rx_ring->syncp);
1685 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
1686 }
1687
1688 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1689
1690 return 0;
1691 }
1692
ena_dim_work(struct work_struct * w)1693 static void ena_dim_work(struct work_struct *w)
1694 {
1695 struct dim *dim = container_of(w, struct dim, work);
1696 struct dim_cq_moder cur_moder =
1697 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1698 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1699
1700 ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1701 dim->state = DIM_START_MEASURE;
1702 }
1703
ena_adjust_adaptive_rx_intr_moderation(struct ena_napi * ena_napi)1704 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1705 {
1706 struct dim_sample dim_sample;
1707 struct ena_ring *rx_ring = ena_napi->rx_ring;
1708
1709 if (!rx_ring->per_napi_packets)
1710 return;
1711
1712 rx_ring->non_empty_napi_events++;
1713
1714 dim_update_sample(rx_ring->non_empty_napi_events,
1715 rx_ring->rx_stats.cnt,
1716 rx_ring->rx_stats.bytes,
1717 &dim_sample);
1718
1719 net_dim(&ena_napi->dim, dim_sample);
1720
1721 rx_ring->per_napi_packets = 0;
1722 }
1723
ena_unmask_interrupt(struct ena_ring * tx_ring,struct ena_ring * rx_ring)1724 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1725 struct ena_ring *rx_ring)
1726 {
1727 struct ena_eth_io_intr_reg intr_reg;
1728 u32 rx_interval = 0;
1729 /* Rx ring can be NULL when for XDP tx queues which don't have an
1730 * accompanying rx_ring pair.
1731 */
1732 if (rx_ring)
1733 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1734 rx_ring->smoothed_interval :
1735 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1736
1737 /* Update intr register: rx intr delay,
1738 * tx intr delay and interrupt unmask
1739 */
1740 ena_com_update_intr_reg(&intr_reg,
1741 rx_interval,
1742 tx_ring->smoothed_interval,
1743 true);
1744
1745 u64_stats_update_begin(&tx_ring->syncp);
1746 tx_ring->tx_stats.unmask_interrupt++;
1747 u64_stats_update_end(&tx_ring->syncp);
1748
1749 /* It is a shared MSI-X.
1750 * Tx and Rx CQ have pointer to it.
1751 * So we use one of them to reach the intr reg
1752 * The Tx ring is used because the rx_ring is NULL for XDP queues
1753 */
1754 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
1755 }
1756
ena_update_ring_numa_node(struct ena_ring * tx_ring,struct ena_ring * rx_ring)1757 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1758 struct ena_ring *rx_ring)
1759 {
1760 int cpu = get_cpu();
1761 int numa_node;
1762
1763 /* Check only one ring since the 2 rings are running on the same cpu */
1764 if (likely(tx_ring->cpu == cpu))
1765 goto out;
1766
1767 numa_node = cpu_to_node(cpu);
1768 put_cpu();
1769
1770 if (numa_node != NUMA_NO_NODE) {
1771 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1772 if (rx_ring)
1773 ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1774 numa_node);
1775 }
1776
1777 tx_ring->cpu = cpu;
1778 if (rx_ring)
1779 rx_ring->cpu = cpu;
1780
1781 return;
1782 out:
1783 put_cpu();
1784 }
1785
ena_clean_xdp_irq(struct ena_ring * xdp_ring,u32 budget)1786 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1787 {
1788 u32 total_done = 0;
1789 u16 next_to_clean;
1790 u32 tx_bytes = 0;
1791 int tx_pkts = 0;
1792 u16 req_id;
1793 int rc;
1794
1795 if (unlikely(!xdp_ring))
1796 return 0;
1797 next_to_clean = xdp_ring->next_to_clean;
1798
1799 while (tx_pkts < budget) {
1800 struct ena_tx_buffer *tx_info;
1801 struct xdp_frame *xdpf;
1802
1803 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1804 &req_id);
1805 if (rc) {
1806 if (unlikely(rc == -EINVAL))
1807 handle_invalid_req_id(xdp_ring, req_id, NULL,
1808 true);
1809 break;
1810 }
1811
1812 /* validate that the request id points to a valid xdp_frame */
1813 rc = validate_xdp_req_id(xdp_ring, req_id);
1814 if (rc)
1815 break;
1816
1817 tx_info = &xdp_ring->tx_buffer_info[req_id];
1818 xdpf = tx_info->xdpf;
1819
1820 tx_info->xdpf = NULL;
1821 tx_info->last_jiffies = 0;
1822 ena_unmap_tx_buff(xdp_ring, tx_info);
1823
1824 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1825 "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1826 xdpf);
1827
1828 tx_bytes += xdpf->len;
1829 tx_pkts++;
1830 total_done += tx_info->tx_descs;
1831
1832 __free_page(tx_info->xdp_rx_page);
1833 xdp_ring->free_ids[next_to_clean] = req_id;
1834 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1835 xdp_ring->ring_size);
1836 }
1837
1838 xdp_ring->next_to_clean = next_to_clean;
1839 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
1840 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
1841
1842 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1843 "tx_poll: q %d done. total pkts: %d\n",
1844 xdp_ring->qid, tx_pkts);
1845
1846 return tx_pkts;
1847 }
1848
ena_io_poll(struct napi_struct * napi,int budget)1849 static int ena_io_poll(struct napi_struct *napi, int budget)
1850 {
1851 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1852 struct ena_ring *tx_ring, *rx_ring;
1853 int tx_work_done;
1854 int rx_work_done = 0;
1855 int tx_budget;
1856 int napi_comp_call = 0;
1857 int ret;
1858
1859 tx_ring = ena_napi->tx_ring;
1860 rx_ring = ena_napi->rx_ring;
1861
1862 tx_ring->first_interrupt = ena_napi->first_interrupt;
1863 rx_ring->first_interrupt = ena_napi->first_interrupt;
1864
1865 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1866
1867 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1868 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1869 napi_complete_done(napi, 0);
1870 return 0;
1871 }
1872
1873 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1874 /* On netpoll the budget is zero and the handler should only clean the
1875 * tx completions.
1876 */
1877 if (likely(budget))
1878 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1879
1880 /* If the device is about to reset or down, avoid unmask
1881 * the interrupt and return 0 so NAPI won't reschedule
1882 */
1883 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1884 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1885 napi_complete_done(napi, 0);
1886 ret = 0;
1887
1888 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1889 napi_comp_call = 1;
1890
1891 /* Update numa and unmask the interrupt only when schedule
1892 * from the interrupt context (vs from sk_busy_loop)
1893 */
1894 if (napi_complete_done(napi, rx_work_done) &&
1895 READ_ONCE(ena_napi->interrupts_masked)) {
1896 smp_rmb(); /* make sure interrupts_masked is read */
1897 WRITE_ONCE(ena_napi->interrupts_masked, false);
1898 /* We apply adaptive moderation on Rx path only.
1899 * Tx uses static interrupt moderation.
1900 */
1901 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1902 ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1903
1904 ena_unmask_interrupt(tx_ring, rx_ring);
1905 }
1906
1907 ena_update_ring_numa_node(tx_ring, rx_ring);
1908
1909 ret = rx_work_done;
1910 } else {
1911 ret = budget;
1912 }
1913
1914 u64_stats_update_begin(&tx_ring->syncp);
1915 tx_ring->tx_stats.napi_comp += napi_comp_call;
1916 tx_ring->tx_stats.tx_poll++;
1917 u64_stats_update_end(&tx_ring->syncp);
1918
1919 return ret;
1920 }
1921
ena_intr_msix_mgmnt(int irq,void * data)1922 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1923 {
1924 struct ena_adapter *adapter = (struct ena_adapter *)data;
1925
1926 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1927
1928 /* Don't call the aenq handler before probe is done */
1929 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1930 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1931
1932 return IRQ_HANDLED;
1933 }
1934
1935 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1936 * @irq: interrupt number
1937 * @data: pointer to a network interface private napi device structure
1938 */
ena_intr_msix_io(int irq,void * data)1939 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1940 {
1941 struct ena_napi *ena_napi = data;
1942
1943 ena_napi->first_interrupt = true;
1944
1945 WRITE_ONCE(ena_napi->interrupts_masked, true);
1946 smp_wmb(); /* write interrupts_masked before calling napi */
1947
1948 napi_schedule_irqoff(&ena_napi->napi);
1949
1950 return IRQ_HANDLED;
1951 }
1952
1953 /* Reserve a single MSI-X vector for management (admin + aenq).
1954 * plus reserve one vector for each potential io queue.
1955 * the number of potential io queues is the minimum of what the device
1956 * supports and the number of vCPUs.
1957 */
ena_enable_msix(struct ena_adapter * adapter)1958 static int ena_enable_msix(struct ena_adapter *adapter)
1959 {
1960 int msix_vecs, irq_cnt;
1961
1962 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1963 netif_err(adapter, probe, adapter->netdev,
1964 "Error, MSI-X is already enabled\n");
1965 return -EPERM;
1966 }
1967
1968 /* Reserved the max msix vectors we might need */
1969 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
1970 netif_dbg(adapter, probe, adapter->netdev,
1971 "Trying to enable MSI-X, vectors %d\n", msix_vecs);
1972
1973 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1974 msix_vecs, PCI_IRQ_MSIX);
1975
1976 if (irq_cnt < 0) {
1977 netif_err(adapter, probe, adapter->netdev,
1978 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1979 return -ENOSPC;
1980 }
1981
1982 if (irq_cnt != msix_vecs) {
1983 netif_notice(adapter, probe, adapter->netdev,
1984 "Enable only %d MSI-X (out of %d), reduce the number of queues\n",
1985 irq_cnt, msix_vecs);
1986 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1987 }
1988
1989 if (ena_init_rx_cpu_rmap(adapter))
1990 netif_warn(adapter, probe, adapter->netdev,
1991 "Failed to map IRQs to CPUs\n");
1992
1993 adapter->msix_vecs = irq_cnt;
1994 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1995
1996 return 0;
1997 }
1998
ena_setup_mgmnt_intr(struct ena_adapter * adapter)1999 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2000 {
2001 u32 cpu;
2002
2003 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2004 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2005 pci_name(adapter->pdev));
2006 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2007 ena_intr_msix_mgmnt;
2008 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2009 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
2010 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
2011 cpu = cpumask_first(cpu_online_mask);
2012 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2013 cpumask_set_cpu(cpu,
2014 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2015 }
2016
ena_setup_io_intr(struct ena_adapter * adapter)2017 static void ena_setup_io_intr(struct ena_adapter *adapter)
2018 {
2019 struct net_device *netdev;
2020 int irq_idx, i, cpu;
2021 int io_queue_count;
2022
2023 netdev = adapter->netdev;
2024 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2025
2026 for (i = 0; i < io_queue_count; i++) {
2027 irq_idx = ENA_IO_IRQ_IDX(i);
2028 cpu = i % num_online_cpus();
2029
2030 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2031 "%s-Tx-Rx-%d", netdev->name, i);
2032 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2033 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2034 adapter->irq_tbl[irq_idx].vector =
2035 pci_irq_vector(adapter->pdev, irq_idx);
2036 adapter->irq_tbl[irq_idx].cpu = cpu;
2037
2038 cpumask_set_cpu(cpu,
2039 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
2040 }
2041 }
2042
ena_request_mgmnt_irq(struct ena_adapter * adapter)2043 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2044 {
2045 unsigned long flags = 0;
2046 struct ena_irq *irq;
2047 int rc;
2048
2049 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2050 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2051 irq->data);
2052 if (rc) {
2053 netif_err(adapter, probe, adapter->netdev,
2054 "Failed to request admin irq\n");
2055 return rc;
2056 }
2057
2058 netif_dbg(adapter, probe, adapter->netdev,
2059 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
2060 irq->affinity_hint_mask.bits[0], irq->vector);
2061
2062 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2063
2064 return rc;
2065 }
2066
ena_request_io_irq(struct ena_adapter * adapter)2067 static int ena_request_io_irq(struct ena_adapter *adapter)
2068 {
2069 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2070 unsigned long flags = 0;
2071 struct ena_irq *irq;
2072 int rc = 0, i, k;
2073
2074 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2075 netif_err(adapter, ifup, adapter->netdev,
2076 "Failed to request I/O IRQ: MSI-X is not enabled\n");
2077 return -EINVAL;
2078 }
2079
2080 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2081 irq = &adapter->irq_tbl[i];
2082 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2083 irq->data);
2084 if (rc) {
2085 netif_err(adapter, ifup, adapter->netdev,
2086 "Failed to request I/O IRQ. index %d rc %d\n",
2087 i, rc);
2088 goto err;
2089 }
2090
2091 netif_dbg(adapter, ifup, adapter->netdev,
2092 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
2093 i, irq->affinity_hint_mask.bits[0], irq->vector);
2094
2095 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2096 }
2097
2098 return rc;
2099
2100 err:
2101 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2102 irq = &adapter->irq_tbl[k];
2103 free_irq(irq->vector, irq->data);
2104 }
2105
2106 return rc;
2107 }
2108
ena_free_mgmnt_irq(struct ena_adapter * adapter)2109 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2110 {
2111 struct ena_irq *irq;
2112
2113 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2114 synchronize_irq(irq->vector);
2115 irq_set_affinity_hint(irq->vector, NULL);
2116 free_irq(irq->vector, irq->data);
2117 }
2118
ena_free_io_irq(struct ena_adapter * adapter)2119 static void ena_free_io_irq(struct ena_adapter *adapter)
2120 {
2121 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2122 struct ena_irq *irq;
2123 int i;
2124
2125 #ifdef CONFIG_RFS_ACCEL
2126 if (adapter->msix_vecs >= 1) {
2127 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2128 adapter->netdev->rx_cpu_rmap = NULL;
2129 }
2130 #endif /* CONFIG_RFS_ACCEL */
2131
2132 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2133 irq = &adapter->irq_tbl[i];
2134 irq_set_affinity_hint(irq->vector, NULL);
2135 free_irq(irq->vector, irq->data);
2136 }
2137 }
2138
ena_disable_msix(struct ena_adapter * adapter)2139 static void ena_disable_msix(struct ena_adapter *adapter)
2140 {
2141 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2142 pci_free_irq_vectors(adapter->pdev);
2143 }
2144
ena_disable_io_intr_sync(struct ena_adapter * adapter)2145 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2146 {
2147 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2148 int i;
2149
2150 if (!netif_running(adapter->netdev))
2151 return;
2152
2153 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++)
2154 synchronize_irq(adapter->irq_tbl[i].vector);
2155 }
2156
ena_del_napi_in_range(struct ena_adapter * adapter,int first_index,int count)2157 static void ena_del_napi_in_range(struct ena_adapter *adapter,
2158 int first_index,
2159 int count)
2160 {
2161 int i;
2162
2163 for (i = first_index; i < first_index + count; i++) {
2164 netif_napi_del(&adapter->ena_napi[i].napi);
2165
2166 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) &&
2167 adapter->ena_napi[i].xdp_ring);
2168 }
2169 }
2170
ena_init_napi_in_range(struct ena_adapter * adapter,int first_index,int count)2171 static void ena_init_napi_in_range(struct ena_adapter *adapter,
2172 int first_index, int count)
2173 {
2174 int i;
2175
2176 for (i = first_index; i < first_index + count; i++) {
2177 struct ena_napi *napi = &adapter->ena_napi[i];
2178
2179 netif_napi_add(adapter->netdev,
2180 &napi->napi,
2181 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll,
2182 ENA_NAPI_BUDGET);
2183
2184 if (!ENA_IS_XDP_INDEX(adapter, i)) {
2185 napi->rx_ring = &adapter->rx_ring[i];
2186 napi->tx_ring = &adapter->tx_ring[i];
2187 } else {
2188 napi->xdp_ring = &adapter->tx_ring[i];
2189 }
2190 napi->qid = i;
2191 }
2192 }
2193
ena_napi_disable_in_range(struct ena_adapter * adapter,int first_index,int count)2194 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2195 int first_index,
2196 int count)
2197 {
2198 int i;
2199
2200 for (i = first_index; i < first_index + count; i++)
2201 napi_disable(&adapter->ena_napi[i].napi);
2202 }
2203
ena_napi_enable_in_range(struct ena_adapter * adapter,int first_index,int count)2204 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2205 int first_index,
2206 int count)
2207 {
2208 int i;
2209
2210 for (i = first_index; i < first_index + count; i++)
2211 napi_enable(&adapter->ena_napi[i].napi);
2212 }
2213
2214 /* Configure the Rx forwarding */
ena_rss_configure(struct ena_adapter * adapter)2215 static int ena_rss_configure(struct ena_adapter *adapter)
2216 {
2217 struct ena_com_dev *ena_dev = adapter->ena_dev;
2218 int rc;
2219
2220 /* In case the RSS table wasn't initialized by probe */
2221 if (!ena_dev->rss.tbl_log_size) {
2222 rc = ena_rss_init_default(adapter);
2223 if (rc && (rc != -EOPNOTSUPP)) {
2224 netif_err(adapter, ifup, adapter->netdev,
2225 "Failed to init RSS rc: %d\n", rc);
2226 return rc;
2227 }
2228 }
2229
2230 /* Set indirect table */
2231 rc = ena_com_indirect_table_set(ena_dev);
2232 if (unlikely(rc && rc != -EOPNOTSUPP))
2233 return rc;
2234
2235 /* Configure hash function (if supported) */
2236 rc = ena_com_set_hash_function(ena_dev);
2237 if (unlikely(rc && (rc != -EOPNOTSUPP)))
2238 return rc;
2239
2240 /* Configure hash inputs (if supported) */
2241 rc = ena_com_set_hash_ctrl(ena_dev);
2242 if (unlikely(rc && (rc != -EOPNOTSUPP)))
2243 return rc;
2244
2245 return 0;
2246 }
2247
ena_up_complete(struct ena_adapter * adapter)2248 static int ena_up_complete(struct ena_adapter *adapter)
2249 {
2250 int rc;
2251
2252 rc = ena_rss_configure(adapter);
2253 if (rc)
2254 return rc;
2255
2256 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2257
2258 ena_refill_all_rx_bufs(adapter);
2259
2260 /* enable transmits */
2261 netif_tx_start_all_queues(adapter->netdev);
2262
2263 ena_napi_enable_in_range(adapter,
2264 0,
2265 adapter->xdp_num_queues + adapter->num_io_queues);
2266
2267 return 0;
2268 }
2269
ena_create_io_tx_queue(struct ena_adapter * adapter,int qid)2270 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2271 {
2272 struct ena_com_create_io_ctx ctx;
2273 struct ena_com_dev *ena_dev;
2274 struct ena_ring *tx_ring;
2275 u32 msix_vector;
2276 u16 ena_qid;
2277 int rc;
2278
2279 ena_dev = adapter->ena_dev;
2280
2281 tx_ring = &adapter->tx_ring[qid];
2282 msix_vector = ENA_IO_IRQ_IDX(qid);
2283 ena_qid = ENA_IO_TXQ_IDX(qid);
2284
2285 memset(&ctx, 0x0, sizeof(ctx));
2286
2287 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2288 ctx.qid = ena_qid;
2289 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2290 ctx.msix_vector = msix_vector;
2291 ctx.queue_size = tx_ring->ring_size;
2292 ctx.numa_node = cpu_to_node(tx_ring->cpu);
2293
2294 rc = ena_com_create_io_queue(ena_dev, &ctx);
2295 if (rc) {
2296 netif_err(adapter, ifup, adapter->netdev,
2297 "Failed to create I/O TX queue num %d rc: %d\n",
2298 qid, rc);
2299 return rc;
2300 }
2301
2302 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2303 &tx_ring->ena_com_io_sq,
2304 &tx_ring->ena_com_io_cq);
2305 if (rc) {
2306 netif_err(adapter, ifup, adapter->netdev,
2307 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2308 qid, rc);
2309 ena_com_destroy_io_queue(ena_dev, ena_qid);
2310 return rc;
2311 }
2312
2313 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2314 return rc;
2315 }
2316
ena_create_io_tx_queues_in_range(struct ena_adapter * adapter,int first_index,int count)2317 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2318 int first_index, int count)
2319 {
2320 struct ena_com_dev *ena_dev = adapter->ena_dev;
2321 int rc, i;
2322
2323 for (i = first_index; i < first_index + count; i++) {
2324 rc = ena_create_io_tx_queue(adapter, i);
2325 if (rc)
2326 goto create_err;
2327 }
2328
2329 return 0;
2330
2331 create_err:
2332 while (i-- > first_index)
2333 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2334
2335 return rc;
2336 }
2337
ena_create_io_rx_queue(struct ena_adapter * adapter,int qid)2338 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2339 {
2340 struct ena_com_dev *ena_dev;
2341 struct ena_com_create_io_ctx ctx;
2342 struct ena_ring *rx_ring;
2343 u32 msix_vector;
2344 u16 ena_qid;
2345 int rc;
2346
2347 ena_dev = adapter->ena_dev;
2348
2349 rx_ring = &adapter->rx_ring[qid];
2350 msix_vector = ENA_IO_IRQ_IDX(qid);
2351 ena_qid = ENA_IO_RXQ_IDX(qid);
2352
2353 memset(&ctx, 0x0, sizeof(ctx));
2354
2355 ctx.qid = ena_qid;
2356 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2357 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2358 ctx.msix_vector = msix_vector;
2359 ctx.queue_size = rx_ring->ring_size;
2360 ctx.numa_node = cpu_to_node(rx_ring->cpu);
2361
2362 rc = ena_com_create_io_queue(ena_dev, &ctx);
2363 if (rc) {
2364 netif_err(adapter, ifup, adapter->netdev,
2365 "Failed to create I/O RX queue num %d rc: %d\n",
2366 qid, rc);
2367 return rc;
2368 }
2369
2370 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2371 &rx_ring->ena_com_io_sq,
2372 &rx_ring->ena_com_io_cq);
2373 if (rc) {
2374 netif_err(adapter, ifup, adapter->netdev,
2375 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2376 qid, rc);
2377 goto err;
2378 }
2379
2380 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2381
2382 return rc;
2383 err:
2384 ena_com_destroy_io_queue(ena_dev, ena_qid);
2385 return rc;
2386 }
2387
ena_create_all_io_rx_queues(struct ena_adapter * adapter)2388 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2389 {
2390 struct ena_com_dev *ena_dev = adapter->ena_dev;
2391 int rc, i;
2392
2393 for (i = 0; i < adapter->num_io_queues; i++) {
2394 rc = ena_create_io_rx_queue(adapter, i);
2395 if (rc)
2396 goto create_err;
2397 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
2398 }
2399
2400 return 0;
2401
2402 create_err:
2403 while (i--) {
2404 cancel_work_sync(&adapter->ena_napi[i].dim.work);
2405 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2406 }
2407
2408 return rc;
2409 }
2410
set_io_rings_size(struct ena_adapter * adapter,int new_tx_size,int new_rx_size)2411 static void set_io_rings_size(struct ena_adapter *adapter,
2412 int new_tx_size,
2413 int new_rx_size)
2414 {
2415 int i;
2416
2417 for (i = 0; i < adapter->num_io_queues; i++) {
2418 adapter->tx_ring[i].ring_size = new_tx_size;
2419 adapter->rx_ring[i].ring_size = new_rx_size;
2420 }
2421 }
2422
2423 /* This function allows queue allocation to backoff when the system is
2424 * low on memory. If there is not enough memory to allocate io queues
2425 * the driver will try to allocate smaller queues.
2426 *
2427 * The backoff algorithm is as follows:
2428 * 1. Try to allocate TX and RX and if successful.
2429 * 1.1. return success
2430 *
2431 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
2432 *
2433 * 3. If TX or RX is smaller than 256
2434 * 3.1. return failure.
2435 * 4. else
2436 * 4.1. go back to 1.
2437 */
create_queues_with_size_backoff(struct ena_adapter * adapter)2438 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2439 {
2440 int rc, cur_rx_ring_size, cur_tx_ring_size;
2441 int new_rx_ring_size, new_tx_ring_size;
2442
2443 /* current queue sizes might be set to smaller than the requested
2444 * ones due to past queue allocation failures.
2445 */
2446 set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2447 adapter->requested_rx_ring_size);
2448
2449 while (1) {
2450 if (ena_xdp_present(adapter)) {
2451 rc = ena_setup_and_create_all_xdp_queues(adapter);
2452
2453 if (rc)
2454 goto err_setup_tx;
2455 }
2456 rc = ena_setup_tx_resources_in_range(adapter,
2457 0,
2458 adapter->num_io_queues);
2459 if (rc)
2460 goto err_setup_tx;
2461
2462 rc = ena_create_io_tx_queues_in_range(adapter,
2463 0,
2464 adapter->num_io_queues);
2465 if (rc)
2466 goto err_create_tx_queues;
2467
2468 rc = ena_setup_all_rx_resources(adapter);
2469 if (rc)
2470 goto err_setup_rx;
2471
2472 rc = ena_create_all_io_rx_queues(adapter);
2473 if (rc)
2474 goto err_create_rx_queues;
2475
2476 return 0;
2477
2478 err_create_rx_queues:
2479 ena_free_all_io_rx_resources(adapter);
2480 err_setup_rx:
2481 ena_destroy_all_tx_queues(adapter);
2482 err_create_tx_queues:
2483 ena_free_all_io_tx_resources(adapter);
2484 err_setup_tx:
2485 if (rc != -ENOMEM) {
2486 netif_err(adapter, ifup, adapter->netdev,
2487 "Queue creation failed with error code %d\n",
2488 rc);
2489 return rc;
2490 }
2491
2492 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2493 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2494
2495 netif_err(adapter, ifup, adapter->netdev,
2496 "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2497 cur_tx_ring_size, cur_rx_ring_size);
2498
2499 new_tx_ring_size = cur_tx_ring_size;
2500 new_rx_ring_size = cur_rx_ring_size;
2501
2502 /* Decrease the size of the larger queue, or
2503 * decrease both if they are the same size.
2504 */
2505 if (cur_rx_ring_size <= cur_tx_ring_size)
2506 new_tx_ring_size = cur_tx_ring_size / 2;
2507 if (cur_rx_ring_size >= cur_tx_ring_size)
2508 new_rx_ring_size = cur_rx_ring_size / 2;
2509
2510 if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2511 new_rx_ring_size < ENA_MIN_RING_SIZE) {
2512 netif_err(adapter, ifup, adapter->netdev,
2513 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2514 ENA_MIN_RING_SIZE);
2515 return rc;
2516 }
2517
2518 netif_err(adapter, ifup, adapter->netdev,
2519 "Retrying queue creation with sizes TX=%d, RX=%d\n",
2520 new_tx_ring_size,
2521 new_rx_ring_size);
2522
2523 set_io_rings_size(adapter, new_tx_ring_size,
2524 new_rx_ring_size);
2525 }
2526 }
2527
ena_up(struct ena_adapter * adapter)2528 static int ena_up(struct ena_adapter *adapter)
2529 {
2530 int io_queue_count, rc, i;
2531
2532 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
2533
2534 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2535 ena_setup_io_intr(adapter);
2536
2537 /* napi poll functions should be initialized before running
2538 * request_irq(), to handle a rare condition where there is a pending
2539 * interrupt, causing the ISR to fire immediately while the poll
2540 * function wasn't set yet, causing a null dereference
2541 */
2542 ena_init_napi_in_range(adapter, 0, io_queue_count);
2543
2544 rc = ena_request_io_irq(adapter);
2545 if (rc)
2546 goto err_req_irq;
2547
2548 rc = create_queues_with_size_backoff(adapter);
2549 if (rc)
2550 goto err_create_queues_with_backoff;
2551
2552 rc = ena_up_complete(adapter);
2553 if (rc)
2554 goto err_up;
2555
2556 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2557 netif_carrier_on(adapter->netdev);
2558
2559 u64_stats_update_begin(&adapter->syncp);
2560 adapter->dev_stats.interface_up++;
2561 u64_stats_update_end(&adapter->syncp);
2562
2563 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2564
2565 /* Enable completion queues interrupt */
2566 for (i = 0; i < adapter->num_io_queues; i++)
2567 ena_unmask_interrupt(&adapter->tx_ring[i],
2568 &adapter->rx_ring[i]);
2569
2570 /* schedule napi in case we had pending packets
2571 * from the last time we disable napi
2572 */
2573 for (i = 0; i < io_queue_count; i++)
2574 napi_schedule(&adapter->ena_napi[i].napi);
2575
2576 return rc;
2577
2578 err_up:
2579 ena_destroy_all_tx_queues(adapter);
2580 ena_free_all_io_tx_resources(adapter);
2581 ena_destroy_all_rx_queues(adapter);
2582 ena_free_all_io_rx_resources(adapter);
2583 err_create_queues_with_backoff:
2584 ena_free_io_irq(adapter);
2585 err_req_irq:
2586 ena_del_napi_in_range(adapter, 0, io_queue_count);
2587
2588 return rc;
2589 }
2590
ena_down(struct ena_adapter * adapter)2591 static void ena_down(struct ena_adapter *adapter)
2592 {
2593 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2594
2595 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2596
2597 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2598
2599 u64_stats_update_begin(&adapter->syncp);
2600 adapter->dev_stats.interface_down++;
2601 u64_stats_update_end(&adapter->syncp);
2602
2603 netif_carrier_off(adapter->netdev);
2604 netif_tx_disable(adapter->netdev);
2605
2606 /* After this point the napi handler won't enable the tx queue */
2607 ena_napi_disable_in_range(adapter, 0, io_queue_count);
2608
2609 /* After destroy the queue there won't be any new interrupts */
2610
2611 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2612 int rc;
2613
2614 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2615 if (rc)
2616 netif_err(adapter, ifdown, adapter->netdev,
2617 "Device reset failed\n");
2618 /* stop submitting admin commands on a device that was reset */
2619 ena_com_set_admin_running_state(adapter->ena_dev, false);
2620 }
2621
2622 ena_destroy_all_io_queues(adapter);
2623
2624 ena_disable_io_intr_sync(adapter);
2625 ena_free_io_irq(adapter);
2626 ena_del_napi_in_range(adapter, 0, io_queue_count);
2627
2628 ena_free_all_tx_bufs(adapter);
2629 ena_free_all_rx_bufs(adapter);
2630 ena_free_all_io_tx_resources(adapter);
2631 ena_free_all_io_rx_resources(adapter);
2632 }
2633
2634 /* ena_open - Called when a network interface is made active
2635 * @netdev: network interface device structure
2636 *
2637 * Returns 0 on success, negative value on failure
2638 *
2639 * The open entry point is called when a network interface is made
2640 * active by the system (IFF_UP). At this point all resources needed
2641 * for transmit and receive operations are allocated, the interrupt
2642 * handler is registered with the OS, the watchdog timer is started,
2643 * and the stack is notified that the interface is ready.
2644 */
ena_open(struct net_device * netdev)2645 static int ena_open(struct net_device *netdev)
2646 {
2647 struct ena_adapter *adapter = netdev_priv(netdev);
2648 int rc;
2649
2650 /* Notify the stack of the actual queue counts. */
2651 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
2652 if (rc) {
2653 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2654 return rc;
2655 }
2656
2657 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
2658 if (rc) {
2659 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2660 return rc;
2661 }
2662
2663 rc = ena_up(adapter);
2664 if (rc)
2665 return rc;
2666
2667 return rc;
2668 }
2669
2670 /* ena_close - Disables a network interface
2671 * @netdev: network interface device structure
2672 *
2673 * Returns 0, this is not allowed to fail
2674 *
2675 * The close entry point is called when an interface is de-activated
2676 * by the OS. The hardware is still under the drivers control, but
2677 * needs to be disabled. A global MAC reset is issued to stop the
2678 * hardware, and all transmit and receive resources are freed.
2679 */
ena_close(struct net_device * netdev)2680 static int ena_close(struct net_device *netdev)
2681 {
2682 struct ena_adapter *adapter = netdev_priv(netdev);
2683
2684 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2685
2686 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2687 return 0;
2688
2689 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2690 ena_down(adapter);
2691
2692 /* Check for device status and issue reset if needed*/
2693 check_for_admin_com_state(adapter);
2694 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2695 netif_err(adapter, ifdown, adapter->netdev,
2696 "Destroy failure, restarting device\n");
2697 ena_dump_stats_to_dmesg(adapter);
2698 /* rtnl lock already obtained in dev_ioctl() layer */
2699 ena_destroy_device(adapter, false);
2700 ena_restore_device(adapter);
2701 }
2702
2703 return 0;
2704 }
2705
ena_update_queue_sizes(struct ena_adapter * adapter,u32 new_tx_size,u32 new_rx_size)2706 int ena_update_queue_sizes(struct ena_adapter *adapter,
2707 u32 new_tx_size,
2708 u32 new_rx_size)
2709 {
2710 bool dev_was_up;
2711
2712 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2713 ena_close(adapter->netdev);
2714 adapter->requested_tx_ring_size = new_tx_size;
2715 adapter->requested_rx_ring_size = new_rx_size;
2716 ena_init_io_rings(adapter,
2717 0,
2718 adapter->xdp_num_queues +
2719 adapter->num_io_queues);
2720 return dev_was_up ? ena_up(adapter) : 0;
2721 }
2722
ena_update_queue_count(struct ena_adapter * adapter,u32 new_channel_count)2723 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2724 {
2725 struct ena_com_dev *ena_dev = adapter->ena_dev;
2726 int prev_channel_count;
2727 bool dev_was_up;
2728
2729 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2730 ena_close(adapter->netdev);
2731 prev_channel_count = adapter->num_io_queues;
2732 adapter->num_io_queues = new_channel_count;
2733 if (ena_xdp_present(adapter) &&
2734 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2735 adapter->xdp_first_ring = new_channel_count;
2736 adapter->xdp_num_queues = new_channel_count;
2737 if (prev_channel_count > new_channel_count)
2738 ena_xdp_exchange_program_rx_in_range(adapter,
2739 NULL,
2740 new_channel_count,
2741 prev_channel_count);
2742 else
2743 ena_xdp_exchange_program_rx_in_range(adapter,
2744 adapter->xdp_bpf_prog,
2745 prev_channel_count,
2746 new_channel_count);
2747 }
2748
2749 /* We need to destroy the rss table so that the indirection
2750 * table will be reinitialized by ena_up()
2751 */
2752 ena_com_rss_destroy(ena_dev);
2753 ena_init_io_rings(adapter,
2754 0,
2755 adapter->xdp_num_queues +
2756 adapter->num_io_queues);
2757 return dev_was_up ? ena_open(adapter->netdev) : 0;
2758 }
2759
ena_tx_csum(struct ena_com_tx_ctx * ena_tx_ctx,struct sk_buff * skb,bool disable_meta_caching)2760 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx,
2761 struct sk_buff *skb,
2762 bool disable_meta_caching)
2763 {
2764 u32 mss = skb_shinfo(skb)->gso_size;
2765 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2766 u8 l4_protocol = 0;
2767
2768 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2769 ena_tx_ctx->l4_csum_enable = 1;
2770 if (mss) {
2771 ena_tx_ctx->tso_enable = 1;
2772 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2773 ena_tx_ctx->l4_csum_partial = 0;
2774 } else {
2775 ena_tx_ctx->tso_enable = 0;
2776 ena_meta->l4_hdr_len = 0;
2777 ena_tx_ctx->l4_csum_partial = 1;
2778 }
2779
2780 switch (ip_hdr(skb)->version) {
2781 case IPVERSION:
2782 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2783 if (ip_hdr(skb)->frag_off & htons(IP_DF))
2784 ena_tx_ctx->df = 1;
2785 if (mss)
2786 ena_tx_ctx->l3_csum_enable = 1;
2787 l4_protocol = ip_hdr(skb)->protocol;
2788 break;
2789 case 6:
2790 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2791 l4_protocol = ipv6_hdr(skb)->nexthdr;
2792 break;
2793 default:
2794 break;
2795 }
2796
2797 if (l4_protocol == IPPROTO_TCP)
2798 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2799 else
2800 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2801
2802 ena_meta->mss = mss;
2803 ena_meta->l3_hdr_len = skb_network_header_len(skb);
2804 ena_meta->l3_hdr_offset = skb_network_offset(skb);
2805 ena_tx_ctx->meta_valid = 1;
2806 } else if (disable_meta_caching) {
2807 memset(ena_meta, 0, sizeof(*ena_meta));
2808 ena_tx_ctx->meta_valid = 1;
2809 } else {
2810 ena_tx_ctx->meta_valid = 0;
2811 }
2812 }
2813
ena_check_and_linearize_skb(struct ena_ring * tx_ring,struct sk_buff * skb)2814 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2815 struct sk_buff *skb)
2816 {
2817 int num_frags, header_len, rc;
2818
2819 num_frags = skb_shinfo(skb)->nr_frags;
2820 header_len = skb_headlen(skb);
2821
2822 if (num_frags < tx_ring->sgl_size)
2823 return 0;
2824
2825 if ((num_frags == tx_ring->sgl_size) &&
2826 (header_len < tx_ring->tx_max_header_size))
2827 return 0;
2828
2829 u64_stats_update_begin(&tx_ring->syncp);
2830 tx_ring->tx_stats.linearize++;
2831 u64_stats_update_end(&tx_ring->syncp);
2832
2833 rc = skb_linearize(skb);
2834 if (unlikely(rc)) {
2835 u64_stats_update_begin(&tx_ring->syncp);
2836 tx_ring->tx_stats.linearize_failed++;
2837 u64_stats_update_end(&tx_ring->syncp);
2838 }
2839
2840 return rc;
2841 }
2842
ena_tx_map_skb(struct ena_ring * tx_ring,struct ena_tx_buffer * tx_info,struct sk_buff * skb,void ** push_hdr,u16 * header_len)2843 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2844 struct ena_tx_buffer *tx_info,
2845 struct sk_buff *skb,
2846 void **push_hdr,
2847 u16 *header_len)
2848 {
2849 struct ena_adapter *adapter = tx_ring->adapter;
2850 struct ena_com_buf *ena_buf;
2851 dma_addr_t dma;
2852 u32 skb_head_len, frag_len, last_frag;
2853 u16 push_len = 0;
2854 u16 delta = 0;
2855 int i = 0;
2856
2857 skb_head_len = skb_headlen(skb);
2858 tx_info->skb = skb;
2859 ena_buf = tx_info->bufs;
2860
2861 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2862 /* When the device is LLQ mode, the driver will copy
2863 * the header into the device memory space.
2864 * the ena_com layer assume the header is in a linear
2865 * memory space.
2866 * This assumption might be wrong since part of the header
2867 * can be in the fragmented buffers.
2868 * Use skb_header_pointer to make sure the header is in a
2869 * linear memory space.
2870 */
2871
2872 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2873 *push_hdr = skb_header_pointer(skb, 0, push_len,
2874 tx_ring->push_buf_intermediate_buf);
2875 *header_len = push_len;
2876 if (unlikely(skb->data != *push_hdr)) {
2877 u64_stats_update_begin(&tx_ring->syncp);
2878 tx_ring->tx_stats.llq_buffer_copy++;
2879 u64_stats_update_end(&tx_ring->syncp);
2880
2881 delta = push_len - skb_head_len;
2882 }
2883 } else {
2884 *push_hdr = NULL;
2885 *header_len = min_t(u32, skb_head_len,
2886 tx_ring->tx_max_header_size);
2887 }
2888
2889 netif_dbg(adapter, tx_queued, adapter->netdev,
2890 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2891 *push_hdr, push_len);
2892
2893 if (skb_head_len > push_len) {
2894 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2895 skb_head_len - push_len, DMA_TO_DEVICE);
2896 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2897 goto error_report_dma_error;
2898
2899 ena_buf->paddr = dma;
2900 ena_buf->len = skb_head_len - push_len;
2901
2902 ena_buf++;
2903 tx_info->num_of_bufs++;
2904 tx_info->map_linear_data = 1;
2905 } else {
2906 tx_info->map_linear_data = 0;
2907 }
2908
2909 last_frag = skb_shinfo(skb)->nr_frags;
2910
2911 for (i = 0; i < last_frag; i++) {
2912 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2913
2914 frag_len = skb_frag_size(frag);
2915
2916 if (unlikely(delta >= frag_len)) {
2917 delta -= frag_len;
2918 continue;
2919 }
2920
2921 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2922 frag_len - delta, DMA_TO_DEVICE);
2923 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2924 goto error_report_dma_error;
2925
2926 ena_buf->paddr = dma;
2927 ena_buf->len = frag_len - delta;
2928 ena_buf++;
2929 tx_info->num_of_bufs++;
2930 delta = 0;
2931 }
2932
2933 return 0;
2934
2935 error_report_dma_error:
2936 u64_stats_update_begin(&tx_ring->syncp);
2937 tx_ring->tx_stats.dma_mapping_err++;
2938 u64_stats_update_end(&tx_ring->syncp);
2939 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n");
2940
2941 tx_info->skb = NULL;
2942
2943 tx_info->num_of_bufs += i;
2944 ena_unmap_tx_buff(tx_ring, tx_info);
2945
2946 return -EINVAL;
2947 }
2948
2949 /* Called with netif_tx_lock. */
ena_start_xmit(struct sk_buff * skb,struct net_device * dev)2950 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2951 {
2952 struct ena_adapter *adapter = netdev_priv(dev);
2953 struct ena_tx_buffer *tx_info;
2954 struct ena_com_tx_ctx ena_tx_ctx;
2955 struct ena_ring *tx_ring;
2956 struct netdev_queue *txq;
2957 void *push_hdr;
2958 u16 next_to_use, req_id, header_len;
2959 int qid, rc;
2960
2961 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2962 /* Determine which tx ring we will be placed on */
2963 qid = skb_get_queue_mapping(skb);
2964 tx_ring = &adapter->tx_ring[qid];
2965 txq = netdev_get_tx_queue(dev, qid);
2966
2967 rc = ena_check_and_linearize_skb(tx_ring, skb);
2968 if (unlikely(rc))
2969 goto error_drop_packet;
2970
2971 skb_tx_timestamp(skb);
2972
2973 next_to_use = tx_ring->next_to_use;
2974 req_id = tx_ring->free_ids[next_to_use];
2975 tx_info = &tx_ring->tx_buffer_info[req_id];
2976 tx_info->num_of_bufs = 0;
2977
2978 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2979
2980 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2981 if (unlikely(rc))
2982 goto error_drop_packet;
2983
2984 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2985 ena_tx_ctx.ena_bufs = tx_info->bufs;
2986 ena_tx_ctx.push_header = push_hdr;
2987 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2988 ena_tx_ctx.req_id = req_id;
2989 ena_tx_ctx.header_len = header_len;
2990
2991 /* set flags and meta data */
2992 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching);
2993
2994 rc = ena_xmit_common(dev,
2995 tx_ring,
2996 tx_info,
2997 &ena_tx_ctx,
2998 next_to_use,
2999 skb->len);
3000 if (rc)
3001 goto error_unmap_dma;
3002
3003 netdev_tx_sent_queue(txq, skb->len);
3004
3005 /* stop the queue when no more space available, the packet can have up
3006 * to sgl_size + 2. one for the meta descriptor and one for header
3007 * (if the header is larger than tx_max_header_size).
3008 */
3009 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3010 tx_ring->sgl_size + 2))) {
3011 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3012 __func__, qid);
3013
3014 netif_tx_stop_queue(txq);
3015 u64_stats_update_begin(&tx_ring->syncp);
3016 tx_ring->tx_stats.queue_stop++;
3017 u64_stats_update_end(&tx_ring->syncp);
3018
3019 /* There is a rare condition where this function decide to
3020 * stop the queue but meanwhile clean_tx_irq updates
3021 * next_to_completion and terminates.
3022 * The queue will remain stopped forever.
3023 * To solve this issue add a mb() to make sure that
3024 * netif_tx_stop_queue() write is vissible before checking if
3025 * there is additional space in the queue.
3026 */
3027 smp_mb();
3028
3029 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3030 ENA_TX_WAKEUP_THRESH)) {
3031 netif_tx_wake_queue(txq);
3032 u64_stats_update_begin(&tx_ring->syncp);
3033 tx_ring->tx_stats.queue_wakeup++;
3034 u64_stats_update_end(&tx_ring->syncp);
3035 }
3036 }
3037
3038 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
3039 /* trigger the dma engine. ena_com_write_sq_doorbell()
3040 * has a mb
3041 */
3042 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
3043 u64_stats_update_begin(&tx_ring->syncp);
3044 tx_ring->tx_stats.doorbells++;
3045 u64_stats_update_end(&tx_ring->syncp);
3046 }
3047
3048 return NETDEV_TX_OK;
3049
3050 error_unmap_dma:
3051 ena_unmap_tx_buff(tx_ring, tx_info);
3052 tx_info->skb = NULL;
3053
3054 error_drop_packet:
3055 dev_kfree_skb(skb);
3056 return NETDEV_TX_OK;
3057 }
3058
ena_select_queue(struct net_device * dev,struct sk_buff * skb,struct net_device * sb_dev)3059 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
3060 struct net_device *sb_dev)
3061 {
3062 u16 qid;
3063 /* we suspect that this is good for in--kernel network services that
3064 * want to loop incoming skb rx to tx in normal user generated traffic,
3065 * most probably we will not get to this
3066 */
3067 if (skb_rx_queue_recorded(skb))
3068 qid = skb_get_rx_queue(skb);
3069 else
3070 qid = netdev_pick_tx(dev, skb, NULL);
3071
3072 return qid;
3073 }
3074
ena_config_host_info(struct ena_com_dev * ena_dev,struct pci_dev * pdev)3075 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3076 {
3077 struct device *dev = &pdev->dev;
3078 struct ena_admin_host_info *host_info;
3079 int rc;
3080
3081 /* Allocate only the host info */
3082 rc = ena_com_allocate_host_info(ena_dev);
3083 if (rc) {
3084 dev_err(dev, "Cannot allocate host info\n");
3085 return;
3086 }
3087
3088 host_info = ena_dev->host_attr.host_info;
3089
3090 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
3091 host_info->os_type = ENA_ADMIN_OS_LINUX;
3092 host_info->kernel_ver = LINUX_VERSION_CODE;
3093 strlcpy(host_info->kernel_ver_str, utsname()->version,
3094 sizeof(host_info->kernel_ver_str) - 1);
3095 host_info->os_dist = 0;
3096 strncpy(host_info->os_dist_str, utsname()->release,
3097 sizeof(host_info->os_dist_str) - 1);
3098 host_info->driver_version =
3099 (DRV_MODULE_GEN_MAJOR) |
3100 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3101 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3102 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
3103 host_info->num_cpus = num_online_cpus();
3104
3105 host_info->driver_supported_features =
3106 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |
3107 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |
3108 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |
3109 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK;
3110
3111 rc = ena_com_set_host_attributes(ena_dev);
3112 if (rc) {
3113 if (rc == -EOPNOTSUPP)
3114 dev_warn(dev, "Cannot set host attributes\n");
3115 else
3116 dev_err(dev, "Cannot set host attributes\n");
3117
3118 goto err;
3119 }
3120
3121 return;
3122
3123 err:
3124 ena_com_delete_host_info(ena_dev);
3125 }
3126
ena_config_debug_area(struct ena_adapter * adapter)3127 static void ena_config_debug_area(struct ena_adapter *adapter)
3128 {
3129 u32 debug_area_size;
3130 int rc, ss_count;
3131
3132 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3133 if (ss_count <= 0) {
3134 netif_err(adapter, drv, adapter->netdev,
3135 "SS count is negative\n");
3136 return;
3137 }
3138
3139 /* allocate 32 bytes for each string and 64bit for the value */
3140 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3141
3142 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3143 if (rc) {
3144 netif_err(adapter, drv, adapter->netdev,
3145 "Cannot allocate debug area\n");
3146 return;
3147 }
3148
3149 rc = ena_com_set_host_attributes(adapter->ena_dev);
3150 if (rc) {
3151 if (rc == -EOPNOTSUPP)
3152 netif_warn(adapter, drv, adapter->netdev,
3153 "Cannot set host attributes\n");
3154 else
3155 netif_err(adapter, drv, adapter->netdev,
3156 "Cannot set host attributes\n");
3157 goto err;
3158 }
3159
3160 return;
3161 err:
3162 ena_com_delete_debug_area(adapter->ena_dev);
3163 }
3164
ena_update_hw_stats(struct ena_adapter * adapter)3165 int ena_update_hw_stats(struct ena_adapter *adapter)
3166 {
3167 int rc = 0;
3168
3169 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats);
3170 if (rc) {
3171 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n");
3172 return rc;
3173 }
3174
3175 return 0;
3176 }
3177
ena_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)3178 static void ena_get_stats64(struct net_device *netdev,
3179 struct rtnl_link_stats64 *stats)
3180 {
3181 struct ena_adapter *adapter = netdev_priv(netdev);
3182 struct ena_ring *rx_ring, *tx_ring;
3183 unsigned int start;
3184 u64 rx_drops;
3185 u64 tx_drops;
3186 int i;
3187
3188 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3189 return;
3190
3191 for (i = 0; i < adapter->num_io_queues; i++) {
3192 u64 bytes, packets;
3193
3194 tx_ring = &adapter->tx_ring[i];
3195
3196 do {
3197 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
3198 packets = tx_ring->tx_stats.cnt;
3199 bytes = tx_ring->tx_stats.bytes;
3200 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
3201
3202 stats->tx_packets += packets;
3203 stats->tx_bytes += bytes;
3204
3205 rx_ring = &adapter->rx_ring[i];
3206
3207 do {
3208 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
3209 packets = rx_ring->rx_stats.cnt;
3210 bytes = rx_ring->rx_stats.bytes;
3211 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
3212
3213 stats->rx_packets += packets;
3214 stats->rx_bytes += bytes;
3215 }
3216
3217 do {
3218 start = u64_stats_fetch_begin_irq(&adapter->syncp);
3219 rx_drops = adapter->dev_stats.rx_drops;
3220 tx_drops = adapter->dev_stats.tx_drops;
3221 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
3222
3223 stats->rx_dropped = rx_drops;
3224 stats->tx_dropped = tx_drops;
3225
3226 stats->multicast = 0;
3227 stats->collisions = 0;
3228
3229 stats->rx_length_errors = 0;
3230 stats->rx_crc_errors = 0;
3231 stats->rx_frame_errors = 0;
3232 stats->rx_fifo_errors = 0;
3233 stats->rx_missed_errors = 0;
3234 stats->tx_window_errors = 0;
3235
3236 stats->rx_errors = 0;
3237 stats->tx_errors = 0;
3238 }
3239
3240 static const struct net_device_ops ena_netdev_ops = {
3241 .ndo_open = ena_open,
3242 .ndo_stop = ena_close,
3243 .ndo_start_xmit = ena_start_xmit,
3244 .ndo_select_queue = ena_select_queue,
3245 .ndo_get_stats64 = ena_get_stats64,
3246 .ndo_tx_timeout = ena_tx_timeout,
3247 .ndo_change_mtu = ena_change_mtu,
3248 .ndo_set_mac_address = NULL,
3249 .ndo_validate_addr = eth_validate_addr,
3250 .ndo_bpf = ena_xdp,
3251 };
3252
ena_device_validate_params(struct ena_adapter * adapter,struct ena_com_dev_get_features_ctx * get_feat_ctx)3253 static int ena_device_validate_params(struct ena_adapter *adapter,
3254 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3255 {
3256 struct net_device *netdev = adapter->netdev;
3257 int rc;
3258
3259 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3260 adapter->mac_addr);
3261 if (!rc) {
3262 netif_err(adapter, drv, netdev,
3263 "Error, mac address are different\n");
3264 return -EINVAL;
3265 }
3266
3267 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3268 netif_err(adapter, drv, netdev,
3269 "Error, device max mtu is smaller than netdev MTU\n");
3270 return -EINVAL;
3271 }
3272
3273 return 0;
3274 }
3275
set_default_llq_configurations(struct ena_llq_configurations * llq_config)3276 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3277 {
3278 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3279 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3280 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3281 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3282 llq_config->llq_ring_entry_size_value = 128;
3283 }
3284
ena_set_queues_placement_policy(struct pci_dev * pdev,struct ena_com_dev * ena_dev,struct ena_admin_feature_llq_desc * llq,struct ena_llq_configurations * llq_default_configurations)3285 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3286 struct ena_com_dev *ena_dev,
3287 struct ena_admin_feature_llq_desc *llq,
3288 struct ena_llq_configurations *llq_default_configurations)
3289 {
3290 int rc;
3291 u32 llq_feature_mask;
3292
3293 llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3294 if (!(ena_dev->supported_features & llq_feature_mask)) {
3295 dev_err(&pdev->dev,
3296 "LLQ is not supported Fallback to host mode policy.\n");
3297 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3298 return 0;
3299 }
3300
3301 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3302 if (unlikely(rc)) {
3303 dev_err(&pdev->dev,
3304 "Failed to configure the device mode. Fallback to host mode policy.\n");
3305 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3306 }
3307
3308 return 0;
3309 }
3310
ena_map_llq_mem_bar(struct pci_dev * pdev,struct ena_com_dev * ena_dev,int bars)3311 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
3312 int bars)
3313 {
3314 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR));
3315
3316 if (!has_mem_bar) {
3317 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3318 dev_err(&pdev->dev,
3319 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3320 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3321 }
3322
3323 return 0;
3324 }
3325
3326 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3327 pci_resource_start(pdev, ENA_MEM_BAR),
3328 pci_resource_len(pdev, ENA_MEM_BAR));
3329
3330 if (!ena_dev->mem_bar)
3331 return -EFAULT;
3332
3333 return 0;
3334 }
3335
ena_device_init(struct ena_com_dev * ena_dev,struct pci_dev * pdev,struct ena_com_dev_get_features_ctx * get_feat_ctx,bool * wd_state)3336 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
3337 struct ena_com_dev_get_features_ctx *get_feat_ctx,
3338 bool *wd_state)
3339 {
3340 struct ena_llq_configurations llq_config;
3341 struct device *dev = &pdev->dev;
3342 bool readless_supported;
3343 u32 aenq_groups;
3344 int dma_width;
3345 int rc;
3346
3347 rc = ena_com_mmio_reg_read_request_init(ena_dev);
3348 if (rc) {
3349 dev_err(dev, "Failed to init mmio read less\n");
3350 return rc;
3351 }
3352
3353 /* The PCIe configuration space revision id indicate if mmio reg
3354 * read is disabled
3355 */
3356 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3357 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3358
3359 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3360 if (rc) {
3361 dev_err(dev, "Can not reset device\n");
3362 goto err_mmio_read_less;
3363 }
3364
3365 rc = ena_com_validate_version(ena_dev);
3366 if (rc) {
3367 dev_err(dev, "Device version is too low\n");
3368 goto err_mmio_read_less;
3369 }
3370
3371 dma_width = ena_com_get_dma_width(ena_dev);
3372 if (dma_width < 0) {
3373 dev_err(dev, "Invalid dma width value %d", dma_width);
3374 rc = dma_width;
3375 goto err_mmio_read_less;
3376 }
3377
3378 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));
3379 if (rc) {
3380 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);
3381 goto err_mmio_read_less;
3382 }
3383
3384 /* ENA admin level init */
3385 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3386 if (rc) {
3387 dev_err(dev,
3388 "Can not initialize ena admin queue with device\n");
3389 goto err_mmio_read_less;
3390 }
3391
3392 /* To enable the msix interrupts the driver needs to know the number
3393 * of queues. So the driver uses polling mode to retrieve this
3394 * information
3395 */
3396 ena_com_set_admin_polling_mode(ena_dev, true);
3397
3398 ena_config_host_info(ena_dev, pdev);
3399
3400 /* Get Device Attributes*/
3401 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3402 if (rc) {
3403 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3404 goto err_admin_init;
3405 }
3406
3407 /* Try to turn all the available aenq groups */
3408 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3409 BIT(ENA_ADMIN_FATAL_ERROR) |
3410 BIT(ENA_ADMIN_WARNING) |
3411 BIT(ENA_ADMIN_NOTIFICATION) |
3412 BIT(ENA_ADMIN_KEEP_ALIVE);
3413
3414 aenq_groups &= get_feat_ctx->aenq.supported_groups;
3415
3416 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3417 if (rc) {
3418 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3419 goto err_admin_init;
3420 }
3421
3422 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3423
3424 set_default_llq_configurations(&llq_config);
3425
3426 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
3427 &llq_config);
3428 if (rc) {
3429 dev_err(dev, "ENA device init failed\n");
3430 goto err_admin_init;
3431 }
3432
3433 return 0;
3434
3435 err_admin_init:
3436 ena_com_delete_host_info(ena_dev);
3437 ena_com_admin_destroy(ena_dev);
3438 err_mmio_read_less:
3439 ena_com_mmio_reg_read_request_destroy(ena_dev);
3440
3441 return rc;
3442 }
3443
ena_enable_msix_and_set_admin_interrupts(struct ena_adapter * adapter)3444 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
3445 {
3446 struct ena_com_dev *ena_dev = adapter->ena_dev;
3447 struct device *dev = &adapter->pdev->dev;
3448 int rc;
3449
3450 rc = ena_enable_msix(adapter);
3451 if (rc) {
3452 dev_err(dev, "Can not reserve msix vectors\n");
3453 return rc;
3454 }
3455
3456 ena_setup_mgmnt_intr(adapter);
3457
3458 rc = ena_request_mgmnt_irq(adapter);
3459 if (rc) {
3460 dev_err(dev, "Can not setup management interrupts\n");
3461 goto err_disable_msix;
3462 }
3463
3464 ena_com_set_admin_polling_mode(ena_dev, false);
3465
3466 ena_com_admin_aenq_enable(ena_dev);
3467
3468 return 0;
3469
3470 err_disable_msix:
3471 ena_disable_msix(adapter);
3472
3473 return rc;
3474 }
3475
ena_destroy_device(struct ena_adapter * adapter,bool graceful)3476 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3477 {
3478 struct net_device *netdev = adapter->netdev;
3479 struct ena_com_dev *ena_dev = adapter->ena_dev;
3480 bool dev_up;
3481
3482 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3483 return;
3484
3485 netif_carrier_off(netdev);
3486
3487 del_timer_sync(&adapter->timer_service);
3488
3489 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
3490 adapter->dev_up_before_reset = dev_up;
3491 if (!graceful)
3492 ena_com_set_admin_running_state(ena_dev, false);
3493
3494 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3495 ena_down(adapter);
3496
3497 /* Stop the device from sending AENQ events (in case reset flag is set
3498 * and device is up, ena_down() already reset the device.
3499 */
3500 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3501 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3502
3503 ena_free_mgmnt_irq(adapter);
3504
3505 ena_disable_msix(adapter);
3506
3507 ena_com_abort_admin_commands(ena_dev);
3508
3509 ena_com_wait_for_abort_completion(ena_dev);
3510
3511 ena_com_admin_destroy(ena_dev);
3512
3513 ena_com_mmio_reg_read_request_destroy(ena_dev);
3514
3515 /* return reset reason to default value */
3516 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3517
3518 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3519 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3520 }
3521
ena_restore_device(struct ena_adapter * adapter)3522 static int ena_restore_device(struct ena_adapter *adapter)
3523 {
3524 struct ena_com_dev_get_features_ctx get_feat_ctx;
3525 struct ena_com_dev *ena_dev = adapter->ena_dev;
3526 struct pci_dev *pdev = adapter->pdev;
3527 bool wd_state;
3528 int rc;
3529
3530 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3531 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
3532 if (rc) {
3533 dev_err(&pdev->dev, "Can not initialize device\n");
3534 goto err;
3535 }
3536 adapter->wd_state = wd_state;
3537
3538 rc = ena_device_validate_params(adapter, &get_feat_ctx);
3539 if (rc) {
3540 dev_err(&pdev->dev, "Validation of device parameters failed\n");
3541 goto err_device_destroy;
3542 }
3543
3544 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3545 if (rc) {
3546 dev_err(&pdev->dev, "Enable MSI-X failed\n");
3547 goto err_device_destroy;
3548 }
3549 /* If the interface was up before the reset bring it up */
3550 if (adapter->dev_up_before_reset) {
3551 rc = ena_up(adapter);
3552 if (rc) {
3553 dev_err(&pdev->dev, "Failed to create I/O queues\n");
3554 goto err_disable_msix;
3555 }
3556 }
3557
3558 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3559
3560 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3561 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3562 netif_carrier_on(adapter->netdev);
3563
3564 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3565 adapter->last_keep_alive_jiffies = jiffies;
3566
3567 dev_err(&pdev->dev, "Device reset completed successfully\n");
3568
3569 return rc;
3570 err_disable_msix:
3571 ena_free_mgmnt_irq(adapter);
3572 ena_disable_msix(adapter);
3573 err_device_destroy:
3574 ena_com_abort_admin_commands(ena_dev);
3575 ena_com_wait_for_abort_completion(ena_dev);
3576 ena_com_admin_destroy(ena_dev);
3577 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3578 ena_com_mmio_reg_read_request_destroy(ena_dev);
3579 err:
3580 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3581 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3582 dev_err(&pdev->dev,
3583 "Reset attempt failed. Can not reset the device\n");
3584
3585 return rc;
3586 }
3587
ena_fw_reset_device(struct work_struct * work)3588 static void ena_fw_reset_device(struct work_struct *work)
3589 {
3590 struct ena_adapter *adapter =
3591 container_of(work, struct ena_adapter, reset_task);
3592
3593 rtnl_lock();
3594
3595 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3596 ena_destroy_device(adapter, false);
3597 ena_restore_device(adapter);
3598 }
3599
3600 rtnl_unlock();
3601 }
3602
check_for_rx_interrupt_queue(struct ena_adapter * adapter,struct ena_ring * rx_ring)3603 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3604 struct ena_ring *rx_ring)
3605 {
3606 if (likely(rx_ring->first_interrupt))
3607 return 0;
3608
3609 if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3610 return 0;
3611
3612 rx_ring->no_interrupt_event_cnt++;
3613
3614 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3615 netif_err(adapter, rx_err, adapter->netdev,
3616 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3617 rx_ring->qid);
3618 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3619 smp_mb__before_atomic();
3620 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3621 return -EIO;
3622 }
3623
3624 return 0;
3625 }
3626
check_missing_comp_in_tx_queue(struct ena_adapter * adapter,struct ena_ring * tx_ring)3627 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3628 struct ena_ring *tx_ring)
3629 {
3630 struct ena_tx_buffer *tx_buf;
3631 unsigned long last_jiffies;
3632 u32 missed_tx = 0;
3633 int i, rc = 0;
3634
3635 for (i = 0; i < tx_ring->ring_size; i++) {
3636 tx_buf = &tx_ring->tx_buffer_info[i];
3637 last_jiffies = tx_buf->last_jiffies;
3638
3639 if (last_jiffies == 0)
3640 /* no pending Tx at this location */
3641 continue;
3642
3643 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
3644 2 * adapter->missing_tx_completion_to))) {
3645 /* If after graceful period interrupt is still not
3646 * received, we schedule a reset
3647 */
3648 netif_err(adapter, tx_err, adapter->netdev,
3649 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3650 tx_ring->qid);
3651 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3652 smp_mb__before_atomic();
3653 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3654 return -EIO;
3655 }
3656
3657 if (unlikely(time_is_before_jiffies(last_jiffies +
3658 adapter->missing_tx_completion_to))) {
3659 if (!tx_buf->print_once)
3660 netif_notice(adapter, tx_err, adapter->netdev,
3661 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
3662 tx_ring->qid, i);
3663
3664 tx_buf->print_once = 1;
3665 missed_tx++;
3666 }
3667 }
3668
3669 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3670 netif_err(adapter, tx_err, adapter->netdev,
3671 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3672 missed_tx,
3673 adapter->missing_tx_completion_threshold);
3674 adapter->reset_reason =
3675 ENA_REGS_RESET_MISS_TX_CMPL;
3676 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3677 rc = -EIO;
3678 }
3679
3680 u64_stats_update_begin(&tx_ring->syncp);
3681 tx_ring->tx_stats.missed_tx += missed_tx;
3682 u64_stats_update_end(&tx_ring->syncp);
3683
3684 return rc;
3685 }
3686
check_for_missing_completions(struct ena_adapter * adapter)3687 static void check_for_missing_completions(struct ena_adapter *adapter)
3688 {
3689 struct ena_ring *tx_ring;
3690 struct ena_ring *rx_ring;
3691 int i, budget, rc;
3692 int io_queue_count;
3693
3694 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
3695 /* Make sure the driver doesn't turn the device in other process */
3696 smp_rmb();
3697
3698 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3699 return;
3700
3701 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3702 return;
3703
3704 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
3705 return;
3706
3707 budget = ENA_MONITORED_TX_QUEUES;
3708
3709 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
3710 tx_ring = &adapter->tx_ring[i];
3711 rx_ring = &adapter->rx_ring[i];
3712
3713 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3714 if (unlikely(rc))
3715 return;
3716
3717 rc = !ENA_IS_XDP_INDEX(adapter, i) ?
3718 check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
3719 if (unlikely(rc))
3720 return;
3721
3722 budget--;
3723 if (!budget)
3724 break;
3725 }
3726
3727 adapter->last_monitored_tx_qid = i % io_queue_count;
3728 }
3729
3730 /* trigger napi schedule after 2 consecutive detections */
3731 #define EMPTY_RX_REFILL 2
3732 /* For the rare case where the device runs out of Rx descriptors and the
3733 * napi handler failed to refill new Rx descriptors (due to a lack of memory
3734 * for example).
3735 * This case will lead to a deadlock:
3736 * The device won't send interrupts since all the new Rx packets will be dropped
3737 * The napi handler won't allocate new Rx descriptors so the device will be
3738 * able to send new packets.
3739 *
3740 * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
3741 * It is recommended to have at least 512MB, with a minimum of 128MB for
3742 * constrained environment).
3743 *
3744 * When such a situation is detected - Reschedule napi
3745 */
check_for_empty_rx_ring(struct ena_adapter * adapter)3746 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
3747 {
3748 struct ena_ring *rx_ring;
3749 int i, refill_required;
3750
3751 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3752 return;
3753
3754 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3755 return;
3756
3757 for (i = 0; i < adapter->num_io_queues; i++) {
3758 rx_ring = &adapter->rx_ring[i];
3759
3760 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
3761 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3762 rx_ring->empty_rx_queue++;
3763
3764 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3765 u64_stats_update_begin(&rx_ring->syncp);
3766 rx_ring->rx_stats.empty_rx_ring++;
3767 u64_stats_update_end(&rx_ring->syncp);
3768
3769 netif_err(adapter, drv, adapter->netdev,
3770 "Trigger refill for ring %d\n", i);
3771
3772 napi_schedule(rx_ring->napi);
3773 rx_ring->empty_rx_queue = 0;
3774 }
3775 } else {
3776 rx_ring->empty_rx_queue = 0;
3777 }
3778 }
3779 }
3780
3781 /* Check for keep alive expiration */
check_for_missing_keep_alive(struct ena_adapter * adapter)3782 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3783 {
3784 unsigned long keep_alive_expired;
3785
3786 if (!adapter->wd_state)
3787 return;
3788
3789 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3790 return;
3791
3792 keep_alive_expired = adapter->last_keep_alive_jiffies +
3793 adapter->keep_alive_timeout;
3794 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3795 netif_err(adapter, drv, adapter->netdev,
3796 "Keep alive watchdog timeout.\n");
3797 u64_stats_update_begin(&adapter->syncp);
3798 adapter->dev_stats.wd_expired++;
3799 u64_stats_update_end(&adapter->syncp);
3800 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3801 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3802 }
3803 }
3804
check_for_admin_com_state(struct ena_adapter * adapter)3805 static void check_for_admin_com_state(struct ena_adapter *adapter)
3806 {
3807 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3808 netif_err(adapter, drv, adapter->netdev,
3809 "ENA admin queue is not in running state!\n");
3810 u64_stats_update_begin(&adapter->syncp);
3811 adapter->dev_stats.admin_q_pause++;
3812 u64_stats_update_end(&adapter->syncp);
3813 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3814 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3815 }
3816 }
3817
ena_update_hints(struct ena_adapter * adapter,struct ena_admin_ena_hw_hints * hints)3818 static void ena_update_hints(struct ena_adapter *adapter,
3819 struct ena_admin_ena_hw_hints *hints)
3820 {
3821 struct net_device *netdev = adapter->netdev;
3822
3823 if (hints->admin_completion_tx_timeout)
3824 adapter->ena_dev->admin_queue.completion_timeout =
3825 hints->admin_completion_tx_timeout * 1000;
3826
3827 if (hints->mmio_read_timeout)
3828 /* convert to usec */
3829 adapter->ena_dev->mmio_read.reg_read_to =
3830 hints->mmio_read_timeout * 1000;
3831
3832 if (hints->missed_tx_completion_count_threshold_to_reset)
3833 adapter->missing_tx_completion_threshold =
3834 hints->missed_tx_completion_count_threshold_to_reset;
3835
3836 if (hints->missing_tx_completion_timeout) {
3837 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3838 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3839 else
3840 adapter->missing_tx_completion_to =
3841 msecs_to_jiffies(hints->missing_tx_completion_timeout);
3842 }
3843
3844 if (hints->netdev_wd_timeout)
3845 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3846
3847 if (hints->driver_watchdog_timeout) {
3848 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3849 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3850 else
3851 adapter->keep_alive_timeout =
3852 msecs_to_jiffies(hints->driver_watchdog_timeout);
3853 }
3854 }
3855
ena_update_host_info(struct ena_admin_host_info * host_info,struct net_device * netdev)3856 static void ena_update_host_info(struct ena_admin_host_info *host_info,
3857 struct net_device *netdev)
3858 {
3859 host_info->supported_network_features[0] =
3860 netdev->features & GENMASK_ULL(31, 0);
3861 host_info->supported_network_features[1] =
3862 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
3863 }
3864
ena_timer_service(struct timer_list * t)3865 static void ena_timer_service(struct timer_list *t)
3866 {
3867 struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3868 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3869 struct ena_admin_host_info *host_info =
3870 adapter->ena_dev->host_attr.host_info;
3871
3872 check_for_missing_keep_alive(adapter);
3873
3874 check_for_admin_com_state(adapter);
3875
3876 check_for_missing_completions(adapter);
3877
3878 check_for_empty_rx_ring(adapter);
3879
3880 if (debug_area)
3881 ena_dump_stats_to_buf(adapter, debug_area);
3882
3883 if (host_info)
3884 ena_update_host_info(host_info, adapter->netdev);
3885
3886 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3887 netif_err(adapter, drv, adapter->netdev,
3888 "Trigger reset is on\n");
3889 ena_dump_stats_to_dmesg(adapter);
3890 queue_work(ena_wq, &adapter->reset_task);
3891 return;
3892 }
3893
3894 /* Reset the timer */
3895 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3896 }
3897
ena_calc_max_io_queue_num(struct pci_dev * pdev,struct ena_com_dev * ena_dev,struct ena_com_dev_get_features_ctx * get_feat_ctx)3898 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev,
3899 struct ena_com_dev *ena_dev,
3900 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3901 {
3902 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
3903
3904 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3905 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3906 &get_feat_ctx->max_queue_ext.max_queue_ext;
3907 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
3908 max_queue_ext->max_rx_cq_num);
3909
3910 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3911 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3912 } else {
3913 struct ena_admin_queue_feature_desc *max_queues =
3914 &get_feat_ctx->max_queues;
3915 io_tx_sq_num = max_queues->max_sq_num;
3916 io_tx_cq_num = max_queues->max_cq_num;
3917 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
3918 }
3919
3920 /* In case of LLQ use the llq fields for the tx SQ/CQ */
3921 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3922 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
3923
3924 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3925 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
3926 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
3927 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
3928 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3929 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
3930
3931 return max_num_io_queues;
3932 }
3933
ena_set_dev_offloads(struct ena_com_dev_get_features_ctx * feat,struct net_device * netdev)3934 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3935 struct net_device *netdev)
3936 {
3937 netdev_features_t dev_features = 0;
3938
3939 /* Set offload features */
3940 if (feat->offload.tx &
3941 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3942 dev_features |= NETIF_F_IP_CSUM;
3943
3944 if (feat->offload.tx &
3945 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3946 dev_features |= NETIF_F_IPV6_CSUM;
3947
3948 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3949 dev_features |= NETIF_F_TSO;
3950
3951 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3952 dev_features |= NETIF_F_TSO6;
3953
3954 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3955 dev_features |= NETIF_F_TSO_ECN;
3956
3957 if (feat->offload.rx_supported &
3958 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3959 dev_features |= NETIF_F_RXCSUM;
3960
3961 if (feat->offload.rx_supported &
3962 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3963 dev_features |= NETIF_F_RXCSUM;
3964
3965 netdev->features =
3966 dev_features |
3967 NETIF_F_SG |
3968 NETIF_F_RXHASH |
3969 NETIF_F_HIGHDMA;
3970
3971 netdev->hw_features |= netdev->features;
3972 netdev->vlan_features |= netdev->features;
3973 }
3974
ena_set_conf_feat_params(struct ena_adapter * adapter,struct ena_com_dev_get_features_ctx * feat)3975 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3976 struct ena_com_dev_get_features_ctx *feat)
3977 {
3978 struct net_device *netdev = adapter->netdev;
3979
3980 /* Copy mac address */
3981 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3982 eth_hw_addr_random(netdev);
3983 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3984 } else {
3985 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3986 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3987 }
3988
3989 /* Set offload features */
3990 ena_set_dev_offloads(feat, netdev);
3991
3992 adapter->max_mtu = feat->dev_attr.max_mtu;
3993 netdev->max_mtu = adapter->max_mtu;
3994 netdev->min_mtu = ENA_MIN_MTU;
3995 }
3996
ena_rss_init_default(struct ena_adapter * adapter)3997 static int ena_rss_init_default(struct ena_adapter *adapter)
3998 {
3999 struct ena_com_dev *ena_dev = adapter->ena_dev;
4000 struct device *dev = &adapter->pdev->dev;
4001 int rc, i;
4002 u32 val;
4003
4004 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
4005 if (unlikely(rc)) {
4006 dev_err(dev, "Cannot init indirect table\n");
4007 goto err_rss_init;
4008 }
4009
4010 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
4011 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
4012 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
4013 ENA_IO_RXQ_IDX(val));
4014 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4015 dev_err(dev, "Cannot fill indirect table\n");
4016 goto err_fill_indir;
4017 }
4018 }
4019
4020 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL,
4021 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
4022 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4023 dev_err(dev, "Cannot fill hash function\n");
4024 goto err_fill_indir;
4025 }
4026
4027 rc = ena_com_set_default_hash_ctrl(ena_dev);
4028 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4029 dev_err(dev, "Cannot fill hash control\n");
4030 goto err_fill_indir;
4031 }
4032
4033 return 0;
4034
4035 err_fill_indir:
4036 ena_com_rss_destroy(ena_dev);
4037 err_rss_init:
4038
4039 return rc;
4040 }
4041
ena_release_bars(struct ena_com_dev * ena_dev,struct pci_dev * pdev)4042 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4043 {
4044 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4045
4046 pci_release_selected_regions(pdev, release_bars);
4047 }
4048
4049
ena_calc_io_queue_size(struct ena_calc_queue_size_ctx * ctx)4050 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
4051 {
4052 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
4053 struct ena_com_dev *ena_dev = ctx->ena_dev;
4054 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
4055 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
4056 u32 max_tx_queue_size;
4057 u32 max_rx_queue_size;
4058
4059 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
4060 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4061 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
4062 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
4063 max_queue_ext->max_rx_sq_depth);
4064 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
4065
4066 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4067 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4068 llq->max_llq_depth);
4069 else
4070 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4071 max_queue_ext->max_tx_sq_depth);
4072
4073 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4074 max_queue_ext->max_per_packet_tx_descs);
4075 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4076 max_queue_ext->max_per_packet_rx_descs);
4077 } else {
4078 struct ena_admin_queue_feature_desc *max_queues =
4079 &ctx->get_feat_ctx->max_queues;
4080 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
4081 max_queues->max_sq_depth);
4082 max_tx_queue_size = max_queues->max_cq_depth;
4083
4084 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4085 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4086 llq->max_llq_depth);
4087 else
4088 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4089 max_queues->max_sq_depth);
4090
4091 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4092 max_queues->max_packet_tx_descs);
4093 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4094 max_queues->max_packet_rx_descs);
4095 }
4096
4097 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
4098 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
4099
4100 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
4101 max_tx_queue_size);
4102 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
4103 max_rx_queue_size);
4104
4105 tx_queue_size = rounddown_pow_of_two(tx_queue_size);
4106 rx_queue_size = rounddown_pow_of_two(rx_queue_size);
4107
4108 ctx->max_tx_queue_size = max_tx_queue_size;
4109 ctx->max_rx_queue_size = max_rx_queue_size;
4110 ctx->tx_queue_size = tx_queue_size;
4111 ctx->rx_queue_size = rx_queue_size;
4112
4113 return 0;
4114 }
4115
4116 /* ena_probe - Device Initialization Routine
4117 * @pdev: PCI device information struct
4118 * @ent: entry in ena_pci_tbl
4119 *
4120 * Returns 0 on success, negative on failure
4121 *
4122 * ena_probe initializes an adapter identified by a pci_dev structure.
4123 * The OS initialization, configuring of the adapter private structure,
4124 * and a hardware reset occur.
4125 */
ena_probe(struct pci_dev * pdev,const struct pci_device_id * ent)4126 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4127 {
4128 struct ena_calc_queue_size_ctx calc_queue_ctx = {};
4129 struct ena_com_dev_get_features_ctx get_feat_ctx;
4130 struct ena_com_dev *ena_dev = NULL;
4131 struct ena_adapter *adapter;
4132 struct net_device *netdev;
4133 static int adapters_found;
4134 u32 max_num_io_queues;
4135 bool wd_state;
4136 int bars, rc;
4137
4138 dev_dbg(&pdev->dev, "%s\n", __func__);
4139
4140 rc = pci_enable_device_mem(pdev);
4141 if (rc) {
4142 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4143 return rc;
4144 }
4145
4146 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));
4147 if (rc) {
4148 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc);
4149 goto err_disable_device;
4150 }
4151
4152 pci_set_master(pdev);
4153
4154 ena_dev = vzalloc(sizeof(*ena_dev));
4155 if (!ena_dev) {
4156 rc = -ENOMEM;
4157 goto err_disable_device;
4158 }
4159
4160 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4161 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4162 if (rc) {
4163 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4164 rc);
4165 goto err_free_ena_dev;
4166 }
4167
4168 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4169 pci_resource_start(pdev, ENA_REG_BAR),
4170 pci_resource_len(pdev, ENA_REG_BAR));
4171 if (!ena_dev->reg_bar) {
4172 dev_err(&pdev->dev, "Failed to remap regs bar\n");
4173 rc = -EFAULT;
4174 goto err_free_region;
4175 }
4176
4177 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;
4178
4179 ena_dev->dmadev = &pdev->dev;
4180
4181 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
4182 if (rc) {
4183 dev_err(&pdev->dev, "ENA device init failed\n");
4184 if (rc == -ETIME)
4185 rc = -EPROBE_DEFER;
4186 goto err_free_region;
4187 }
4188
4189 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);
4190 if (rc) {
4191 dev_err(&pdev->dev, "ENA llq bar mapping failed\n");
4192 goto err_free_ena_dev;
4193 }
4194
4195 calc_queue_ctx.ena_dev = ena_dev;
4196 calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
4197 calc_queue_ctx.pdev = pdev;
4198
4199 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity.
4200 * Updated during device initialization with the real granularity
4201 */
4202 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
4203 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
4204 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
4205 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4206 rc = ena_calc_io_queue_size(&calc_queue_ctx);
4207 if (rc || !max_num_io_queues) {
4208 rc = -EFAULT;
4209 goto err_device_destroy;
4210 }
4211
4212 /* dev zeroed in init_etherdev */
4213 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), max_num_io_queues);
4214 if (!netdev) {
4215 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4216 rc = -ENOMEM;
4217 goto err_device_destroy;
4218 }
4219
4220 SET_NETDEV_DEV(netdev, &pdev->dev);
4221
4222 adapter = netdev_priv(netdev);
4223 pci_set_drvdata(pdev, adapter);
4224
4225 adapter->ena_dev = ena_dev;
4226 adapter->netdev = netdev;
4227 adapter->pdev = pdev;
4228
4229 ena_set_conf_feat_params(adapter, &get_feat_ctx);
4230
4231 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4232 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
4233
4234 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
4235 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
4236 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
4237 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
4238 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
4239 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
4240
4241 adapter->num_io_queues = max_num_io_queues;
4242 adapter->max_num_io_queues = max_num_io_queues;
4243 adapter->last_monitored_tx_qid = 0;
4244
4245 adapter->xdp_first_ring = 0;
4246 adapter->xdp_num_queues = 0;
4247
4248 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
4249 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4250 adapter->disable_meta_caching =
4251 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags &
4252 BIT(ENA_ADMIN_DISABLE_META_CACHING));
4253
4254 adapter->wd_state = wd_state;
4255
4256 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4257
4258 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4259 if (rc) {
4260 dev_err(&pdev->dev,
4261 "Failed to query interrupt moderation feature\n");
4262 goto err_netdev_destroy;
4263 }
4264 ena_init_io_rings(adapter,
4265 0,
4266 adapter->xdp_num_queues +
4267 adapter->num_io_queues);
4268
4269 netdev->netdev_ops = &ena_netdev_ops;
4270 netdev->watchdog_timeo = TX_TIMEOUT;
4271 ena_set_ethtool_ops(netdev);
4272
4273 netdev->priv_flags |= IFF_UNICAST_FLT;
4274
4275 u64_stats_init(&adapter->syncp);
4276
4277 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
4278 if (rc) {
4279 dev_err(&pdev->dev,
4280 "Failed to enable and set the admin interrupts\n");
4281 goto err_worker_destroy;
4282 }
4283 rc = ena_rss_init_default(adapter);
4284 if (rc && (rc != -EOPNOTSUPP)) {
4285 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4286 goto err_free_msix;
4287 }
4288
4289 ena_config_debug_area(adapter);
4290
4291 if (!ena_update_hw_stats(adapter))
4292 adapter->eni_stats_supported = true;
4293 else
4294 adapter->eni_stats_supported = false;
4295
4296 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4297
4298 netif_carrier_off(netdev);
4299
4300 rc = register_netdev(netdev);
4301 if (rc) {
4302 dev_err(&pdev->dev, "Cannot register net device\n");
4303 goto err_rss;
4304 }
4305
4306 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4307
4308 adapter->last_keep_alive_jiffies = jiffies;
4309 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4310 adapter->missing_tx_completion_to = TX_TIMEOUT;
4311 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4312
4313 ena_update_hints(adapter, &get_feat_ctx.hw_hints);
4314
4315 timer_setup(&adapter->timer_service, ena_timer_service, 0);
4316 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4317
4318 dev_info(&pdev->dev,
4319 "%s found at mem %lx, mac addr %pM\n",
4320 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
4321 netdev->dev_addr);
4322
4323 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4324
4325 adapters_found++;
4326
4327 return 0;
4328
4329 err_rss:
4330 ena_com_delete_debug_area(ena_dev);
4331 ena_com_rss_destroy(ena_dev);
4332 err_free_msix:
4333 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4334 /* stop submitting admin commands on a device that was reset */
4335 ena_com_set_admin_running_state(ena_dev, false);
4336 ena_free_mgmnt_irq(adapter);
4337 ena_disable_msix(adapter);
4338 err_worker_destroy:
4339 del_timer(&adapter->timer_service);
4340 err_netdev_destroy:
4341 free_netdev(netdev);
4342 err_device_destroy:
4343 ena_com_delete_host_info(ena_dev);
4344 ena_com_admin_destroy(ena_dev);
4345 err_free_region:
4346 ena_release_bars(ena_dev, pdev);
4347 err_free_ena_dev:
4348 vfree(ena_dev);
4349 err_disable_device:
4350 pci_disable_device(pdev);
4351 return rc;
4352 }
4353
4354 /*****************************************************************************/
4355
4356 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines
4357 * @pdev: PCI device information struct
4358 * @shutdown: Is it a shutdown operation? If false, means it is a removal
4359 *
4360 * __ena_shutoff is a helper routine that does the real work on shutdown and
4361 * removal paths; the difference between those paths is with regards to whether
4362 * dettach or unregister the netdevice.
4363 */
__ena_shutoff(struct pci_dev * pdev,bool shutdown)4364 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
4365 {
4366 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4367 struct ena_com_dev *ena_dev;
4368 struct net_device *netdev;
4369
4370 ena_dev = adapter->ena_dev;
4371 netdev = adapter->netdev;
4372
4373 #ifdef CONFIG_RFS_ACCEL
4374 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4375 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4376 netdev->rx_cpu_rmap = NULL;
4377 }
4378 #endif /* CONFIG_RFS_ACCEL */
4379
4380 /* Make sure timer and reset routine won't be called after
4381 * freeing device resources.
4382 */
4383 del_timer_sync(&adapter->timer_service);
4384 cancel_work_sync(&adapter->reset_task);
4385
4386 rtnl_lock(); /* lock released inside the below if-else block */
4387 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN;
4388 ena_destroy_device(adapter, true);
4389 if (shutdown) {
4390 netif_device_detach(netdev);
4391 dev_close(netdev);
4392 rtnl_unlock();
4393 } else {
4394 rtnl_unlock();
4395 unregister_netdev(netdev);
4396 free_netdev(netdev);
4397 }
4398
4399 ena_com_rss_destroy(ena_dev);
4400
4401 ena_com_delete_debug_area(ena_dev);
4402
4403 ena_com_delete_host_info(ena_dev);
4404
4405 ena_release_bars(ena_dev, pdev);
4406
4407 pci_disable_device(pdev);
4408
4409 vfree(ena_dev);
4410 }
4411
4412 /* ena_remove - Device Removal Routine
4413 * @pdev: PCI device information struct
4414 *
4415 * ena_remove is called by the PCI subsystem to alert the driver
4416 * that it should release a PCI device.
4417 */
4418
ena_remove(struct pci_dev * pdev)4419 static void ena_remove(struct pci_dev *pdev)
4420 {
4421 __ena_shutoff(pdev, false);
4422 }
4423
4424 /* ena_shutdown - Device Shutdown Routine
4425 * @pdev: PCI device information struct
4426 *
4427 * ena_shutdown is called by the PCI subsystem to alert the driver that
4428 * a shutdown/reboot (or kexec) is happening and device must be disabled.
4429 */
4430
ena_shutdown(struct pci_dev * pdev)4431 static void ena_shutdown(struct pci_dev *pdev)
4432 {
4433 __ena_shutoff(pdev, true);
4434 }
4435
4436 /* ena_suspend - PM suspend callback
4437 * @dev_d: Device information struct
4438 */
ena_suspend(struct device * dev_d)4439 static int __maybe_unused ena_suspend(struct device *dev_d)
4440 {
4441 struct pci_dev *pdev = to_pci_dev(dev_d);
4442 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4443
4444 u64_stats_update_begin(&adapter->syncp);
4445 adapter->dev_stats.suspend++;
4446 u64_stats_update_end(&adapter->syncp);
4447
4448 rtnl_lock();
4449 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4450 dev_err(&pdev->dev,
4451 "Ignoring device reset request as the device is being suspended\n");
4452 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4453 }
4454 ena_destroy_device(adapter, true);
4455 rtnl_unlock();
4456 return 0;
4457 }
4458
4459 /* ena_resume - PM resume callback
4460 * @dev_d: Device information struct
4461 */
ena_resume(struct device * dev_d)4462 static int __maybe_unused ena_resume(struct device *dev_d)
4463 {
4464 struct ena_adapter *adapter = dev_get_drvdata(dev_d);
4465 int rc;
4466
4467 u64_stats_update_begin(&adapter->syncp);
4468 adapter->dev_stats.resume++;
4469 u64_stats_update_end(&adapter->syncp);
4470
4471 rtnl_lock();
4472 rc = ena_restore_device(adapter);
4473 rtnl_unlock();
4474 return rc;
4475 }
4476
4477 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume);
4478
4479 static struct pci_driver ena_pci_driver = {
4480 .name = DRV_MODULE_NAME,
4481 .id_table = ena_pci_tbl,
4482 .probe = ena_probe,
4483 .remove = ena_remove,
4484 .shutdown = ena_shutdown,
4485 .driver.pm = &ena_pm_ops,
4486 .sriov_configure = pci_sriov_configure_simple,
4487 };
4488
ena_init(void)4489 static int __init ena_init(void)
4490 {
4491 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4492 if (!ena_wq) {
4493 pr_err("Failed to create workqueue\n");
4494 return -ENOMEM;
4495 }
4496
4497 return pci_register_driver(&ena_pci_driver);
4498 }
4499
ena_cleanup(void)4500 static void __exit ena_cleanup(void)
4501 {
4502 pci_unregister_driver(&ena_pci_driver);
4503
4504 if (ena_wq) {
4505 destroy_workqueue(ena_wq);
4506 ena_wq = NULL;
4507 }
4508 }
4509
4510 /******************************************************************************
4511 ******************************** AENQ Handlers *******************************
4512 *****************************************************************************/
4513 /* ena_update_on_link_change:
4514 * Notify the network interface about the change in link status
4515 */
ena_update_on_link_change(void * adapter_data,struct ena_admin_aenq_entry * aenq_e)4516 static void ena_update_on_link_change(void *adapter_data,
4517 struct ena_admin_aenq_entry *aenq_e)
4518 {
4519 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4520 struct ena_admin_aenq_link_change_desc *aenq_desc =
4521 (struct ena_admin_aenq_link_change_desc *)aenq_e;
4522 int status = aenq_desc->flags &
4523 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4524
4525 if (status) {
4526 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
4527 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4528 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4529 netif_carrier_on(adapter->netdev);
4530 } else {
4531 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4532 netif_carrier_off(adapter->netdev);
4533 }
4534 }
4535
ena_keep_alive_wd(void * adapter_data,struct ena_admin_aenq_entry * aenq_e)4536 static void ena_keep_alive_wd(void *adapter_data,
4537 struct ena_admin_aenq_entry *aenq_e)
4538 {
4539 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4540 struct ena_admin_aenq_keep_alive_desc *desc;
4541 u64 rx_drops;
4542 u64 tx_drops;
4543
4544 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
4545 adapter->last_keep_alive_jiffies = jiffies;
4546
4547 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
4548 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low;
4549
4550 u64_stats_update_begin(&adapter->syncp);
4551 /* These stats are accumulated by the device, so the counters indicate
4552 * all drops since last reset.
4553 */
4554 adapter->dev_stats.rx_drops = rx_drops;
4555 adapter->dev_stats.tx_drops = tx_drops;
4556 u64_stats_update_end(&adapter->syncp);
4557 }
4558
ena_notification(void * adapter_data,struct ena_admin_aenq_entry * aenq_e)4559 static void ena_notification(void *adapter_data,
4560 struct ena_admin_aenq_entry *aenq_e)
4561 {
4562 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4563 struct ena_admin_ena_hw_hints *hints;
4564
4565 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4566 "Invalid group(%x) expected %x\n",
4567 aenq_e->aenq_common_desc.group,
4568 ENA_ADMIN_NOTIFICATION);
4569
4570 switch (aenq_e->aenq_common_desc.syndrome) {
4571 case ENA_ADMIN_UPDATE_HINTS:
4572 hints = (struct ena_admin_ena_hw_hints *)
4573 (&aenq_e->inline_data_w4);
4574 ena_update_hints(adapter, hints);
4575 break;
4576 default:
4577 netif_err(adapter, drv, adapter->netdev,
4578 "Invalid aenq notification link state %d\n",
4579 aenq_e->aenq_common_desc.syndrome);
4580 }
4581 }
4582
4583 /* This handler will called for unknown event group or unimplemented handlers*/
unimplemented_aenq_handler(void * data,struct ena_admin_aenq_entry * aenq_e)4584 static void unimplemented_aenq_handler(void *data,
4585 struct ena_admin_aenq_entry *aenq_e)
4586 {
4587 struct ena_adapter *adapter = (struct ena_adapter *)data;
4588
4589 netif_err(adapter, drv, adapter->netdev,
4590 "Unknown event was received or event with unimplemented handler\n");
4591 }
4592
4593 static struct ena_aenq_handlers aenq_handlers = {
4594 .handlers = {
4595 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4596 [ENA_ADMIN_NOTIFICATION] = ena_notification,
4597 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4598 },
4599 .unimplemented_handler = unimplemented_aenq_handler
4600 };
4601
4602 module_init(ena_init);
4603 module_exit(ena_cleanup);
4604