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1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
3 
4 #include <linux/mdio.h>
5 #include <linux/module.h>
6 #include <linux/fsl/enetc_mdio.h>
7 #include <linux/of_mdio.h>
8 #include <linux/of_net.h>
9 #include "enetc_pf.h"
10 
11 #define ENETC_DRV_NAME_STR "ENETC PF driver"
12 
enetc_pf_get_primary_mac_addr(struct enetc_hw * hw,int si,u8 * addr)13 static void enetc_pf_get_primary_mac_addr(struct enetc_hw *hw, int si, u8 *addr)
14 {
15 	u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si));
16 	u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si));
17 
18 	*(u32 *)addr = upper;
19 	*(u16 *)(addr + 4) = lower;
20 }
21 
enetc_pf_set_primary_mac_addr(struct enetc_hw * hw,int si,const u8 * addr)22 static void enetc_pf_set_primary_mac_addr(struct enetc_hw *hw, int si,
23 					  const u8 *addr)
24 {
25 	u32 upper = *(const u32 *)addr;
26 	u16 lower = *(const u16 *)(addr + 4);
27 
28 	__raw_writel(upper, hw->port + ENETC_PSIPMAR0(si));
29 	__raw_writew(lower, hw->port + ENETC_PSIPMAR1(si));
30 }
31 
enetc_pf_set_mac_addr(struct net_device * ndev,void * addr)32 static int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)
33 {
34 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
35 	struct sockaddr *saddr = addr;
36 
37 	if (!is_valid_ether_addr(saddr->sa_data))
38 		return -EADDRNOTAVAIL;
39 
40 	memcpy(ndev->dev_addr, saddr->sa_data, ndev->addr_len);
41 	enetc_pf_set_primary_mac_addr(&priv->si->hw, 0, saddr->sa_data);
42 
43 	return 0;
44 }
45 
enetc_set_vlan_promisc(struct enetc_hw * hw,char si_map)46 static void enetc_set_vlan_promisc(struct enetc_hw *hw, char si_map)
47 {
48 	u32 val = enetc_port_rd(hw, ENETC_PSIPVMR);
49 
50 	val &= ~ENETC_PSIPVMR_SET_VP(ENETC_VLAN_PROMISC_MAP_ALL);
51 	enetc_port_wr(hw, ENETC_PSIPVMR, ENETC_PSIPVMR_SET_VP(si_map) | val);
52 }
53 
enetc_enable_si_vlan_promisc(struct enetc_pf * pf,int si_idx)54 static void enetc_enable_si_vlan_promisc(struct enetc_pf *pf, int si_idx)
55 {
56 	pf->vlan_promisc_simap |= BIT(si_idx);
57 	enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap);
58 }
59 
enetc_disable_si_vlan_promisc(struct enetc_pf * pf,int si_idx)60 static void enetc_disable_si_vlan_promisc(struct enetc_pf *pf, int si_idx)
61 {
62 	pf->vlan_promisc_simap &= ~BIT(si_idx);
63 	enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap);
64 }
65 
enetc_set_isol_vlan(struct enetc_hw * hw,int si,u16 vlan,u8 qos)66 static void enetc_set_isol_vlan(struct enetc_hw *hw, int si, u16 vlan, u8 qos)
67 {
68 	u32 val = 0;
69 
70 	if (vlan)
71 		val = ENETC_PSIVLAN_EN | ENETC_PSIVLAN_SET_QOS(qos) | vlan;
72 
73 	enetc_port_wr(hw, ENETC_PSIVLANR(si), val);
74 }
75 
enetc_mac_addr_hash_idx(const u8 * addr)76 static int enetc_mac_addr_hash_idx(const u8 *addr)
77 {
78 	u64 fold = __swab64(ether_addr_to_u64(addr)) >> 16;
79 	u64 mask = 0;
80 	int res = 0;
81 	int i;
82 
83 	for (i = 0; i < 8; i++)
84 		mask |= BIT_ULL(i * 6);
85 
86 	for (i = 0; i < 6; i++)
87 		res |= (hweight64(fold & (mask << i)) & 0x1) << i;
88 
89 	return res;
90 }
91 
enetc_reset_mac_addr_filter(struct enetc_mac_filter * filter)92 static void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter)
93 {
94 	filter->mac_addr_cnt = 0;
95 
96 	bitmap_zero(filter->mac_hash_table,
97 		    ENETC_MADDR_HASH_TBL_SZ);
98 }
99 
enetc_add_mac_addr_em_filter(struct enetc_mac_filter * filter,const unsigned char * addr)100 static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter,
101 					 const unsigned char *addr)
102 {
103 	/* add exact match addr */
104 	ether_addr_copy(filter->mac_addr, addr);
105 	filter->mac_addr_cnt++;
106 }
107 
enetc_add_mac_addr_ht_filter(struct enetc_mac_filter * filter,const unsigned char * addr)108 static void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
109 					 const unsigned char *addr)
110 {
111 	int idx = enetc_mac_addr_hash_idx(addr);
112 
113 	/* add hash table entry */
114 	__set_bit(idx, filter->mac_hash_table);
115 	filter->mac_addr_cnt++;
116 }
117 
enetc_clear_mac_ht_flt(struct enetc_si * si,int si_idx,int type)118 static void enetc_clear_mac_ht_flt(struct enetc_si *si, int si_idx, int type)
119 {
120 	bool err = si->errata & ENETC_ERR_UCMCSWP;
121 
122 	if (type == UC) {
123 		enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), 0);
124 		enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), 0);
125 	} else { /* MC */
126 		enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), 0);
127 		enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), 0);
128 	}
129 }
130 
enetc_set_mac_ht_flt(struct enetc_si * si,int si_idx,int type,u32 * hash)131 static void enetc_set_mac_ht_flt(struct enetc_si *si, int si_idx, int type,
132 				 u32 *hash)
133 {
134 	bool err = si->errata & ENETC_ERR_UCMCSWP;
135 
136 	if (type == UC) {
137 		enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), *hash);
138 		enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), *(hash + 1));
139 	} else { /* MC */
140 		enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), *hash);
141 		enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), *(hash + 1));
142 	}
143 }
144 
enetc_sync_mac_filters(struct enetc_pf * pf)145 static void enetc_sync_mac_filters(struct enetc_pf *pf)
146 {
147 	struct enetc_mac_filter *f = pf->mac_filter;
148 	struct enetc_si *si = pf->si;
149 	int i, pos;
150 
151 	pos = EMETC_MAC_ADDR_FILT_RES;
152 
153 	for (i = 0; i < MADDR_TYPE; i++, f++) {
154 		bool em = (f->mac_addr_cnt == 1) && (i == UC);
155 		bool clear = !f->mac_addr_cnt;
156 
157 		if (clear) {
158 			if (i == UC)
159 				enetc_clear_mac_flt_entry(si, pos);
160 
161 			enetc_clear_mac_ht_flt(si, 0, i);
162 			continue;
163 		}
164 
165 		/* exact match filter */
166 		if (em) {
167 			int err;
168 
169 			enetc_clear_mac_ht_flt(si, 0, UC);
170 
171 			err = enetc_set_mac_flt_entry(si, pos, f->mac_addr,
172 						      BIT(0));
173 			if (!err)
174 				continue;
175 
176 			/* fallback to HT filtering */
177 			dev_warn(&si->pdev->dev, "fallback to HT filt (%d)\n",
178 				 err);
179 		}
180 
181 		/* hash table filter, clear EM filter for UC entries */
182 		if (i == UC)
183 			enetc_clear_mac_flt_entry(si, pos);
184 
185 		enetc_set_mac_ht_flt(si, 0, i, (u32 *)f->mac_hash_table);
186 	}
187 }
188 
enetc_pf_set_rx_mode(struct net_device * ndev)189 static void enetc_pf_set_rx_mode(struct net_device *ndev)
190 {
191 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
192 	struct enetc_pf *pf = enetc_si_priv(priv->si);
193 	struct enetc_hw *hw = &priv->si->hw;
194 	bool uprom = false, mprom = false;
195 	struct enetc_mac_filter *filter;
196 	struct netdev_hw_addr *ha;
197 	u32 psipmr = 0;
198 	bool em;
199 
200 	if (ndev->flags & IFF_PROMISC) {
201 		/* enable promisc mode for SI0 (PF) */
202 		psipmr = ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
203 		uprom = true;
204 		mprom = true;
205 	} else if (ndev->flags & IFF_ALLMULTI) {
206 		/* enable multi cast promisc mode for SI0 (PF) */
207 		psipmr = ENETC_PSIPMR_SET_MP(0);
208 		mprom = true;
209 	}
210 
211 	/* first 2 filter entries belong to PF */
212 	if (!uprom) {
213 		/* Update unicast filters */
214 		filter = &pf->mac_filter[UC];
215 		enetc_reset_mac_addr_filter(filter);
216 
217 		em = (netdev_uc_count(ndev) == 1);
218 		netdev_for_each_uc_addr(ha, ndev) {
219 			if (em) {
220 				enetc_add_mac_addr_em_filter(filter, ha->addr);
221 				break;
222 			}
223 
224 			enetc_add_mac_addr_ht_filter(filter, ha->addr);
225 		}
226 	}
227 
228 	if (!mprom) {
229 		/* Update multicast filters */
230 		filter = &pf->mac_filter[MC];
231 		enetc_reset_mac_addr_filter(filter);
232 
233 		netdev_for_each_mc_addr(ha, ndev) {
234 			if (!is_multicast_ether_addr(ha->addr))
235 				continue;
236 
237 			enetc_add_mac_addr_ht_filter(filter, ha->addr);
238 		}
239 	}
240 
241 	if (!uprom || !mprom)
242 		/* update PF entries */
243 		enetc_sync_mac_filters(pf);
244 
245 	psipmr |= enetc_port_rd(hw, ENETC_PSIPMR) &
246 		  ~(ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0));
247 	enetc_port_wr(hw, ENETC_PSIPMR, psipmr);
248 }
249 
enetc_set_vlan_ht_filter(struct enetc_hw * hw,int si_idx,u32 * hash)250 static void enetc_set_vlan_ht_filter(struct enetc_hw *hw, int si_idx,
251 				     u32 *hash)
252 {
253 	enetc_port_wr(hw, ENETC_PSIVHFR0(si_idx), *hash);
254 	enetc_port_wr(hw, ENETC_PSIVHFR1(si_idx), *(hash + 1));
255 }
256 
enetc_vid_hash_idx(unsigned int vid)257 static int enetc_vid_hash_idx(unsigned int vid)
258 {
259 	int res = 0;
260 	int i;
261 
262 	for (i = 0; i < 6; i++)
263 		res |= (hweight8(vid & (BIT(i) | BIT(i + 6))) & 0x1) << i;
264 
265 	return res;
266 }
267 
enetc_sync_vlan_ht_filter(struct enetc_pf * pf,bool rehash)268 static void enetc_sync_vlan_ht_filter(struct enetc_pf *pf, bool rehash)
269 {
270 	int i;
271 
272 	if (rehash) {
273 		bitmap_zero(pf->vlan_ht_filter, ENETC_VLAN_HT_SIZE);
274 
275 		for_each_set_bit(i, pf->active_vlans, VLAN_N_VID) {
276 			int hidx = enetc_vid_hash_idx(i);
277 
278 			__set_bit(hidx, pf->vlan_ht_filter);
279 		}
280 	}
281 
282 	enetc_set_vlan_ht_filter(&pf->si->hw, 0, (u32 *)pf->vlan_ht_filter);
283 }
284 
enetc_vlan_rx_add_vid(struct net_device * ndev,__be16 prot,u16 vid)285 static int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid)
286 {
287 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
288 	struct enetc_pf *pf = enetc_si_priv(priv->si);
289 	int idx;
290 
291 	__set_bit(vid, pf->active_vlans);
292 
293 	idx = enetc_vid_hash_idx(vid);
294 	if (!__test_and_set_bit(idx, pf->vlan_ht_filter))
295 		enetc_sync_vlan_ht_filter(pf, false);
296 
297 	return 0;
298 }
299 
enetc_vlan_rx_del_vid(struct net_device * ndev,__be16 prot,u16 vid)300 static int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid)
301 {
302 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
303 	struct enetc_pf *pf = enetc_si_priv(priv->si);
304 
305 	__clear_bit(vid, pf->active_vlans);
306 	enetc_sync_vlan_ht_filter(pf, true);
307 
308 	return 0;
309 }
310 
enetc_set_loopback(struct net_device * ndev,bool en)311 static void enetc_set_loopback(struct net_device *ndev, bool en)
312 {
313 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
314 	struct enetc_hw *hw = &priv->si->hw;
315 	u32 reg;
316 
317 	reg = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
318 	if (reg & ENETC_PM0_IFM_RG) {
319 		/* RGMII mode */
320 		reg = (reg & ~ENETC_PM0_IFM_RLP) |
321 		      (en ? ENETC_PM0_IFM_RLP : 0);
322 		enetc_port_wr(hw, ENETC_PM0_IF_MODE, reg);
323 	} else {
324 		/* assume SGMII mode */
325 		reg = enetc_port_rd(hw, ENETC_PM0_CMD_CFG);
326 		reg = (reg & ~ENETC_PM0_CMD_XGLP) |
327 		      (en ? ENETC_PM0_CMD_XGLP : 0);
328 		reg = (reg & ~ENETC_PM0_CMD_PHY_TX_EN) |
329 		      (en ? ENETC_PM0_CMD_PHY_TX_EN : 0);
330 		enetc_port_wr(hw, ENETC_PM0_CMD_CFG, reg);
331 		enetc_port_wr(hw, ENETC_PM1_CMD_CFG, reg);
332 	}
333 }
334 
enetc_pf_set_vf_mac(struct net_device * ndev,int vf,u8 * mac)335 static int enetc_pf_set_vf_mac(struct net_device *ndev, int vf, u8 *mac)
336 {
337 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
338 	struct enetc_pf *pf = enetc_si_priv(priv->si);
339 	struct enetc_vf_state *vf_state;
340 
341 	if (vf >= pf->total_vfs)
342 		return -EINVAL;
343 
344 	if (!is_valid_ether_addr(mac))
345 		return -EADDRNOTAVAIL;
346 
347 	vf_state = &pf->vf_state[vf];
348 	vf_state->flags |= ENETC_VF_FLAG_PF_SET_MAC;
349 	enetc_pf_set_primary_mac_addr(&priv->si->hw, vf + 1, mac);
350 	return 0;
351 }
352 
enetc_pf_set_vf_vlan(struct net_device * ndev,int vf,u16 vlan,u8 qos,__be16 proto)353 static int enetc_pf_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan,
354 				u8 qos, __be16 proto)
355 {
356 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
357 	struct enetc_pf *pf = enetc_si_priv(priv->si);
358 
359 	if (priv->si->errata & ENETC_ERR_VLAN_ISOL)
360 		return -EOPNOTSUPP;
361 
362 	if (vf >= pf->total_vfs)
363 		return -EINVAL;
364 
365 	if (proto != htons(ETH_P_8021Q))
366 		/* only C-tags supported for now */
367 		return -EPROTONOSUPPORT;
368 
369 	enetc_set_isol_vlan(&priv->si->hw, vf + 1, vlan, qos);
370 	return 0;
371 }
372 
enetc_pf_set_vf_spoofchk(struct net_device * ndev,int vf,bool en)373 static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en)
374 {
375 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
376 	struct enetc_pf *pf = enetc_si_priv(priv->si);
377 	u32 cfgr;
378 
379 	if (vf >= pf->total_vfs)
380 		return -EINVAL;
381 
382 	cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1));
383 	cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0);
384 	enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr);
385 
386 	return 0;
387 }
388 
enetc_port_setup_primary_mac_address(struct enetc_si * si)389 static void enetc_port_setup_primary_mac_address(struct enetc_si *si)
390 {
391 	unsigned char mac_addr[MAX_ADDR_LEN];
392 	struct enetc_pf *pf = enetc_si_priv(si);
393 	struct enetc_hw *hw = &si->hw;
394 	int i;
395 
396 	/* check MAC addresses for PF and all VFs, if any is 0 set it ro rand */
397 	for (i = 0; i < pf->total_vfs + 1; i++) {
398 		enetc_pf_get_primary_mac_addr(hw, i, mac_addr);
399 		if (!is_zero_ether_addr(mac_addr))
400 			continue;
401 		eth_random_addr(mac_addr);
402 		dev_info(&si->pdev->dev, "no MAC address specified for SI%d, using %pM\n",
403 			 i, mac_addr);
404 		enetc_pf_set_primary_mac_addr(hw, i, mac_addr);
405 	}
406 }
407 
enetc_port_assign_rfs_entries(struct enetc_si * si)408 static void enetc_port_assign_rfs_entries(struct enetc_si *si)
409 {
410 	struct enetc_pf *pf = enetc_si_priv(si);
411 	struct enetc_hw *hw = &si->hw;
412 	int num_entries, vf_entries, i;
413 	u32 val;
414 
415 	/* split RFS entries between functions */
416 	val = enetc_port_rd(hw, ENETC_PRFSCAPR);
417 	num_entries = ENETC_PRFSCAPR_GET_NUM_RFS(val);
418 	vf_entries = num_entries / (pf->total_vfs + 1);
419 
420 	for (i = 0; i < pf->total_vfs; i++)
421 		enetc_port_wr(hw, ENETC_PSIRFSCFGR(i + 1), vf_entries);
422 	enetc_port_wr(hw, ENETC_PSIRFSCFGR(0),
423 		      num_entries - vf_entries * pf->total_vfs);
424 
425 	/* enable RFS on port */
426 	enetc_port_wr(hw, ENETC_PRFSMR, ENETC_PRFSMR_RFSE);
427 }
428 
enetc_port_si_configure(struct enetc_si * si)429 static void enetc_port_si_configure(struct enetc_si *si)
430 {
431 	struct enetc_pf *pf = enetc_si_priv(si);
432 	struct enetc_hw *hw = &si->hw;
433 	int num_rings, i;
434 	u32 val;
435 
436 	val = enetc_port_rd(hw, ENETC_PCAPR0);
437 	num_rings = min(ENETC_PCAPR0_RXBDR(val), ENETC_PCAPR0_TXBDR(val));
438 
439 	val = ENETC_PSICFGR0_SET_TXBDR(ENETC_PF_NUM_RINGS);
440 	val |= ENETC_PSICFGR0_SET_RXBDR(ENETC_PF_NUM_RINGS);
441 
442 	if (unlikely(num_rings < ENETC_PF_NUM_RINGS)) {
443 		val = ENETC_PSICFGR0_SET_TXBDR(num_rings);
444 		val |= ENETC_PSICFGR0_SET_RXBDR(num_rings);
445 
446 		dev_warn(&si->pdev->dev, "Found %d rings, expected %d!\n",
447 			 num_rings, ENETC_PF_NUM_RINGS);
448 
449 		num_rings = 0;
450 	}
451 
452 	/* Add default one-time settings for SI0 (PF) */
453 	val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
454 
455 	enetc_port_wr(hw, ENETC_PSICFGR0(0), val);
456 
457 	if (num_rings)
458 		num_rings -= ENETC_PF_NUM_RINGS;
459 
460 	/* Configure the SIs for each available VF */
461 	val = ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
462 	val |= ENETC_PSICFGR0_VTE | ENETC_PSICFGR0_SIVIE;
463 
464 	if (num_rings) {
465 		num_rings /= pf->total_vfs;
466 		val |= ENETC_PSICFGR0_SET_TXBDR(num_rings);
467 		val |= ENETC_PSICFGR0_SET_RXBDR(num_rings);
468 	}
469 
470 	for (i = 0; i < pf->total_vfs; i++)
471 		enetc_port_wr(hw, ENETC_PSICFGR0(i + 1), val);
472 
473 	/* Port level VLAN settings */
474 	val = ENETC_PVCLCTR_OVTPIDL(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
475 	enetc_port_wr(hw, ENETC_PVCLCTR, val);
476 	/* use outer tag for VLAN filtering */
477 	enetc_port_wr(hw, ENETC_PSIVLANFMR, ENETC_PSIVLANFMR_VS);
478 }
479 
enetc_configure_port_mac(struct enetc_hw * hw)480 static void enetc_configure_port_mac(struct enetc_hw *hw)
481 {
482 	enetc_port_wr(hw, ENETC_PM0_MAXFRM,
483 		      ENETC_SET_MAXFRM(ENETC_RX_MAXFRM_SIZE));
484 
485 	enetc_port_wr(hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE);
486 	enetc_port_wr(hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE);
487 
488 	enetc_port_wr(hw, ENETC_PM0_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN |
489 		      ENETC_PM0_CMD_TXP	| ENETC_PM0_PROMISC);
490 
491 	enetc_port_wr(hw, ENETC_PM1_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN |
492 		      ENETC_PM0_CMD_TXP	| ENETC_PM0_PROMISC);
493 
494 	/* On LS1028A, the MAC RX FIFO defaults to 2, which is too high
495 	 * and may lead to RX lock-up under traffic. Set it to 1 instead,
496 	 * as recommended by the hardware team.
497 	 */
498 	enetc_port_wr(hw, ENETC_PM0_RX_FIFO, ENETC_PM0_RX_FIFO_VAL);
499 }
500 
enetc_mac_config(struct enetc_hw * hw,phy_interface_t phy_mode)501 static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode)
502 {
503 	u32 val;
504 
505 	if (phy_interface_mode_is_rgmii(phy_mode)) {
506 		val = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
507 		val &= ~(ENETC_PM0_IFM_EN_AUTO | ENETC_PM0_IFM_IFMODE_MASK);
508 		val |= ENETC_PM0_IFM_IFMODE_GMII | ENETC_PM0_IFM_RG;
509 		enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
510 	}
511 
512 	if (phy_mode == PHY_INTERFACE_MODE_USXGMII) {
513 		val = ENETC_PM0_IFM_FULL_DPX | ENETC_PM0_IFM_IFMODE_XGMII;
514 		enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
515 	}
516 }
517 
enetc_mac_enable(struct enetc_hw * hw,bool en)518 static void enetc_mac_enable(struct enetc_hw *hw, bool en)
519 {
520 	u32 val = enetc_port_rd(hw, ENETC_PM0_CMD_CFG);
521 
522 	val &= ~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
523 	val |= en ? (ENETC_PM0_TX_EN | ENETC_PM0_RX_EN) : 0;
524 
525 	enetc_port_wr(hw, ENETC_PM0_CMD_CFG, val);
526 	enetc_port_wr(hw, ENETC_PM1_CMD_CFG, val);
527 }
528 
enetc_configure_port_pmac(struct enetc_hw * hw)529 static void enetc_configure_port_pmac(struct enetc_hw *hw)
530 {
531 	u32 temp;
532 
533 	/* Set pMAC step lock */
534 	temp = enetc_port_rd(hw, ENETC_PFPMR);
535 	enetc_port_wr(hw, ENETC_PFPMR,
536 		      temp | ENETC_PFPMR_PMACE | ENETC_PFPMR_MWLM);
537 
538 	temp = enetc_port_rd(hw, ENETC_MMCSR);
539 	enetc_port_wr(hw, ENETC_MMCSR, temp | ENETC_MMCSR_ME);
540 }
541 
enetc_configure_port(struct enetc_pf * pf)542 static void enetc_configure_port(struct enetc_pf *pf)
543 {
544 	u8 hash_key[ENETC_RSSHASH_KEY_SIZE];
545 	struct enetc_hw *hw = &pf->si->hw;
546 
547 	enetc_configure_port_pmac(hw);
548 
549 	enetc_configure_port_mac(hw);
550 
551 	enetc_port_si_configure(pf->si);
552 
553 	/* set up hash key */
554 	get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE);
555 	enetc_set_rss_key(hw, hash_key);
556 
557 	/* split up RFS entries */
558 	enetc_port_assign_rfs_entries(pf->si);
559 
560 	/* fix-up primary MAC addresses, if not set already */
561 	enetc_port_setup_primary_mac_address(pf->si);
562 
563 	/* enforce VLAN promisc mode for all SIs */
564 	pf->vlan_promisc_simap = ENETC_VLAN_PROMISC_MAP_ALL;
565 	enetc_set_vlan_promisc(hw, pf->vlan_promisc_simap);
566 
567 	enetc_port_wr(hw, ENETC_PSIPMR, 0);
568 
569 	/* enable port */
570 	enetc_port_wr(hw, ENETC_PMR, ENETC_PMR_EN);
571 }
572 
573 /* Messaging */
enetc_msg_pf_set_vf_primary_mac_addr(struct enetc_pf * pf,int vf_id)574 static u16 enetc_msg_pf_set_vf_primary_mac_addr(struct enetc_pf *pf,
575 						int vf_id)
576 {
577 	struct enetc_vf_state *vf_state = &pf->vf_state[vf_id];
578 	struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id];
579 	struct enetc_msg_cmd_set_primary_mac *cmd;
580 	struct device *dev = &pf->si->pdev->dev;
581 	u16 cmd_id;
582 	char *addr;
583 
584 	cmd = (struct enetc_msg_cmd_set_primary_mac *)msg->vaddr;
585 	cmd_id = cmd->header.id;
586 	if (cmd_id != ENETC_MSG_CMD_MNG_ADD)
587 		return ENETC_MSG_CMD_STATUS_FAIL;
588 
589 	addr = cmd->mac.sa_data;
590 	if (vf_state->flags & ENETC_VF_FLAG_PF_SET_MAC)
591 		dev_warn(dev, "Attempt to override PF set mac addr for VF%d\n",
592 			 vf_id);
593 	else
594 		enetc_pf_set_primary_mac_addr(&pf->si->hw, vf_id + 1, addr);
595 
596 	return ENETC_MSG_CMD_STATUS_OK;
597 }
598 
enetc_msg_handle_rxmsg(struct enetc_pf * pf,int vf_id,u16 * status)599 void enetc_msg_handle_rxmsg(struct enetc_pf *pf, int vf_id, u16 *status)
600 {
601 	struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id];
602 	struct device *dev = &pf->si->pdev->dev;
603 	struct enetc_msg_cmd_header *cmd_hdr;
604 	u16 cmd_type;
605 
606 	*status = ENETC_MSG_CMD_STATUS_OK;
607 	cmd_hdr = (struct enetc_msg_cmd_header *)msg->vaddr;
608 	cmd_type = cmd_hdr->type;
609 
610 	switch (cmd_type) {
611 	case ENETC_MSG_CMD_MNG_MAC:
612 		*status = enetc_msg_pf_set_vf_primary_mac_addr(pf, vf_id);
613 		break;
614 	default:
615 		dev_err(dev, "command not supported (cmd_type: 0x%x)\n",
616 			cmd_type);
617 	}
618 }
619 
620 #ifdef CONFIG_PCI_IOV
enetc_sriov_configure(struct pci_dev * pdev,int num_vfs)621 static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs)
622 {
623 	struct enetc_si *si = pci_get_drvdata(pdev);
624 	struct enetc_pf *pf = enetc_si_priv(si);
625 	int err;
626 
627 	if (!num_vfs) {
628 		enetc_msg_psi_free(pf);
629 		kfree(pf->vf_state);
630 		pf->num_vfs = 0;
631 		pci_disable_sriov(pdev);
632 	} else {
633 		pf->num_vfs = num_vfs;
634 
635 		pf->vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state),
636 				       GFP_KERNEL);
637 		if (!pf->vf_state) {
638 			pf->num_vfs = 0;
639 			return -ENOMEM;
640 		}
641 
642 		err = enetc_msg_psi_init(pf);
643 		if (err) {
644 			dev_err(&pdev->dev, "enetc_msg_psi_init (%d)\n", err);
645 			goto err_msg_psi;
646 		}
647 
648 		err = pci_enable_sriov(pdev, num_vfs);
649 		if (err) {
650 			dev_err(&pdev->dev, "pci_enable_sriov err %d\n", err);
651 			goto err_en_sriov;
652 		}
653 	}
654 
655 	return num_vfs;
656 
657 err_en_sriov:
658 	enetc_msg_psi_free(pf);
659 err_msg_psi:
660 	kfree(pf->vf_state);
661 	pf->num_vfs = 0;
662 
663 	return err;
664 }
665 #else
666 #define enetc_sriov_configure(pdev, num_vfs)	(void)0
667 #endif
668 
enetc_pf_set_features(struct net_device * ndev,netdev_features_t features)669 static int enetc_pf_set_features(struct net_device *ndev,
670 				 netdev_features_t features)
671 {
672 	netdev_features_t changed = ndev->features ^ features;
673 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
674 
675 	if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) {
676 		struct enetc_pf *pf = enetc_si_priv(priv->si);
677 
678 		if (!!(features & NETIF_F_HW_VLAN_CTAG_FILTER))
679 			enetc_disable_si_vlan_promisc(pf, 0);
680 		else
681 			enetc_enable_si_vlan_promisc(pf, 0);
682 	}
683 
684 	if (changed & NETIF_F_LOOPBACK)
685 		enetc_set_loopback(ndev, !!(features & NETIF_F_LOOPBACK));
686 
687 	return enetc_set_features(ndev, features);
688 }
689 
690 static const struct net_device_ops enetc_ndev_ops = {
691 	.ndo_open		= enetc_open,
692 	.ndo_stop		= enetc_close,
693 	.ndo_start_xmit		= enetc_xmit,
694 	.ndo_get_stats		= enetc_get_stats,
695 	.ndo_set_mac_address	= enetc_pf_set_mac_addr,
696 	.ndo_set_rx_mode	= enetc_pf_set_rx_mode,
697 	.ndo_vlan_rx_add_vid	= enetc_vlan_rx_add_vid,
698 	.ndo_vlan_rx_kill_vid	= enetc_vlan_rx_del_vid,
699 	.ndo_set_vf_mac		= enetc_pf_set_vf_mac,
700 	.ndo_set_vf_vlan	= enetc_pf_set_vf_vlan,
701 	.ndo_set_vf_spoofchk	= enetc_pf_set_vf_spoofchk,
702 	.ndo_set_features	= enetc_pf_set_features,
703 	.ndo_do_ioctl		= enetc_ioctl,
704 	.ndo_setup_tc		= enetc_setup_tc,
705 };
706 
enetc_pf_netdev_setup(struct enetc_si * si,struct net_device * ndev,const struct net_device_ops * ndev_ops)707 static void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
708 				  const struct net_device_ops *ndev_ops)
709 {
710 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
711 
712 	SET_NETDEV_DEV(ndev, &si->pdev->dev);
713 	priv->ndev = ndev;
714 	priv->si = si;
715 	priv->dev = &si->pdev->dev;
716 	si->ndev = ndev;
717 
718 	priv->msg_enable = (NETIF_MSG_WOL << 1) - 1;
719 	ndev->netdev_ops = ndev_ops;
720 	enetc_set_ethtool_ops(ndev);
721 	ndev->watchdog_timeo = 5 * HZ;
722 	ndev->max_mtu = ENETC_MAX_MTU;
723 
724 	ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | NETIF_F_HW_CSUM |
725 			    NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
726 			    NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK;
727 	ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG |
728 			 NETIF_F_RXCSUM | NETIF_F_HW_CSUM |
729 			 NETIF_F_HW_VLAN_CTAG_TX |
730 			 NETIF_F_HW_VLAN_CTAG_RX;
731 
732 	if (si->num_rss)
733 		ndev->hw_features |= NETIF_F_RXHASH;
734 
735 	if (si->errata & ENETC_ERR_TXCSUM) {
736 		ndev->hw_features &= ~NETIF_F_HW_CSUM;
737 		ndev->features &= ~NETIF_F_HW_CSUM;
738 	}
739 
740 	ndev->priv_flags |= IFF_UNICAST_FLT;
741 
742 	if (si->hw_features & ENETC_SI_F_QBV)
743 		priv->active_offloads |= ENETC_F_QBV;
744 
745 	if (si->hw_features & ENETC_SI_F_PSFP && !enetc_psfp_enable(priv)) {
746 		priv->active_offloads |= ENETC_F_QCI;
747 		ndev->features |= NETIF_F_HW_TC;
748 		ndev->hw_features |= NETIF_F_HW_TC;
749 	}
750 
751 	/* pick up primary MAC address from SI */
752 	enetc_get_primary_mac_addr(&si->hw, ndev->dev_addr);
753 }
754 
enetc_mdio_probe(struct enetc_pf * pf,struct device_node * np)755 static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
756 {
757 	struct device *dev = &pf->si->pdev->dev;
758 	struct enetc_mdio_priv *mdio_priv;
759 	struct mii_bus *bus;
760 	int err;
761 
762 	bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));
763 	if (!bus)
764 		return -ENOMEM;
765 
766 	bus->name = "Freescale ENETC MDIO Bus";
767 	bus->read = enetc_mdio_read;
768 	bus->write = enetc_mdio_write;
769 	bus->parent = dev;
770 	mdio_priv = bus->priv;
771 	mdio_priv->hw = &pf->si->hw;
772 	mdio_priv->mdio_base = ENETC_EMDIO_BASE;
773 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
774 
775 	err = of_mdiobus_register(bus, np);
776 	if (err) {
777 		dev_err(dev, "cannot register MDIO bus\n");
778 		return err;
779 	}
780 
781 	pf->mdio = bus;
782 
783 	return 0;
784 }
785 
enetc_mdio_remove(struct enetc_pf * pf)786 static void enetc_mdio_remove(struct enetc_pf *pf)
787 {
788 	if (pf->mdio)
789 		mdiobus_unregister(pf->mdio);
790 }
791 
enetc_imdio_create(struct enetc_pf * pf)792 static int enetc_imdio_create(struct enetc_pf *pf)
793 {
794 	struct device *dev = &pf->si->pdev->dev;
795 	struct enetc_mdio_priv *mdio_priv;
796 	struct lynx_pcs *pcs_lynx;
797 	struct mdio_device *pcs;
798 	struct mii_bus *bus;
799 	int err;
800 
801 	bus = mdiobus_alloc_size(sizeof(*mdio_priv));
802 	if (!bus)
803 		return -ENOMEM;
804 
805 	bus->name = "Freescale ENETC internal MDIO Bus";
806 	bus->read = enetc_mdio_read;
807 	bus->write = enetc_mdio_write;
808 	bus->parent = dev;
809 	bus->phy_mask = ~0;
810 	mdio_priv = bus->priv;
811 	mdio_priv->hw = &pf->si->hw;
812 	mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE;
813 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));
814 
815 	err = mdiobus_register(bus);
816 	if (err) {
817 		dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);
818 		goto free_mdio_bus;
819 	}
820 
821 	pcs = mdio_device_create(bus, 0);
822 	if (IS_ERR(pcs)) {
823 		err = PTR_ERR(pcs);
824 		dev_err(dev, "cannot create pcs (%d)\n", err);
825 		goto unregister_mdiobus;
826 	}
827 
828 	pcs_lynx = lynx_pcs_create(pcs);
829 	if (!pcs_lynx) {
830 		mdio_device_free(pcs);
831 		err = -ENOMEM;
832 		dev_err(dev, "cannot create lynx pcs (%d)\n", err);
833 		goto unregister_mdiobus;
834 	}
835 
836 	pf->imdio = bus;
837 	pf->pcs = pcs_lynx;
838 
839 	return 0;
840 
841 unregister_mdiobus:
842 	mdiobus_unregister(bus);
843 free_mdio_bus:
844 	mdiobus_free(bus);
845 	return err;
846 }
847 
enetc_imdio_remove(struct enetc_pf * pf)848 static void enetc_imdio_remove(struct enetc_pf *pf)
849 {
850 	if (pf->pcs) {
851 		mdio_device_free(pf->pcs->mdio);
852 		lynx_pcs_destroy(pf->pcs);
853 	}
854 	if (pf->imdio) {
855 		mdiobus_unregister(pf->imdio);
856 		mdiobus_free(pf->imdio);
857 	}
858 }
859 
enetc_port_has_pcs(struct enetc_pf * pf)860 static bool enetc_port_has_pcs(struct enetc_pf *pf)
861 {
862 	return (pf->if_mode == PHY_INTERFACE_MODE_SGMII ||
863 		pf->if_mode == PHY_INTERFACE_MODE_2500BASEX ||
864 		pf->if_mode == PHY_INTERFACE_MODE_USXGMII);
865 }
866 
enetc_mdiobus_create(struct enetc_pf * pf,struct device_node * node)867 static int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)
868 {
869 	struct device_node *mdio_np;
870 	int err;
871 
872 	mdio_np = of_get_child_by_name(node, "mdio");
873 	if (mdio_np) {
874 		err = enetc_mdio_probe(pf, mdio_np);
875 
876 		of_node_put(mdio_np);
877 		if (err)
878 			return err;
879 	}
880 
881 	if (enetc_port_has_pcs(pf)) {
882 		err = enetc_imdio_create(pf);
883 		if (err) {
884 			enetc_mdio_remove(pf);
885 			return err;
886 		}
887 	}
888 
889 	return 0;
890 }
891 
enetc_mdiobus_destroy(struct enetc_pf * pf)892 static void enetc_mdiobus_destroy(struct enetc_pf *pf)
893 {
894 	enetc_mdio_remove(pf);
895 	enetc_imdio_remove(pf);
896 }
897 
enetc_pl_mac_validate(struct phylink_config * config,unsigned long * supported,struct phylink_link_state * state)898 static void enetc_pl_mac_validate(struct phylink_config *config,
899 				  unsigned long *supported,
900 				  struct phylink_link_state *state)
901 {
902 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
903 
904 	if (state->interface != PHY_INTERFACE_MODE_NA &&
905 	    state->interface != PHY_INTERFACE_MODE_INTERNAL &&
906 	    state->interface != PHY_INTERFACE_MODE_SGMII &&
907 	    state->interface != PHY_INTERFACE_MODE_2500BASEX &&
908 	    state->interface != PHY_INTERFACE_MODE_USXGMII &&
909 	    !phy_interface_mode_is_rgmii(state->interface)) {
910 		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
911 		return;
912 	}
913 
914 	phylink_set_port_modes(mask);
915 	phylink_set(mask, Autoneg);
916 	phylink_set(mask, Pause);
917 	phylink_set(mask, Asym_Pause);
918 	phylink_set(mask, 10baseT_Half);
919 	phylink_set(mask, 10baseT_Full);
920 	phylink_set(mask, 100baseT_Half);
921 	phylink_set(mask, 100baseT_Full);
922 	phylink_set(mask, 100baseT_Half);
923 	phylink_set(mask, 1000baseT_Half);
924 	phylink_set(mask, 1000baseT_Full);
925 
926 	if (state->interface == PHY_INTERFACE_MODE_INTERNAL ||
927 	    state->interface == PHY_INTERFACE_MODE_2500BASEX ||
928 	    state->interface == PHY_INTERFACE_MODE_USXGMII) {
929 		phylink_set(mask, 2500baseT_Full);
930 		phylink_set(mask, 2500baseX_Full);
931 	}
932 
933 	bitmap_and(supported, supported, mask,
934 		   __ETHTOOL_LINK_MODE_MASK_NBITS);
935 	bitmap_and(state->advertising, state->advertising, mask,
936 		   __ETHTOOL_LINK_MODE_MASK_NBITS);
937 }
938 
enetc_pl_mac_config(struct phylink_config * config,unsigned int mode,const struct phylink_link_state * state)939 static void enetc_pl_mac_config(struct phylink_config *config,
940 				unsigned int mode,
941 				const struct phylink_link_state *state)
942 {
943 	struct enetc_pf *pf = phylink_to_enetc_pf(config);
944 	struct enetc_ndev_priv *priv;
945 
946 	enetc_mac_config(&pf->si->hw, state->interface);
947 
948 	priv = netdev_priv(pf->si->ndev);
949 	if (pf->pcs)
950 		phylink_set_pcs(priv->phylink, &pf->pcs->pcs);
951 }
952 
enetc_force_rgmii_mac(struct enetc_hw * hw,int speed,int duplex)953 static void enetc_force_rgmii_mac(struct enetc_hw *hw, int speed, int duplex)
954 {
955 	u32 old_val, val;
956 
957 	old_val = val = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
958 
959 	if (speed == SPEED_1000) {
960 		val &= ~ENETC_PM0_IFM_SSP_MASK;
961 		val |= ENETC_PM0_IFM_SSP_1000;
962 	} else if (speed == SPEED_100) {
963 		val &= ~ENETC_PM0_IFM_SSP_MASK;
964 		val |= ENETC_PM0_IFM_SSP_100;
965 	} else if (speed == SPEED_10) {
966 		val &= ~ENETC_PM0_IFM_SSP_MASK;
967 		val |= ENETC_PM0_IFM_SSP_10;
968 	}
969 
970 	if (duplex == DUPLEX_FULL)
971 		val |= ENETC_PM0_IFM_FULL_DPX;
972 	else
973 		val &= ~ENETC_PM0_IFM_FULL_DPX;
974 
975 	if (val == old_val)
976 		return;
977 
978 	enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
979 }
980 
enetc_pl_mac_link_up(struct phylink_config * config,struct phy_device * phy,unsigned int mode,phy_interface_t interface,int speed,int duplex,bool tx_pause,bool rx_pause)981 static void enetc_pl_mac_link_up(struct phylink_config *config,
982 				 struct phy_device *phy, unsigned int mode,
983 				 phy_interface_t interface, int speed,
984 				 int duplex, bool tx_pause, bool rx_pause)
985 {
986 	struct enetc_pf *pf = phylink_to_enetc_pf(config);
987 	struct enetc_ndev_priv *priv;
988 
989 	priv = netdev_priv(pf->si->ndev);
990 	if (priv->active_offloads & ENETC_F_QBV)
991 		enetc_sched_speed_set(priv, speed);
992 
993 	if (!phylink_autoneg_inband(mode) &&
994 	    phy_interface_mode_is_rgmii(interface))
995 		enetc_force_rgmii_mac(&pf->si->hw, speed, duplex);
996 
997 	enetc_mac_enable(&pf->si->hw, true);
998 }
999 
enetc_pl_mac_link_down(struct phylink_config * config,unsigned int mode,phy_interface_t interface)1000 static void enetc_pl_mac_link_down(struct phylink_config *config,
1001 				   unsigned int mode,
1002 				   phy_interface_t interface)
1003 {
1004 	struct enetc_pf *pf = phylink_to_enetc_pf(config);
1005 
1006 	enetc_mac_enable(&pf->si->hw, false);
1007 }
1008 
1009 static const struct phylink_mac_ops enetc_mac_phylink_ops = {
1010 	.validate = enetc_pl_mac_validate,
1011 	.mac_config = enetc_pl_mac_config,
1012 	.mac_link_up = enetc_pl_mac_link_up,
1013 	.mac_link_down = enetc_pl_mac_link_down,
1014 };
1015 
enetc_phylink_create(struct enetc_ndev_priv * priv,struct device_node * node)1016 static int enetc_phylink_create(struct enetc_ndev_priv *priv,
1017 				struct device_node *node)
1018 {
1019 	struct enetc_pf *pf = enetc_si_priv(priv->si);
1020 	struct phylink *phylink;
1021 	int err;
1022 
1023 	pf->phylink_config.dev = &priv->ndev->dev;
1024 	pf->phylink_config.type = PHYLINK_NETDEV;
1025 
1026 	phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node),
1027 				 pf->if_mode, &enetc_mac_phylink_ops);
1028 	if (IS_ERR(phylink)) {
1029 		err = PTR_ERR(phylink);
1030 		return err;
1031 	}
1032 
1033 	priv->phylink = phylink;
1034 
1035 	return 0;
1036 }
1037 
enetc_phylink_destroy(struct enetc_ndev_priv * priv)1038 static void enetc_phylink_destroy(struct enetc_ndev_priv *priv)
1039 {
1040 	if (priv->phylink)
1041 		phylink_destroy(priv->phylink);
1042 }
1043 
1044 /* Initialize the entire shared memory for the flow steering entries
1045  * of this port (PF + VFs)
1046  */
enetc_init_port_rfs_memory(struct enetc_si * si)1047 static int enetc_init_port_rfs_memory(struct enetc_si *si)
1048 {
1049 	struct enetc_cmd_rfse rfse = {0};
1050 	struct enetc_hw *hw = &si->hw;
1051 	int num_rfs, i, err = 0;
1052 	u32 val;
1053 
1054 	val = enetc_port_rd(hw, ENETC_PRFSCAPR);
1055 	num_rfs = ENETC_PRFSCAPR_GET_NUM_RFS(val);
1056 
1057 	for (i = 0; i < num_rfs; i++) {
1058 		err = enetc_set_fs_entry(si, &rfse, i);
1059 		if (err)
1060 			break;
1061 	}
1062 
1063 	return err;
1064 }
1065 
enetc_init_port_rss_memory(struct enetc_si * si)1066 static int enetc_init_port_rss_memory(struct enetc_si *si)
1067 {
1068 	struct enetc_hw *hw = &si->hw;
1069 	int num_rss, err;
1070 	int *rss_table;
1071 	u32 val;
1072 
1073 	val = enetc_port_rd(hw, ENETC_PRSSCAPR);
1074 	num_rss = ENETC_PRSSCAPR_GET_NUM_RSS(val);
1075 	if (!num_rss)
1076 		return 0;
1077 
1078 	rss_table = kcalloc(num_rss, sizeof(*rss_table), GFP_KERNEL);
1079 	if (!rss_table)
1080 		return -ENOMEM;
1081 
1082 	err = enetc_set_rss_table(si, rss_table, num_rss);
1083 
1084 	kfree(rss_table);
1085 
1086 	return err;
1087 }
1088 
enetc_init_unused_port(struct enetc_si * si)1089 static void enetc_init_unused_port(struct enetc_si *si)
1090 {
1091 	struct device *dev = &si->pdev->dev;
1092 	struct enetc_hw *hw = &si->hw;
1093 	int err;
1094 
1095 	si->cbd_ring.bd_count = ENETC_CBDR_DEFAULT_SIZE;
1096 	err = enetc_alloc_cbdr(dev, &si->cbd_ring);
1097 	if (err)
1098 		return;
1099 
1100 	enetc_setup_cbdr(hw, &si->cbd_ring);
1101 
1102 	enetc_init_port_rfs_memory(si);
1103 	enetc_init_port_rss_memory(si);
1104 
1105 	enetc_clear_cbdr(hw);
1106 	enetc_free_cbdr(dev, &si->cbd_ring);
1107 }
1108 
enetc_pf_probe(struct pci_dev * pdev,const struct pci_device_id * ent)1109 static int enetc_pf_probe(struct pci_dev *pdev,
1110 			  const struct pci_device_id *ent)
1111 {
1112 	struct device_node *node = pdev->dev.of_node;
1113 	struct enetc_ndev_priv *priv;
1114 	struct net_device *ndev;
1115 	struct enetc_si *si;
1116 	struct enetc_pf *pf;
1117 	int err;
1118 
1119 	err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf));
1120 	if (err) {
1121 		dev_err(&pdev->dev, "PCI probing failed\n");
1122 		return err;
1123 	}
1124 
1125 	si = pci_get_drvdata(pdev);
1126 	if (!si->hw.port || !si->hw.global) {
1127 		err = -ENODEV;
1128 		dev_err(&pdev->dev, "could not map PF space, probing a VF?\n");
1129 		goto err_map_pf_space;
1130 	}
1131 
1132 	if (node && !of_device_is_available(node)) {
1133 		enetc_init_unused_port(si);
1134 		dev_info(&pdev->dev, "device is disabled, skipping\n");
1135 		err = -ENODEV;
1136 		goto err_device_disabled;
1137 	}
1138 
1139 	pf = enetc_si_priv(si);
1140 	pf->si = si;
1141 	pf->total_vfs = pci_sriov_get_totalvfs(pdev);
1142 
1143 	enetc_configure_port(pf);
1144 
1145 	enetc_get_si_caps(si);
1146 
1147 	ndev = alloc_etherdev_mq(sizeof(*priv), ENETC_MAX_NUM_TXQS);
1148 	if (!ndev) {
1149 		err = -ENOMEM;
1150 		dev_err(&pdev->dev, "netdev creation failed\n");
1151 		goto err_alloc_netdev;
1152 	}
1153 
1154 	enetc_pf_netdev_setup(si, ndev, &enetc_ndev_ops);
1155 
1156 	priv = netdev_priv(ndev);
1157 
1158 	enetc_init_si_rings_params(priv);
1159 
1160 	err = enetc_alloc_si_resources(priv);
1161 	if (err) {
1162 		dev_err(&pdev->dev, "SI resource alloc failed\n");
1163 		goto err_alloc_si_res;
1164 	}
1165 
1166 	err = enetc_init_port_rfs_memory(si);
1167 	if (err) {
1168 		dev_err(&pdev->dev, "Failed to initialize RFS memory\n");
1169 		goto err_init_port_rfs;
1170 	}
1171 
1172 	err = enetc_init_port_rss_memory(si);
1173 	if (err) {
1174 		dev_err(&pdev->dev, "Failed to initialize RSS memory\n");
1175 		goto err_init_port_rss;
1176 	}
1177 
1178 	err = enetc_configure_si(priv);
1179 	if (err) {
1180 		dev_err(&pdev->dev, "Failed to configure SI\n");
1181 		goto err_config_si;
1182 	}
1183 
1184 	err = enetc_alloc_msix(priv);
1185 	if (err) {
1186 		dev_err(&pdev->dev, "MSIX alloc failed\n");
1187 		goto err_alloc_msix;
1188 	}
1189 
1190 	if (!of_get_phy_mode(node, &pf->if_mode)) {
1191 		err = enetc_mdiobus_create(pf, node);
1192 		if (err)
1193 			goto err_mdiobus_create;
1194 
1195 		err = enetc_phylink_create(priv, node);
1196 		if (err)
1197 			goto err_phylink_create;
1198 	}
1199 
1200 	err = register_netdev(ndev);
1201 	if (err)
1202 		goto err_reg_netdev;
1203 
1204 	return 0;
1205 
1206 err_reg_netdev:
1207 	enetc_phylink_destroy(priv);
1208 err_phylink_create:
1209 	enetc_mdiobus_destroy(pf);
1210 err_mdiobus_create:
1211 	enetc_free_msix(priv);
1212 err_config_si:
1213 err_init_port_rss:
1214 err_init_port_rfs:
1215 err_alloc_msix:
1216 	enetc_free_si_resources(priv);
1217 err_alloc_si_res:
1218 	si->ndev = NULL;
1219 	free_netdev(ndev);
1220 err_alloc_netdev:
1221 err_device_disabled:
1222 err_map_pf_space:
1223 	enetc_pci_remove(pdev);
1224 
1225 	return err;
1226 }
1227 
enetc_pf_remove(struct pci_dev * pdev)1228 static void enetc_pf_remove(struct pci_dev *pdev)
1229 {
1230 	struct enetc_si *si = pci_get_drvdata(pdev);
1231 	struct enetc_pf *pf = enetc_si_priv(si);
1232 	struct enetc_ndev_priv *priv;
1233 
1234 	priv = netdev_priv(si->ndev);
1235 
1236 	if (pf->num_vfs)
1237 		enetc_sriov_configure(pdev, 0);
1238 
1239 	unregister_netdev(si->ndev);
1240 
1241 	enetc_phylink_destroy(priv);
1242 	enetc_mdiobus_destroy(pf);
1243 
1244 	enetc_free_msix(priv);
1245 
1246 	enetc_free_si_resources(priv);
1247 
1248 	free_netdev(si->ndev);
1249 
1250 	enetc_pci_remove(pdev);
1251 }
1252 
1253 static const struct pci_device_id enetc_pf_id_table[] = {
1254 	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) },
1255 	{ 0, } /* End of table. */
1256 };
1257 MODULE_DEVICE_TABLE(pci, enetc_pf_id_table);
1258 
1259 static struct pci_driver enetc_pf_driver = {
1260 	.name = KBUILD_MODNAME,
1261 	.id_table = enetc_pf_id_table,
1262 	.probe = enetc_pf_probe,
1263 	.remove = enetc_pf_remove,
1264 #ifdef CONFIG_PCI_IOV
1265 	.sriov_configure = enetc_sriov_configure,
1266 #endif
1267 };
1268 module_pci_driver(enetc_pf_driver);
1269 
1270 MODULE_DESCRIPTION(ENETC_DRV_NAME_STR);
1271 MODULE_LICENSE("Dual BSD/GPL");
1272