267     {"bits": [22, 23], "enum_ref": "COMMAND__SRC_SWAP", "name": "SRC_SWAP"},  string
268     {"bits": [24, 25], "enum_ref": "COMMAND__SRC_SWAP", "name": "DST_SWAP"},  string
269     {"bits": [26, 26], "enum_ref": "COMMAND__SAS", "name": "SAS"},  string
270     {"bits": [27, 27], "enum_ref": "COMMAND__SAS", "name": "DAS"},  string
271     {"bits": [28, 28], "enum_ref": "COMMAND__SAIC", "name": "SAIC"},  string
272     {"bits": [29, 29], "enum_ref": "COMMAND__SAIC", "name": "DAIC"},  string
279     {"bits": [26, 26], "enum_ref": "COMMAND__SAS", "name": "SAS"},  string
280     {"bits": [27, 27], "enum_ref": "COMMAND__SAS", "name": "DAS"},  string
281     {"bits": [28, 28], "enum_ref": "COMMAND__SAIC", "name": "SAIC"},  string
282     {"bits": [29, 29], "enum_ref": "COMMAND__SAIC", "name": "DAIC"},  string
289     {"bits": [8, 11], "enum_ref": "CONTROL__DST_SEL", "name": "DST_SEL"},  string
292     {"bits": [30, 31], "enum_ref": "CONTROL__ENGINE_SEL", "name": "ENGINE_SEL"}  string
297     {"bits": [8, 11], "enum_ref": "CONTROL__DST_SEL_cik", "name": "DST_SEL"},  string
300     {"bits": [30, 31], "enum_ref": "CONTROL__ENGINE_SEL", "name": "ENGINE_SEL"}  string
311     {"bits": [20, 21], "enum_ref": "CP_DMA_WORD1__DST_SEL", "name": "DST_SEL"},  string
312     {"bits": [27, 27], "enum_ref": "CP_DMA_WORD1__ENGINE", "name": "ENGINE"},  string
313     {"bits": [29, 30], "enum_ref": "CP_DMA_WORD1__SRC_SEL", "name": "SRC_SEL"},  string
320     {"bits": [20, 21], "enum_ref": "CP_DMA_WORD1__DST_SEL_cik", "name": "DST_SEL"},  string
321     {"bits": [27, 27], "enum_ref": "CP_DMA_WORD1__ENGINE", "name": "ENGINE"},  string
322     {"bits": [29, 30], "enum_ref": "CP_DMA_WORD1__SRC_SEL_cik", "name": "SRC_SEL"},  string
329     {"bits": [20, 21], "enum_ref": "CP_DMA_WORD1__DST_SEL_gfx9", "name": "DST_SEL"},  string
330     {"bits": [27, 27], "enum_ref": "CP_DMA_WORD1__ENGINE", "name": "ENGINE"},  string
331     {"bits": [29, 30], "enum_ref": "CP_DMA_WORD1__SRC_SEL_cik", "name": "SRC_SEL"},  string
347     {"bits": [0, 0], "enum_ref": "CP_DMA_WORD1__ENGINE", "name": "ENGINE"},  string
348     {"bits": [20, 21], "enum_ref": "CP_DMA_WORD1__DST_SEL", "name": "DST_SEL"},  string
349     {"bits": [29, 30], "enum_ref": "CP_DMA_WORD1__SRC_SEL", "name": "SRC_SEL"},  string
355     {"bits": [0, 0], "enum_ref": "CP_DMA_WORD1__ENGINE", "name": "ENGINE"},  string
357     {"bits": [20, 21], "enum_ref": "CP_DMA_WORD1__DST_SEL_cik", "name": "DST_SEL"},  string
359     {"bits": [29, 30], "enum_ref": "CP_DMA_WORD1__SRC_SEL_cik", "name": "SRC_SEL"},  string
365     {"bits": [0, 0], "enum_ref": "CP_DMA_WORD1__ENGINE", "name": "ENGINE"},  string
367     {"bits": [20, 21], "enum_ref": "CP_DMA_WORD1__DST_SEL_gfx9", "name": "DST_SEL"},  string
369     {"bits": [29, 30], "enum_ref": "CP_DMA_WORD1__SRC_SEL_cik", "name": "SRC_SEL"},  string
375     {"bits": [0, 1], "enum_ref": "GCR_GLI_INV", "name": "GLI_INV"},  string
376     {"bits": [2, 3], "enum_ref": "GCR_GL1_RANGE", "name": "GL1_RANGE"},  string
384     {"bits": [11, 12], "enum_ref": "GCR_GL2_RANGE", "name": "GL2_RANGE"},  string
388     {"bits": [16, 17], "enum_ref": "GCR_SEQ", "name": "SEQ"},  string
408     {"bits": [17, 18], "enum_ref": "GCR_GL2_RANGE", "name": "GL2_RANGE"},  string
412     {"bits": [22, 23], "enum_ref": "GCR_SEQ", "name": "SEQ"}  string