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Searched refs:BRW_OPCODE_MAD (Results 1 – 24 of 24) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_vec4_cse.cpp73 case BRW_OPCODE_MAD: in is_expression()
103 if (a->opcode == BRW_OPCODE_MAD) { in operands_match()
Dbrw_fs_cse.cpp72 case BRW_OPCODE_MAD: in is_expression()
122 if (a->opcode == BRW_OPCODE_MAD) { in operands_match()
Dbrw_fs_saturate_propagation.cpp93 } else if (scan_inst->opcode == BRW_OPCODE_MAD) { in opt_saturate_propagation_local()
Dbrw_fs_combine_constants.cpp81 case BRW_OPCODE_MAD: in must_promote_imm()
368 case BRW_OPCODE_MAD: in supports_src_as_imm()
Dbrw_ir_performance.cpp147 if ((inst->opcode == BRW_OPCODE_MUL || inst->opcode == BRW_OPCODE_MAD) && in instruction_info()
170 if ((inst->opcode == BRW_OPCODE_MUL || inst->opcode == BRW_OPCODE_MAD) && in instruction_info()
434 case BRW_OPCODE_MAD: in instruction_desc()
Dbrw_shader.cpp1006 case BRW_OPCODE_MAD: in can_do_saturate()
1058 case BRW_OPCODE_MAD: in can_do_cmod()
Dbrw_vec4_builder.h295 case BRW_OPCODE_MAD: in emit()
Dtest_fs_saturate_propagation.cpp400 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
446 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
Dbrw_fs_lower_regioning.cpp144 inst->opcode == BRW_OPCODE_MAD && in has_invalid_src_region()
Dtest_vec4_cmod_propagation.cpp712 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
753 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
Dbrw_ir_fs.h568 (inst->opcode == BRW_OPCODE_MAD && in has_dst_aligned_region_restriction()
Dbrw_eu_defines.h281 BRW_OPCODE_MAD, /**< Gfx6+ */ enumerator
Dbrw_eu.cpp695 { BRW_OPCODE_MAD, 91, "mad", 3, 1, GFX_GE(GFX6) },
Dbrw_fs_builder.h326 case BRW_OPCODE_MAD: in emit()
Dbrw_fs_copy_propagation.cpp930 case BRW_OPCODE_MAD: in try_constant_propagate()
Dbrw_fs_scoreboard.cpp112 (inst->opcode == BRW_OPCODE_MAD && in inferred_exec_pipe()
Dbrw_schedule_instructions.cpp161 case BRW_OPCODE_MAD: in set_latency_gfx7()
Dbrw_vec4_generator.cpp1604 case BRW_OPCODE_MAD: in generate_code()
Dbrw_fs.cpp448 opcode == BRW_OPCODE_MAD)) { in can_do_source_mods()
450 const unsigned min_type_sz = opcode == BRW_OPCODE_MAD ? in can_do_source_mods()
2976 case BRW_OPCODE_MAD: in opt_algebraic()
7355 case BRW_OPCODE_MAD: in get_lowered_simd_width()
Dbrw_vec4.cpp2565 if (inst->opcode != BRW_OPCODE_MAD) in lower_64bit_mad_to_mul_add()
Dbrw_fs_generator.cpp2084 case BRW_OPCODE_MAD: in generate_code()
Dtest_eu_validate.cpp2916 case BRW_OPCODE_MAD: in TEST_P()
/third_party/mesa3d/src/intel/tools/
Di965_lex.l98 mad { yylval.integer = BRW_OPCODE_MAD; return MAD; }
Di965_gram.y267 case BRW_OPCODE_MAD: in i965_asm_ternary_instruction()