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Searched refs:SP_REG (Results 1 – 7 of 7) sorted by relevance

/third_party/libunwind/src/mips/
DGstep.c127 #define SP_REG UNW_MIPS_R29 in _step_n64() macro
138 ret = dwarf_get (&c->dwarf, c->dwarf.loc[SP_REG], &current_sp_val); in _step_n64()
193 c->dwarf.loc[SP_REG] = up_fp_loc; in _step_n64()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIMachineFunctionInfo.h339 unsigned StackPtrOffsetReg = AMDGPU::SP_REG;
DSIRegisterInfo.td94 def SP_REG : SIReg<"sp", 0>;
414 (add FP_REG, SP_REG, SCRATCH_WAVE_OFFSET_REG)> {
DAMDGPUTargetMachine.cpp1067 if (MFI->StackPtrOffsetReg != AMDGPU::SP_REG && in parseMachineFunctionInfo()
DSIFrameLowering.cpp494 assert(SPReg != AMDGPU::SP_REG); in emitEntryFunctionPrologue()
DSIISelLowering.cpp1943 if (Info.getStackPtrOffsetReg() == AMDGPU::SP_REG) in reservePrivateMemoryRegs()
10737 if (Info->getStackPtrOffsetReg() != AMDGPU::SP_REG) in finalizeLowering()
10738 MRI.replaceRegWith(AMDGPU::SP_REG, Info->getStackPtrOffsetReg()); in finalizeLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUInstPrinter.cpp289 case AMDGPU::SP_REG: in printRegOperand()