| /third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_bo.c | 83 int r = radv_amdgpu_bo_va_op(ws, range->bo ? range->bo->bo : NULL, range->bo_offset, range->size, in radv_amdgpu_winsys_virtual_map()
105 int r = radv_amdgpu_bo_va_op(ws, range->bo ? range->bo->bo : NULL, range->bo_offset, range->size, in radv_amdgpu_winsys_virtual_unmap()
155 uint64_t bo_offset) in radv_amdgpu_winsys_bo_virtual_bind() argument
207 offset - bo_offset == parent->ranges[first].offset - parent->ranges[first].bo_offset)) { in radv_amdgpu_winsys_bo_virtual_bind()
210 bo_offset = parent->ranges[first].bo_offset; in radv_amdgpu_winsys_bo_virtual_bind()
217 offset - bo_offset == parent->ranges[last].offset - parent->ranges[last].bo_offset)) { in radv_amdgpu_winsys_bo_virtual_bind()
252 new_last.bo_offset += (offset + size - new_last.offset); in radv_amdgpu_winsys_bo_virtual_bind()
272 parent->ranges[new_idx].bo_offset = bo_offset; in radv_amdgpu_winsys_bo_virtual_bind()
456 bo->ranges[0].bo_offset = 0; in radv_amdgpu_winsys_bo_create()
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| D | radv_amdgpu_bo.h | 38 uint64_t bo_offset; member
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_pack.h | 35 uint32_t bo_offset; member
62 OUT_RELOC(ring, regs[i].bo, regs[i].bo_offset, regs[i].value, \
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| D | fd6_const.c | 85 CP_LOAD_STATE6_EXT_SRC_ADDR(.bo = bo, .bo_offset = offset)); in fd6_emit_const_bo()
92 CP_LOAD_STATE6_EXT_SRC_ADDR(.bo = bo, .bo_offset = offset)); in fd6_emit_const_bo()
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| D | fd6_gmem.c | 128 A6XX_RB_MRT_BASE(i, .bo = rsc->bo, .bo_offset = offset), in emit_mrt()
163 A6XX_RB_DEPTH_BUFFER_BASE(.bo = rsc->bo, .bo_offset = offset), in emit_zs()
427 .bo_offset = in update_vsc_pipe()
999 A6XX_RB_BLIT_DST(.bo = rsc->bo, .bo_offset = offset), in emit_blit()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_image.c | 239 uint64_t base_addr = image->bo->iova + image->bo_offset + in tu_image_view_init()
241 uint64_t ubwc_addr = image->bo->iova + image->bo_offset + in tu_image_view_init()
313 base_addr[i] = image->bo->iova + image->bo_offset + in tu_image_view_init()
318 base_addr[i] = image->bo->iova + image->bo_offset + in tu_image_view_init()
450 iview->stencil_base_addr = image->bo->iova + image->bo_offset + in tu_image_view_init()
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| D | tu_private.h | 709 VkDeviceSize bo_offset; member
715 return buffer->bo->iova + buffer->bo_offset; in tu_buffer_iova()
1100 uint32_t bo_offset; member
1413 VkDeviceSize bo_offset; member
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| D | tu_cmd_buffer.c | 229 … .bo_offset = iview->image->bo_offset + iview->image->lrz_offset), in tu6_emit_zs()
848 .bo_offset = gb_offset(bcolor_builtin))); in tu6_init_hw()
851 .bo_offset = gb_offset(bcolor_builtin))); in tu6_init_hw()
885 A6XX_VSC_DRAW_STRM_SIZE_ADDRESS(.bo = vsc_bo, .bo_offset = size0)); in tu6_init_hw()
890 … .bo_offset = cmd->vsc_prim_strm_pitch * MAX_VSC_PIPES)); in tu6_init_hw()
1742 cmd->state.index_va = buf->bo->iova + buf->bo_offset + offset; in tu_CmdBindIndexBuffer()
4263 tu_cs_emit_qw(cs, buf->bo->iova + buf->bo_offset + offset); in tu_CmdDrawIndirect()
4292 tu_cs_emit_qw(cs, buf->bo->iova + buf->bo_offset + offset); in tu_CmdDrawIndexedIndirect()
4326 tu_cs_emit_qw(cs, buf->bo->iova + buf->bo_offset + offset); in tu_CmdDrawIndirectCount()
4327 tu_cs_emit_qw(cs, count_buf->bo->iova + count_buf->bo_offset + countBufferOffset); in tu_CmdDrawIndirectCount()
[all …]
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| D | tu_cs.h | 334 uint64_t v = regs[i].bo->iova + regs[i].bo_offset; \
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| D | tu_device.c | 2092 buffer->bo_offset = pBindInfos[i].memoryOffset; in tu_BindBufferMemory2()
2111 image->bo_offset = pBindInfos[i].memoryOffset; in tu_BindImageMemory2()
2114 image->bo_offset = 0; in tu_BindImageMemory2()
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| D | tu_clear_blit.c | 1241 image->bo->iova + image->bo_offset + image->lrz_offset, in tu6_clear_lrz()
1762 .bo_offset = 0, in tu_copy_image_to_image()
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| D | crocus_monitor.c | 158 uint32_t bo_offset)
162 ice->vtbl.store_register_mem32(batch, GEN9_RPSTAT0, bo, bo_offset, false);
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | anv_allocator.c | 579 int32_t bo_offset = 0; in anv_block_pool_map() local
581 if (offset < bo_offset + iter_bo->size) { in anv_block_pool_map()
585 bo_offset += iter_bo->size; in anv_block_pool_map()
588 assert(offset >= bo_offset); in anv_block_pool_map()
589 assert((offset - bo_offset) + size <= bo->size); in anv_block_pool_map()
591 return bo->map + (offset - bo_offset); in anv_block_pool_map()
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| /third_party/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_wm_surface_state.c | 1680 uint32_t bo_offset; in brw_upload_cs_work_groups_surface() local
1689 &bo_offset); in brw_upload_cs_work_groups_surface()
1692 bo_offset = brw->compute.num_work_groups_offset; in brw_upload_cs_work_groups_surface()
1696 bo, bo_offset, in brw_upload_cs_work_groups_surface()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_radeon_winsys.h | 253 uint64_t bo_offset);
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| D | radv_cmd_buffer.c | 3074 unsigned bo_offset; in radv_flush_push_descriptors() local
3077 &bo_offset)) in radv_flush_push_descriptors()
3081 set->header.va += bo_offset; in radv_flush_push_descriptors()
4675 unsigned bo_offset; in radv_meta_push_descriptor_set() local
4683 if (!radv_cmd_buffer_upload_alloc(cmd_buffer, push_set->header.size, &bo_offset, in radv_meta_push_descriptor_set()
4688 push_set->header.va += bo_offset; in radv_meta_push_descriptor_set()
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| /third_party/mesa3d/src/panfrost/vulkan/ |
| D | panvk_vX_meta_copy.c | 1167 .buf.ptr = buf->bo->ptr.gpu + buf->bo_offset + region->bufferOffset, in panvk_meta_copy_buf2img()
1616 .buf.ptr = buf->bo->ptr.gpu + buf->bo_offset + region->bufferOffset, in panvk_meta_copy_img2buf()
1855 .src = src->bo->ptr.gpu + src->bo_offset + region->srcOffset, in panvk_meta_copy_buf2buf()
1856 .dst = dst->bo->ptr.gpu + dst->bo_offset + region->dstOffset, in panvk_meta_copy_buf2buf()
2025 .start = dst->bo->ptr.gpu + dst->bo_offset + offset, in panvk_meta_fill_buf()
2087 .dst = dst->bo->ptr.gpu + dst->bo_offset + offset, in panvk_meta_update_buf()
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| D | panvk_private.h | 461 VkDeviceSize bo_offset; member
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| D | panvk_device.c | 1323 buffer->bo_offset = pBindInfos[i].memoryOffset; in panvk_BindBufferMemory2()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 17.2.6.rst | 76 - cherry-ignore: anv/cmd_buffer: Take bo_offset into account in fast
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| /third_party/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
| D | nve4_compute.c | 823 uint32_t length, uint32_t bo_offset) in nve4_upload_indirect_desc() argument
837 nouveau_pushbuf_data(push, res->bo, bo_offset, in nve4_upload_indirect_desc()
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