| /third_party/mesa3d/src/gallium/drivers/r300/ |
| D | r300_render_stencilref.c | 51 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_needed()
63 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_begin()
81 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_switch_side()
88 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_stencilref_switch_side()
96 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_end()
104 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_stencilref_end()
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| D | r300_hyperz.c | 43 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_get_hiz_func()
65 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_get_sc_hz_max()
73 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_is_hiz_func_valid()
100 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_hiz_allowed()
136 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_update_hyperz()
264 if (util_writes_depth_stencil(r300->dsa_state.state) && in r300_update_ztop()
265 (r300_dsa_alpha_test_enabled(r300->dsa_state.state) || /* (1) */ in r300_update_ztop()
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| D | r300_state.c | 548 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_bind_blend_state()
783 (struct r300_dsa_state*)r300->dsa_state.state; in r300_dsa_inject_stencilref()
806 UPDATE_STATE(state, r300->dsa_state); in r300_bind_dsa_state()
827 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_set_stencil_ref()
864 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */ in r300_mark_fb_state_dirty()
954 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_set_framebuffer_state()
1372 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_bind_rs_state()
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| D | r300_context.h | 506 struct r300_atom dsa_state; member
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| D | r300_context.c | 182 R300_INIT_ATOM(dsa_state, is_r500 ? 10 : 6); in r300_setup_atoms()
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| D | r300_blit.c | 64 util_blitter_save_depth_stencil_alpha(r300->blitter, r300->dsa_state.state); in r300_blitter_begin()
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| /third_party/mesa3d/src/gallium/drivers/zink/ |
| D | zink_draw.cpp | 468 struct zink_depth_stencil_alpha_state *dsa_state = ctx->dsa_state; in zink_draw_vbo() local
644 …VKCTX(CmdSetDepthBoundsTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_bounds_test); in zink_draw_vbo()
645 if (dsa_state->hw_state.depth_bounds_test) in zink_draw_vbo()
647 dsa_state->hw_state.min_depth_bounds, in zink_draw_vbo()
648 dsa_state->hw_state.max_depth_bounds); in zink_draw_vbo()
649 VKCTX(CmdSetDepthTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_test); in zink_draw_vbo()
650 if (dsa_state->hw_state.depth_test) in zink_draw_vbo()
651 VKCTX(CmdSetDepthCompareOpEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_compare_op); in zink_draw_vbo()
652 VKCTX(CmdSetDepthWriteEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_write); in zink_draw_vbo()
653 VKCTX(CmdSetStencilTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.stencil_test); in zink_draw_vbo()
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| D | zink_state.c | 519 bool prev_zwrite = ctx->dsa_state ? ctx->dsa_state->hw_state.depth_write : false; in zink_bind_depth_stencil_alpha_state()
520 ctx->dsa_state = cso; in zink_bind_depth_stencil_alpha_state()
524 if (state->dyn_state1.depth_stencil_alpha_state != &ctx->dsa_state->hw_state) { in zink_bind_depth_stencil_alpha_state()
525 state->dyn_state1.depth_stencil_alpha_state = &ctx->dsa_state->hw_state; in zink_bind_depth_stencil_alpha_state()
530 if (prev_zwrite != (ctx->dsa_state ? ctx->dsa_state->hw_state.depth_write : false)) { in zink_bind_depth_stencil_alpha_state()
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| D | zink_context.h | 224 struct zink_depth_stencil_alpha_state *dsa_state; member
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| D | zink_blit.c | 330 util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->dsa_state); in zink_blit_begin()
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| D | zink_context.c | 1960 bool needs_write = (ctx->dsa_state && ctx->dsa_state->hw_state.depth_write) || in get_render_pass()
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| /third_party/mesa3d/src/gallium/frontends/lavapipe/ |
| D | lvp_execute.c | 91 struct pipe_depth_stencil_alpha_state dsa_state; member
266 cso_set_depth_stencil_alpha(state->cso, &state->dsa_state); in emit_state()
614 state->dsa_state.depth_enabled = dsa->depthTestEnable; in handle_graphics_pipeline()
616 state->dsa_state.depth_writemask = dsa->depthWriteEnable; in handle_graphics_pipeline()
618 state->dsa_state.depth_func = dsa->depthCompareOp; in handle_graphics_pipeline()
620 state->dsa_state.depth_bounds_test = dsa->depthBoundsTestEnable; in handle_graphics_pipeline()
623 state->dsa_state.depth_bounds_min = dsa->minDepthBounds; in handle_graphics_pipeline()
624 state->dsa_state.depth_bounds_max = dsa->maxDepthBounds; in handle_graphics_pipeline()
628 state->dsa_state.stencil[0].enabled = dsa->stencilTestEnable; in handle_graphics_pipeline()
629 state->dsa_state.stencil[1].enabled = dsa->stencilTestEnable; in handle_graphics_pipeline()
[all …]
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| /third_party/mesa3d/src/gallium/drivers/virgl/ |
| D | virgl_encode.c | 393 const struct pipe_depth_stencil_alpha_state *dsa_state) in virgl_encode_dsa_state() argument
400 tmp = VIRGL_OBJ_DSA_S0_DEPTH_ENABLE(dsa_state->depth_enabled) | in virgl_encode_dsa_state()
401 VIRGL_OBJ_DSA_S0_DEPTH_WRITEMASK(dsa_state->depth_writemask) | in virgl_encode_dsa_state()
402 VIRGL_OBJ_DSA_S0_DEPTH_FUNC(dsa_state->depth_func) | in virgl_encode_dsa_state()
403 VIRGL_OBJ_DSA_S0_ALPHA_ENABLED(dsa_state->alpha_enabled) | in virgl_encode_dsa_state()
404 VIRGL_OBJ_DSA_S0_ALPHA_FUNC(dsa_state->alpha_func); in virgl_encode_dsa_state()
408 tmp = VIRGL_OBJ_DSA_S1_STENCIL_ENABLED(dsa_state->stencil[i].enabled) | in virgl_encode_dsa_state()
409 VIRGL_OBJ_DSA_S1_STENCIL_FUNC(dsa_state->stencil[i].func) | in virgl_encode_dsa_state()
410 VIRGL_OBJ_DSA_S1_STENCIL_FAIL_OP(dsa_state->stencil[i].fail_op) | in virgl_encode_dsa_state()
411 VIRGL_OBJ_DSA_S1_STENCIL_ZPASS_OP(dsa_state->stencil[i].zpass_op) | in virgl_encode_dsa_state()
[all …]
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| D | virgl_encode.h | 207 const struct pipe_depth_stencil_alpha_state *dsa_state);
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| D | virgl_context.c | 453 void *dsa_state) in virgl_delete_depth_stencil_alpha_state() argument
456 uint32_t handle = (unsigned long)dsa_state; in virgl_delete_depth_stencil_alpha_state()
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| /third_party/mesa3d/src/gallium/frontends/nine/ |
| D | nine_pipe.c | 30 nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *dsa_state, in nine_convert_dsa_state() argument
72 *dsa_state = dsa; in nine_convert_dsa_state()
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | r600_hw_context.c | 395 if (ctx->dsa_state.cso) in r600_begin_new_cs()
396 r600_mark_atom_dirty(ctx, &ctx->dsa_state.atom); in r600_begin_new_cs()
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| D | r600_state_common.c | 317 struct r600_dsa_state *dsa = (struct r600_dsa_state*)rctx->dsa_state.cso; in r600_set_pipe_stencil_ref()
342 r600_set_cso_state_with_cb(rctx, &rctx->dsa_state, NULL, NULL); in r600_bind_dsa_state()
346 r600_set_cso_state_with_cb(rctx, &rctx->dsa_state, dsa, &dsa->buffer); in r600_bind_dsa_state()
536 if (rctx->dsa_state.cso == state) { in r600_delete_dsa_state()
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| D | r600_pipe.h | 537 struct r600_cso_state dsa_state; member
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| D | r600_blit.c | 77 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso); in r600_blitter_begin()
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| D | r600_state.c | 3088 r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
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| D | evergreen_state.c | 4475 r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); in evergreen_init_state_functions()
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| /third_party/mesa3d/src/gallium/drivers/d3d12/ |
| D | d3d12_context.cpp | 455 void *dsa_state) in d3d12_delete_depth_stencil_alpha_state() argument
457 d3d12_gfx_pipeline_state_cache_invalidate(d3d12_context(pctx), dsa_state); in d3d12_delete_depth_stencil_alpha_state()
458 FREE(dsa_state); in d3d12_delete_depth_stencil_alpha_state()
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