Searched refs:is_haswell (Results 1 – 25 of 35) sorted by relevance
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370 } else if (devinfo->is_haswell) { in instruction_desc()395 } else if (devinfo->is_haswell) { in instruction_desc()425 else if (devinfo->is_haswell) in instruction_desc()445 } else if (devinfo->is_haswell) { in instruction_desc()475 else if (devinfo->is_haswell) in instruction_desc()491 else if (devinfo->is_haswell) in instruction_desc()527 else if (devinfo->is_haswell) in instruction_desc()538 else if (devinfo->is_haswell) in instruction_desc()606 else if (devinfo->is_haswell) in instruction_desc()617 else if (devinfo->is_haswell) in instruction_desc()[all …]
68 void set_latency_gfx7(bool is_haswell);158 schedule_node::set_latency_gfx7(bool is_haswell) in set_latency_gfx7() argument184 latency = is_haswell ? 16 : 18; in set_latency_gfx7()229 latency = is_haswell ? 14 : 16; in set_latency_gfx7()240 latency = is_haswell ? 22 : 24; in set_latency_gfx7()380 latency = is_haswell ? 300 : 600; in set_latency_gfx7()407 assert(!is_haswell); in set_latency_gfx7()413 assert(!is_haswell); in set_latency_gfx7()469 assert(!is_haswell); in set_latency_gfx7()488 assert(!is_haswell); in set_latency_gfx7()[all …]
166 const bool has_simd4x2 = bld.shader->devinfo->is_haswell; in emit_untyped_write()187 const bool has_simd4x2 = bld.shader->devinfo->is_haswell; in emit_untyped_atomic()
133 assert(devinfo->is_haswell); in generate_tex()2191 assert(devinfo->is_haswell); in generate_code()
307 if (devinfo->is_haswell) { in brw_emit_end_of_pipe_sync()411 devinfo->is_haswell ? gfx75_emit_raw_pipe_control in brw_init_pipe_control()
202 if (devinfo->is_haswell) { in hsw_pause_transform_feedback()232 if (devinfo->is_haswell) { in hsw_resume_transform_feedback()
259 devinfo->is_haswell ? t->Attrib._Swizzle : key->swizzles[s]; in brw_populate_sampler_prog_key_data()274 if (!devinfo->is_haswell) in brw_populate_sampler_prog_key_data()
151 OUT_BATCH((devinfo->is_haswell ? HSW_L3SQCREG1_SQGHPCI_DEFAULT : in setup_l3_config()
2105 if (screen->cmd_parser_version >= (devinfo->is_haswell ? 7 : 2)) in brw_detect_pipelined_so()2422 if (screen->devinfo.is_haswell && can_do_compute_dispatch(screen)) in set_max_gl_versions()2424 if (screen->devinfo.is_haswell && can_do_mi_math_and_lrr(screen)) in set_max_gl_versions()2429 dri_screen->max_gl_es2_version = screen->devinfo.is_haswell ? 31 : 30; in set_max_gl_versions()2737 if (devinfo->is_haswell && screen->cmd_parser_version >= 4) { in brw_init_screen()2747 (devinfo->is_haswell && screen->cmd_parser_version >= 7)) { in brw_init_screen()
299 if (devinfo->ver == 8 || devinfo->is_haswell) in gfx6_queryobj_get_results()
340 if (devinfo->ver == 8 || devinfo->is_haswell) in hsw_result_to_gpr0()
149 else if (devinfo->is_haswell && can_do_pipelined_register_writes(brw->screen)) in brw_init_extensions()
320 else if (devinfo->is_haswell) in brw_init_state()
636 if (devinfo->is_haswell) { in brw_finish_batch()
538 need_green_to_blue = devinfo->is_haswell; in brw_update_texture_surface()
61 bool is_haswell; member
313 .is_haswell = true, \1498 } else if (devinfo->is_haswell) { in init_max_scratch_ids()
47 assert(devinfo->is_haswell); in intel_perf_query_result_write_mdapi()167 if (devinfo->is_haswell || devinfo->ver == 8) { in intel_perf_register_mdapi_statistic_query()
419 if (devinfo->is_haswell) in get_register_queries_function()552 if (devinfo->is_haswell || devinfo->ver == 8) { in load_pipeline_statistic_metrics()716 if (devinfo->is_haswell) in oa_metrics_available()
192 if (batch->screen->devinfo.is_haswell) { in crocus_emit_end_of_pipe_sync()
70 #define BATCH_RESERVED(devinfo) ((devinfo)->is_haswell ? 32 : 16)
517 if ((device->info.ver == 8 || device->info.is_haswell) && in genX()1420 cmd_buffer->device->info.is_haswell) && in genX()
84 #define ISL_DEV_IS_HASWELL(__dev) ((__dev)->info->is_haswell)
141 if (dev->info->is_haswell) { in isl_device_setup_mocs()3202 if (devinfo->is_haswell) { in isl_swizzle_supports_rendering()
197 if (devinfo.ver != GFX_VER || devinfo.is_haswell != (GFX_VERx10 == 75)) { in SetUp()