| /third_party/mesa3d/src/gallium/drivers/lima/ir/ |
| D | lima_nir_split_loads.c | 100 replace_load_const(nir_builder *b, nir_load_const_instr *load_const) in replace_load_const() argument
104 nir_foreach_use_safe(src, &load_const->def) { in replace_load_const()
113 nir_ssa_def *new = nir_build_imm(b, load_const->def.num_components, in replace_load_const()
114 load_const->def.bit_size, in replace_load_const()
115 load_const->value); in replace_load_const()
120 nir_instr_remove(&load_const->instr); in replace_load_const()
|
| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_serialize.c | 655 } load_const; member
1260 header.load_const.instr_type = lc->instr.type; in write_load_const()
1261 header.load_const.last_component = lc->def.num_components - 1; in write_load_const()
1262 header.load_const.bit_size = encode_bit_size_3bits(lc->def.bit_size); in write_load_const()
1263 header.load_const.packing = load_const_full; in write_load_const()
1271 header.load_const.packing = load_const_scalar_hi_19bits; in write_load_const()
1272 header.load_const.packed_value = lc->value[0].u64 >> 45; in write_load_const()
1275 header.load_const.packing = load_const_scalar_lo_19bits_sext; in write_load_const()
1276 header.load_const.packed_value = lc->value[0].u64; in write_load_const()
1282 header.load_const.packing = load_const_scalar_hi_19bits; in write_load_const()
[all …]
|
| D | nir_opt_constant_folding.c | 76 nir_load_const_instr* load_const = nir_instr_as_load_const(src_instr); in try_fold_alu() local
80 src[i][j] = load_const->value[alu->src[i].swizzle[j]]; in try_fold_alu()
|
| D | nir_builder.h | 264 nir_load_const_instr *load_const = in nir_build_imm() local
266 if (!load_const) in nir_build_imm()
269 memcpy(load_const->value, value, sizeof(nir_const_value) * num_components); in nir_build_imm()
271 nir_builder_instr_insert(build, &load_const->instr); in nir_build_imm()
273 return &load_const->def; in nir_build_imm()
279 nir_load_const_instr *load_const = in nir_imm_zero() local
284 nir_builder_instr_insert(build, &load_const->instr); in nir_imm_zero()
286 return &load_const->def; in nir_imm_zero()
|
| D | nir_search.c | 843 nir_load_const_instr *load_const = nir_instr_as_load_const(instr); in nir_algebraic_automaton() local
845 load_const->def.index); in nir_algebraic_automaton()
|
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_nir_opt_peephole_ffma.c | 152 nir_load_const_instr *load_const = in any_alu_src_is_a_constant() local
155 if (list_is_singular(&load_const->def.uses) && in any_alu_src_is_a_constant()
156 list_is_empty(&load_const->def.if_uses)) { in any_alu_src_is_a_constant()
|
| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2_nir.c | 148 load_const(struct ir2_context *ctx, float *value_f, unsigned ncomp) in load_const() function
202 return load_const(ctx, (float[]){0.0f}, 1); in ir2_zero()
239 return load_const(ctx, c, src.ssa->num_components); in make_src()
476 tmp->src[2] = load_const(ctx, (float[]){1.0f}, 1); in emit_alu()
734 coord_xy->src[2] = load_const(ctx, (float[]){1.5f}, 1); in emit_tex()
|
| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_clear_blit.c | 327 load_const(nir_builder *b, unsigned base, unsigned components) in load_const() function
345 nir_ssa_def *vert0_pos = load_const(b, 0, 2); in build_blit_vs_shader()
346 nir_ssa_def *vert1_pos = load_const(b, 4, 2); in build_blit_vs_shader()
362 nir_ssa_def *vert0_coords = load_const(b, 2, 2); in build_blit_vs_shader()
363 nir_ssa_def *vert1_coords = load_const(b, 6, 2); in build_blit_vs_shader()
366 nir_ssa_def *z_coord = load_const(b, 8, 1); in build_blit_vs_shader()
389 nir_ssa_def *vert0_pos = load_const(b, 0, 2); in build_clear_vs_shader()
390 nir_ssa_def *vert1_pos = load_const(b, 4, 2); in build_clear_vs_shader()
392 nir_ssa_def *depth = load_const(b, 2, 1); in build_clear_vs_shader()
406 nir_ssa_def *layer = load_const(b, 3, 1); in build_clear_vs_shader()
[all …]
|
| /third_party/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_compiler_nir.c | 898 nir_load_const_instr *load_const = nir_instr_as_load_const(instr); in emit_shader() local
899 for (unsigned i = 0; i < load_const->def.num_components; i++) in emit_shader()
900 load_const->value[i] = CONST(load_const->value[i].u32); in emit_shader()
|
| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| D | tgsi_to_nir.c | 480 nir_load_const_instr *load_const; in ttn_emit_immediate() local
483 load_const = nir_load_const_instr_create(b->shader, 4, 32); in ttn_emit_immediate()
484 c->imm_defs[c->next_imm] = &load_const->def; in ttn_emit_immediate()
487 for (i = 0; i < load_const->def.num_components; i++) in ttn_emit_immediate()
488 load_const->value[i].u32 = tgsi_imm->u[i].Uint; in ttn_emit_immediate()
490 nir_builder_instr_insert(b, &load_const->instr); in ttn_emit_immediate()
|
| /third_party/mesa3d/src/microsoft/compiler/ |
| D | nir_to_dxil.c | 3700 emit_load_const(struct ntd_context *ctx, nir_load_const_instr *load_const) in emit_load_const() argument
3702 for (int i = 0; i < load_const->def.num_components; ++i) { in emit_load_const()
3704 switch (load_const->def.bit_size) { in emit_load_const()
3707 load_const->value[i].b); in emit_load_const()
3712 load_const->value[i].u16); in emit_load_const()
3716 load_const->value[i].u32); in emit_load_const()
3721 load_const->value[i].u64); in emit_load_const()
3729 store_ssa_def(ctx, &load_const->def, i, value); in emit_load_const()
|
| /third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
| D | nir_to_spirv.c | 1905 emit_load_const(struct ntv_context *ctx, nir_load_const_instr *load_const) in emit_load_const() argument
1907 unsigned bit_size = load_const->def.bit_size; in emit_load_const()
1908 unsigned num_components = load_const->def.num_components; in emit_load_const()
1914 load_const->value[i].b); in emit_load_const()
1917 uint64_t tmp = nir_const_value_as_uint(load_const->value[i], in emit_load_const()
1929 store_ssa_def(ctx, &load_const->def, value); in emit_load_const()
1932 store_ssa_def(ctx, &load_const->def, components[0]); in emit_load_const()
|
| /third_party/mesa3d/docs/relnotes/ |
| D | 20.1.0.rst | 444 - pan/bi: Implement load_const
1240 - aco: setup subdword regclasses for ssa_undef & load_const
|
| D | 21.2.0.rst | 379 - agx: Implement load_const as mov
634 - agx: Enable 1-bit load_const
|
| D | 20.0.0.rst | 2241 - nir/serialize: pack load_const with non-64-bit constants better
|
| D | 20.2.0.rst | 607 - pan/bi: Handle vectorized load_const
|