| /third_party/mesa3d/src/compiler/spirv/ |
| D | vtn_opencl.c | 37 struct vtn_type **src_types,
57 int ntypes, struct vtn_type **src_types, in vtn_opencl_mangle() argument
64 const struct glsl_type *type = src_types[i]->type; in vtn_opencl_mangle()
65 enum vtn_base_type base_type = src_types[i]->base_type; in vtn_opencl_mangle()
66 if (src_types[i]->base_type == vtn_base_type_pointer) { in vtn_opencl_mangle()
68 int address_space = to_llvm_address_space(src_types[i]->storage_class); in vtn_opencl_mangle()
72 type = src_types[i]->deref->type; in vtn_opencl_mangle()
73 base_type = src_types[i]->deref->base_type; in vtn_opencl_mangle()
87 const struct glsl_type *other_type = src_types[j]->base_type == vtn_base_type_pointer ? in vtn_opencl_mangle()
88 src_types[j]->deref->type : src_types[j]->type; in vtn_opencl_mangle()
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| /third_party/skia/third_party/externals/tint/src/ast/ |
| D | module_clone_test.cc | 139 std::unordered_set<sem::Type*> src_types; in TEST() local
141 src_types.emplace(src_type); in TEST()
147 ASSERT_EQ(src_types.count(dst_type), 0u); in TEST()
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| /third_party/mesa3d/src/panfrost/midgard/ |
| D | mir.c | 135 if (ins->dest_type != ins->src_types[i]) return true; in mir_nontrivial_mod()
153 if (ins->dest_type != ins->src_types[1]) in mir_nontrivial_outmod()
307 nir_alu_type_get_type_size(ins->src_types[i])); in mir_bytemask_of_read_components_index()
434 temp = ins->src_types[0]; in mir_flip()
435 ins->src_types[0] = ins->src_types[1]; in mir_flip()
436 ins->src_types[1] = temp; in mir_flip()
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| D | midgard_print.c | 117 unsigned sz = nir_alu_type_get_type_size(ins->src_types[src_idx]); in mir_print_embedded_constant()
152 if (ins->src[c] != ~0 && ins->src_types[c] != nir_type_invalid) { \
153 pan_print_alu_type(ins->src_types[c], stdout); \
154 mir_print_swizzle(ins->swizzle[c], ins->src_types[c]); \
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| D | midgard_compile.c | 123 i.src_types[0] = T; \
628 ins->src_types[to] = nir_op_infos[instr->op].input_types[i] | bits; in mir_copy_src()
1029 ins.src_types[1] = nir_type_float32; in emit_alu()
1041 ins.src_types[1] = nir_type_float16; in emit_alu()
1051 ins.src_types[1] = ins.src_types[0]; in emit_alu()
1183 ins.src_types[2] = nir_type_uint32; in emit_ubo_read()
1287 .src_types = { 0, 0, 0, type | bitsize }, in emit_atomic()
1299 ins.src_types[2] = type | bitsize; in emit_atomic()
1312 ins.src_types[1] = nir_type_uint64; in emit_atomic()
1319 ins.src_types[2] = nir_type_uint64; in emit_atomic()
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| D | midgard_emit.c | 93 unsigned sz = nir_alu_type_get_type_size(ins->src_types[i]); in mir_pack_mod()
97 mir_get_imod(ins->src_shift[i], ins->src_types[i], half, scalar) : in mir_pack_mod()
138 bool half_0 = nir_alu_type_get_type_size(ins->src_types[0]) == 16; in vector_to_scalar_alu()
139 bool half_1 = nir_alu_type_get_type_size(ins->src_types[1]) == 16; in vector_to_scalar_alu()
344 unsigned sz = nir_alu_type_get_type_size(ins->src_types[i]); in mir_pack_vector_srcs()
623 unsigned sz = nir_alu_type_get_type_size(ins->src_types[1]); in load_store_from_instr()
629 unsigned sz = nir_alu_type_get_type_size(ins->src_types[2]); in load_store_from_instr()
1054 unsigned isz = nir_alu_type_get_type_size(ins->src_types[1]); in emit_binary_bundle()
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| D | midgard_schedule.c | 237 unsigned sz0 = nir_alu_type_get_type_size(ains->src_types[0]); in mir_is_scalar()
238 unsigned sz1 = nir_alu_type_get_type_size(ains->src_types[1]); in mir_is_scalar()
399 unsigned type_size = nir_alu_type_get_type_size(ins->src_types[src]) / 8; in mir_adjust_constant()
401 unsigned max_comp = mir_components_for_type(ins->src_types[src]); in mir_adjust_constant()
562 if (ins->src_types[0] != ins->src_types[1]) in mir_is_add_2()
1208 branch->src_types[1] = sadd->dest_type; in mir_schedule_alu()
1234 vadd->src_types[0] = nir_type_uint32; in mir_schedule_alu()
1243 vadd->src_types[0] = nir_type_uint32; in mir_schedule_alu()
1519 mov.dest_type = I->src_types[s]; in mir_lower_ldst()
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| D | midgard_address.c | 244 ins->src_types[2] = nir_type_uint | nir_src_bit_size(*offset); in mir_set_offset()
261 ins->src_types[1] = nir_type_uint | match.A.def->bit_size; in mir_set_offset()
271 ins->src_types[2] = nir_type_uint | match.B.def->bit_size; in mir_set_offset()
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| D | midgard_ra.c | 286 m.src_types[1] = m.dest_type; in mir_lower_special_reads()
400 if (nir_alu_type_get_type_size(ins->src_types[v]) == 64) in mir_is_64()
476 unsigned size = nir_alu_type_get_type_size(ins->src_types[v]); in allocate_registers()
512 unsigned src_size = nir_alu_type_get_type_size(ins->src_types[s]); in allocate_registers()
693 util_logbase2(nir_alu_type_get_type_size(ins->src_types[i]) / 8); in install_registers_instr()
901 st.dest_type = st.src_types[1] = ins->dest_type; in mir_spill_register()
1051 .dest_type = ins->src_types[i], in mir_demote_uniforms()
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| D | compiler.h | 103 nir_alu_type src_types[MIR_SRC_COUNT]; member
540 .src_types = { 0, nir_type_uint32 }, in v_mov()
596 ins.src_types[0] = nir_type_uint32; in v_load_store_scratch()
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| D | midgard_derivatives.c | 108 .src_types = { nir_type_float32, nir_type_float32 }, in midgard_emit_derivatives()
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| D | midgard_opt_perspective.c | 122 .src_types = { nir_type_float32 }, in midgard_opt_combine_projection()
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| D | mir_promote_uniforms.c | 333 mov.src_types[1] = mov.dest_type; in midgard_promote_uniforms()
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| /third_party/skia/third_party/externals/tint/fuzzers/ |
| D | tint_ast_clone_fuzzer.cc | 80 std::unordered_set<tint::sem::Type*> src_types; in LLVMFuzzerTestOneInput() local
82 src_types.emplace(src_type); in LLVMFuzzerTestOneInput()
88 ASSERT_EQ(src_types.count(dst_type), 0u); in LLVMFuzzerTestOneInput()
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| /third_party/mesa3d/src/panfrost/lib/ |
| D | pan_blend.c | 572 nir_alu_type src_types[] = { src0_type ?: nir_type_float32, src1_type ?: nir_type_float32 }; in GENX() local
575 for (unsigned i = 0; i < ARRAY_SIZE(src_types); ++i) { in GENX()
576 src_types[i] = nir_alu_type_get_base_type(nir_type) | in GENX()
577 nir_alu_type_get_type_size(src_types[i]); in GENX()
582 … glsl_vector_type(nir_get_glsl_base_type_for_nir_type(src_types[0]), 4), in GENX()
587 … glsl_vector_type(nir_get_glsl_base_type_for_nir_type(src_types[1]), 4), in GENX()
603 src_types[i], nir_type, in GENX()
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| /third_party/alsa-utils/alsaloop/ |
| D | pcmjob.c | 56 static const char *src_types[] = { variable
1646 snd_output_printf(loop->output, " (%s)", src_types[loop->src_converter_type]); in pcmjob_start()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 20.1.0.rst | 495 - pan/bi: Fix missing src_types
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| D | 20.2.0.rst | 409 - pan/mdg: Use src_types to determine size in scheduling
|