Home
last modified time | relevance | path

Searched refs:ureg_writemask (Results 1 – 22 of 22) sorted by relevance

/third_party/mesa3d/src/gallium/auxiliary/vl/
Dvl_mc.c73 ureg_ADD(shader, ureg_writemask(t_vpos, TGSI_WRITEMASK_XY), vpos, vrect); in calc_position()
74 ureg_MUL(shader, ureg_writemask(t_vpos, TGSI_WRITEMASK_XY), ureg_src(t_vpos), block_scale); in calc_position()
75 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(t_vpos)); in calc_position()
76 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f)); in calc_position()
98 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), pos, ureg_imm1f(shader, 0.5f)); in calc_line()
99 ureg_FRC(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(tmp)); in calc_line()
100 ureg_SGE(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(tmp), ureg_imm1f(shader, 0.5f)); in calc_line()
148 … ureg_MAD(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_XY), mv_scale, vmv[i], ureg_src(t_vpos)); in create_ref_vert_shader()
149 ureg_MUL(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_ZW), mv_scale, vmv[i]); in create_ref_vert_shader()
198 ureg_CMP(shader, ureg_writemask(ref, TGSI_WRITEMASK_XYZ), in create_ref_frag_shader()
[all …]
Dvl_compositor_gfx.c100 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), in create_vert_shader()
102 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), in create_vert_shader()
105 ureg_MOV(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_X), vtex); in create_vert_shader()
106 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Y), ureg_scalar(vtex, TGSI_SWIZZLE_Y), in create_vert_shader()
108 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y), in create_vert_shader()
110 ureg_RCP(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_W), in create_vert_shader()
113 ureg_MOV(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_X), vtex); in create_vert_shader()
114 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Y), ureg_scalar(vtex, TGSI_SWIZZLE_Y), in create_vert_shader()
116 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y), in create_vert_shader()
118 ureg_RCP(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_W), in create_vert_shader()
[all …]
Dvl_idct.c88 ureg_MOV(shader, ureg_writemask(addr[0], wm_start), ureg_scalar(start, sw_start)); in calc_addr()
89 ureg_MOV(shader, ureg_writemask(addr[0], wm_tc), ureg_scalar(tc, sw_tc)); in calc_addr()
91 …ureg_ADD(shader, ureg_writemask(addr[1], wm_start), ureg_scalar(start, sw_start), ureg_imm1f(shade… in calc_addr()
92 ureg_MOV(shader, ureg_writemask(addr[1], wm_tc), ureg_scalar(tc, sw_tc)); in calc_addr()
108 ureg_MOV(shader, ureg_writemask(daddr[0], wm_start), saddr[0]); in increment_addr()
109 ureg_ADD(shader, ureg_writemask(daddr[0], wm_tc), saddr[0], ureg_imm1f(shader, pos / size)); in increment_addr()
110 ureg_MOV(shader, ureg_writemask(daddr[1], wm_start), saddr[1]); in increment_addr()
111 ureg_ADD(shader, ureg_writemask(daddr[1], wm_tc), saddr[1], ureg_imm1f(shader, pos / size)); in increment_addr()
133 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(l[0]), ureg_src(r[0])); in matrix_mul()
134 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(l[1]), ureg_src(r[1])); in matrix_mul()
[all …]
Dvl_zscan.c163 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XY), vpos, vrect); in create_vert_shader()
164 ureg_MUL(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(tmp), scale); in create_vert_shader()
165 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f)); in create_vert_shader()
167 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XW), ureg_scalar(block_num, TGSI_SWIZZLE_X), in create_vert_shader()
170 …ureg_FRC(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X)… in create_vert_shader()
171 ureg_FLR(shader, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_src(tmp)); in create_vert_shader()
174 …ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y), in create_vert_shader()
178 ureg_MAD(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_X), vrect, in create_vert_shader()
180 ureg_MOV(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_Y), vrect); in create_vert_shader()
181 ureg_MOV(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_Z), vpos); in create_vert_shader()
[all …]
Dvl_deint_filter.c107 ureg_MOV(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_ZW), in create_copy_frag_shader()
110 ureg_MOV(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_ZW), in create_copy_frag_shader()
162 ureg_MOV(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_ZW), in create_deint_frag_shader()
176 …ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_a), ureg_negate(ureg_src(t_b… in create_deint_frag_shader()
180 …ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_Y), ureg_src(t_a), ureg_negate(ureg_src(t_b… in create_deint_frag_shader()
186 …ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_a), ureg_negate(ureg_src(t_b… in create_deint_frag_shader()
190 …ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_Y), ureg_src(t_a), ureg_negate(ureg_src(t_b… in create_deint_frag_shader()
194 ureg_MAX(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_abs(ureg_src(t_diff)), in create_deint_frag_shader()
214 ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_diff), in create_deint_frag_shader()
216 ureg_MUL(shader, ureg_saturate(ureg_writemask(t_diff, TGSI_WRITEMASK_X)), in create_deint_frag_shader()
[all …]
Dvl_bicubic_filter.c195 ureg_ADD(shader, ureg_writemask(t_array[21], TGSI_WRITEMASK_XY), in create_frag_shader()
197 ureg_MUL(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), in create_frag_shader()
199 ureg_FRC(shader, ureg_writemask(t, TGSI_WRITEMASK_XY), in create_frag_shader()
202 ureg_FLR(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), in create_frag_shader()
205 ureg_MAD(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), in create_frag_shader()
218 ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY), in create_frag_shader()
220 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW), in create_frag_shader()
Dvl_matrix_filter.c112 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XY), in create_frag_shader()
114 ureg_MOV(shader, ureg_writemask(tmp, TGSI_WRITEMASK_ZW), in create_frag_shader()
Dvl_median_filter.c128 ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY), in create_frag_shader()
130 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW), in create_frag_shader()
Dvl_mpeg12_decoder.c1082 ureg_MOV(shader, ureg_writemask(o_vtex, TGSI_WRITEMASK_XY), ureg_src(tex)); in mc_vert_shader_callback()
/third_party/mesa3d/src/gallium/auxiliary/util/
Du_simple_shaders.c108 ureg_MOV(ureg, ureg_writemask(layer, TGSI_WRITEMASK_X), in util_make_vertex_passthrough_shader_with_so()
261 ureg_MAD(ureg, ureg_writemask(temp, TGSI_WRITEMASK_XYZ), in util_make_fragment_tex_shader_xrbias()
331 ureg_writemask(temp, writemask), in util_make_fragment_tex_shader_writemask()
334 ureg_load_tex(ureg, ureg_writemask(temp, writemask), tex, sampler, in util_make_fragment_tex_shader_writemask()
410 ureg_load_tex(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), coord, in util_make_fs_blit_zs()
414 ureg_MOV(ureg, ureg_writemask(depth, TGSI_WRITEMASK_Z), in util_make_fs_blit_zs()
426 ureg_load_tex(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), coord, in util_make_fs_blit_zs()
430 ureg_MOV(ureg, ureg_writemask(stencil, TGSI_WRITEMASK_Y), in util_make_fs_blit_zs()
723 ureg_MOV(ureg, ureg_writemask(tmp_coord, TGSI_WRITEMASK_W), in util_make_fs_msaa_resolve()
799 ureg_MOV(ureg, ureg_writemask(tmp_coord[c], TGSI_WRITEMASK_W), in util_make_fs_msaa_resolve_bilinear()
[all …]
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shaderlib_tgsi.c75 ureg_MOV(ureg, ureg_writemask(layer, TGSI_WRITEMASK_X), in si_get_blitter_vs()
149 struct ureg_dst store_addr = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_X); in si_create_dma_compute_shader()
150 struct ureg_dst load_addr = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_X); in si_create_dma_compute_shader()
183 ureg_writemask(ureg_dst(values[i]), u_bit_consecutive(0, inst_dwords[i])); in si_create_dma_compute_shader()
195 struct ureg_dst dst = ureg_writemask(dstbuf, u_bit_consecutive(0, inst_dwords[d])); in si_create_dma_compute_shader()
716 struct ureg_dst coord = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZW); in si_create_fmask_expand_cs()
717 ureg_UMAD(ureg, ureg_writemask(coord, TGSI_WRITEMASK_XY), ureg_swizzle(blk, 0, 1, 1, 1), in si_create_fmask_expand_cs()
720 ureg_MOV(ureg, ureg_writemask(coord, TGSI_WRITEMASK_Z), ureg_scalar(blk, TGSI_SWIZZLE_Z)); in si_create_fmask_expand_cs()
730 ureg_MOV(ureg, ureg_writemask(coord, TGSI_WRITEMASK_W), ureg_imm1u(ureg, i)); in si_create_fmask_expand_cs()
739 ureg_MOV(ureg, ureg_writemask(coord, TGSI_WRITEMASK_W), ureg_imm1u(ureg, i)); in si_create_fmask_expand_cs()
/third_party/mesa3d/src/gallium/frontends/nine/
Dnine_ff.c323 struct ureg_dst tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); in ureg_normalize3()
426 oFog = ureg_writemask(oFog, TGSI_WRITEMASK_X); in nine_ff_build_vs()
432 oPsz = ureg_writemask(oPsz, TGSI_WRITEMASK_X); in nine_ff_build_vs()
453 … ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), ureg_negate(_CONST(101))); in nine_ff_build_vs()
454 ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(100)); in nine_ff_build_vs()
455 … ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XY), ureg_src(tmp), ureg_imm1f(ureg, -1.0f)); in nine_ff_build_vs()
457 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_negate(ureg_src(tmp))); in nine_ff_build_vs()
459 ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), _W(tmp)); in nine_ff_build_vs()
461 ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _W(tmp)); in nine_ff_build_vs()
567 … struct ureg_dst aVtx_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); in nine_ff_build_vs()
[all …]
Dnine_shader.c784 return ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_X); in tx_scratch_scalar()
1192 … ureg_RCP(ureg, ureg_writemask(tmp, NINED3DSP_WRITEMASK_3), ureg_scalar(src, TGSI_SWIZZLE_W)); in tx_src_param()
1199 … ureg_RCP(ureg, ureg_writemask(tmp, NINED3DSP_WRITEMASK_2), ureg_scalar(src, TGSI_SWIZZLE_Z)); in tx_src_param()
1389 dst = ureg_writemask(dst, param->mask); in _tx_dst_param()
1405 tx->regs.tdst = ureg_writemask(tx_scratch(tx), param->mask); in tx_dst_param()
1500 ureg_DP3(ureg, ureg_writemask(dst, m), src[0], src[1]); in NineTranslateInstruction_Mkxn()
1503 ureg_DP4(ureg, ureg_writemask(dst, m), src[0], src[1]); in NineTranslateInstruction_Mkxn()
1682 ureg_MUL(ureg, ureg_writemask(dst, TGSI_WRITEMASK_XYZ), in DECL_SPECIAL()
1687 ureg_MAD(ureg, ureg_writemask(dst, TGSI_WRITEMASK_XYZ), in DECL_SPECIAL()
1693 ureg_MOV(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W), in DECL_SPECIAL()
[all …]
/third_party/mesa3d/src/gallium/frontends/d3d10umd/
DShaderTGSI.c463 ureg_writemask(temp, sx->inputs[index].writemask), in dcl_base_input()
466 ureg_MOV(ureg, ureg_writemask(temp, writemask), in dcl_base_input()
473 ureg_MOV(ureg, ureg_writemask(temp, writemask), in dcl_base_input()
614 tmp = ureg_writemask(tmp, TGSI_WRITEMASK_X); in dcl_ps_sgv_input()
647 ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), in dcl_ps_siv_input()
845 reg = ureg_writemask(reg, writemask); in translate_dst_operand()
1217 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_X); in expand_unary_to_scalarf()
1222 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_Y); in expand_unary_to_scalarf()
1227 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_Z); in expand_unary_to_scalarf()
1232 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_W); in expand_unary_to_scalarf()
[all …]
/third_party/mesa3d/src/gallium/frontends/xa/
Dxa_tgsi.c116 ureg_MUL(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W), in src_in_mask()
289 ureg_writemask(tmp1, TGSI_WRITEMASK_W), in xrender_tex()
309 ureg_writemask(dst, TGSI_WRITEMASK_W), in xrender_tex()
391 ureg_MOV(ureg, ureg_writemask(src, TGSI_WRITEMASK_XYZ), in create_fs()
/third_party/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c262 return ureg_writemask(out, write_mask); in ntt_output_decl()
576 decl = ureg_writemask(ureg_DECL_temporary(c->ureg), write_mask); in ntt_setup_registers()
632 c->addr_reg[c->next_addr_reg] = ureg_writemask(ureg_DECL_address(c->ureg), in ntt_reladdr()
749 return ureg_writemask(dst, writemask); in ntt_get_ssa_def_decl()
859 dst = ureg_writemask(dst, ntt_64bit_write_mask(instr->dest.write_mask)); in ntt_emit_alu()
861 dst = ureg_writemask(dst, instr->dest.write_mask); in ntt_emit_alu()
1132 ureg_MOV(c->ureg, ureg_writemask(dst, TGSI_WRITEMASK_XZ), in ntt_emit_alu()
1136 ureg_MOV(c->ureg, ureg_writemask(dst, TGSI_WRITEMASK_YW), in ntt_emit_alu()
1193 dsts[0] = ureg_writemask(dst, ntt_64bit_write_mask(wm)); in ntt_emit_alu()
1195 dsts[1] = ureg_writemask(dst, wm); in ntt_emit_alu()
[all …]
/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_surface.c951 ureg_TEX(ureg, ureg_writemask(data, TGSI_WRITEMASK_X), in nv50_blitter_make_fp()
953 ureg_MOV(ureg, ureg_writemask(data, TGSI_WRITEMASK_Y), in nv50_blitter_make_fp()
959 ureg_TEX(ureg, ureg_writemask(data, mask), in nv50_blitter_make_fp()
972 struct ureg_dst zdst3 = ureg_writemask(data, TGSI_WRITEMASK_XYZ); in nv50_blitter_make_fp()
973 struct ureg_dst zdst = ureg_writemask(data, TGSI_WRITEMASK_X); in nv50_blitter_make_fp()
974 struct ureg_dst sdst = ureg_writemask(data, TGSI_WRITEMASK_Y); in nv50_blitter_make_fp()
988 outz = ureg_writemask(out, TGSI_WRITEMASK_XYZ); in nv50_blitter_make_fp()
989 outs = ureg_writemask(out, TGSI_WRITEMASK_W); in nv50_blitter_make_fp()
992 outz = ureg_writemask(out, TGSI_WRITEMASK_YZW); in nv50_blitter_make_fp()
993 outs = ureg_writemask(out, TGSI_WRITEMASK_X); in nv50_blitter_make_fp()
[all …]
/third_party/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_program.c185 ureg_writemask(ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0), in fd_prog_blit_fs()
/third_party/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp6030 dst = ureg_writemask(dst, dst_reg->writemask); in translate_dst()
6344 dst[0] = ureg_writemask(dst[0], inst->dst[0].writemask); in compile_tgsi_instruction()
6375 ureg_ADD(ureg, ureg_writemask(samplepos_flipped, TGSI_WRITEMASK_Y), in emit_samplepos_adjustment()
6379 ureg_FSEQ(ureg, ureg_writemask(is_fbo, TGSI_WRITEMASK_Y), in emit_samplepos_adjustment()
6381 ureg_UCMP(ureg, ureg_writemask(samplepos_flipped, TGSI_WRITEMASK_Y), in emit_samplepos_adjustment()
6383 ureg_MOV(ureg, ureg_writemask(samplepos_flipped, TGSI_WRITEMASK_X), in emit_samplepos_adjustment()
6452 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y), in emit_wpos_adjustment()
6460 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y), in emit_wpos_adjustment()
6855 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z); in st_translate_program()
6861 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y); in st_translate_program()
[all …]
Dst_pbo.c377 ureg_F2I(ureg, ureg_writemask(out_layer, TGSI_WRITEMASK_X), in st_pbo_create_gs()
/third_party/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_ureg.h912 ureg_writemask( struct ureg_dst reg, in ureg_writemask() function
/third_party/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_surface.c857 ureg_MOV(ureg, ureg_writemask(opos, TGSI_WRITEMASK_XY ), ipos); in nvc0_blitter_make_vp()
858 ureg_MOV(ureg, ureg_writemask(otex, TGSI_WRITEMASK_XYZ), itex); in nvc0_blitter_make_vp()