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1# Interrupt and Exception Handling
2
3
4## Basic Concepts
5
6An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention. An interrupt alerts the processor of a high-priority condition requiring interruption of the code being executed by the processor. In this way, the CPU does not need to spend a lot of time in waiting and querying the peripheral status, which effectively improves the real-time performance and execution efficiency of the system.
7
8OpenHarmony supports the following interrupt operations:
9
10+ Initializing an interrupt.
11+ Creating an interrupt.
12+ Enabling or disabling interrupts.
13+ Restoring the system status before interrupts are disabled.
14+ Deleting an interrupt.
15
16Exception handling involves a series of actions taken by the OS to respond to exceptions (chip hardware faults) that occurred during the OS running, for example, printing the call stack information of the current function, CPU information, and call stack information of tasks when the virtual memory page is missing.
17
18
19## Working Principles
20
21Peripherals can complete certain work without the intervention of the CPU. In some cases, however, the CPU needs to perform certain work for peripherals. With the interrupt mechanism, the CPU responds to the interrupt request from a peripheral only when required, and execute other tasks when the peripherals do not require the CPU.
22
23The interrupt controller receives the input from the interrupt pins of other peripherals and sends interrupt signals to the CPU. You can enable or disable the interrupt source and set the priority and trigger mode of the interrupt source by programming the interrupt controller. Common interrupt controllers include vector interrupt controllers (VICs) and general interrupt controllers (GICs). The ARM Cortex-A7 uses GICs.
24
25After receiving an interrupt signal sent by the interrupt controller, the CPU interrupts the current task to respond to the interrupt request.
26
27An exception interrupts the normal running process of the CPU to handle exceptions, such as, undefined instructions, an attempt to modify read-only data, and unaligned address access. When an exception occurs, the CPU suspends the current program, handles the exception, and then continues to execute the program interrupted by the exception.
28
29The following uses the ARMv7-a architecture as an example. The interrupt vector table is the entry for interrupt and exception handling. The interrupt vector table contains the entry function for each interrupt and exception handling.
30
31**Figure 1** Interrupt vector table
32
33![](figures/interrupt-vector-table.png "interrupt-vector-table")
34
35
36## Development Guidelines
37
38
39### Available APIs
40
41Exception handling is an internal mechanism and does not provide external APIs. The following tables describe the APIs available for the interrupt module.
42
43##### Creating or Deleting an Interrupt
44
45| API       | Description                                                    |
46|------------ | ----------------------------------------------------------- |
47| LOS_HwiCreate | Creates an interrupt and registers the interrupt ID, triggering mode, priority, and interrupt handler. When the interrupt is triggered, the interrupt handler will be called.|
48| LOS_HwiDelete | Deletes an interrupt based on the interrupt number.                                  |
49
50##### Enabling or Disabling Interrupts
51
52| API        | Description                                   |
53| -------------- | ------------------------------------------- |
54| LOS_IntUnlock  | Enables all interrupts for the current processor.                 |
55| LOS_IntLock    | Disables all interrupts for the current processor.                 |
56| LOS_IntRestore | Restores the status in which the system was before **LOS_IntLock** is called.|
57
58##### Obtaining Interrupt Information
59
60| API                 | Description                |
61| ----------------------- | ------------------------ |
62| LOS_GetSystemHwiMaximum | Obtains the maximum number of interrupts supported by the system.|
63
64
65
66### How to Develop
67
681. Call **LOS_HwiCreate** to create an interrupt.
69
702. Call **LOS_HwiDelete** to delete the specified interrupt. Use this API based on actual requirements.
71
72
73### Development Example
74
75
76This example implements the following:
77
78
791. Create an interrupt.
80
812. Delete an interrupt.
82
83The following sample code demostrates how to create and delete an interrupt, and call the interrupt handler when the specified interrupt **HWI_NUM_TEST** is triggered. You can add the test function of the sample code to **TestTaskEntry** in **kernel/liteos_a/testsuites/kernel/src/osTest.c** for testing.
84
85The sample code is as follows:
86
87```c
88#include "los_hwi.h"
89/* Interrupt handler function*/
90STATIC VOID HwiUsrIrq(VOID)
91{
92    PRINTK("in the func HwiUsrIrq \n");
93}
94
95static UINT32 Example_Interrupt(VOID)
96{
97    UINT32 ret;
98    HWI_HANDLE_T hwiNum = 7; // The interrupt number is 7.
99    HWI_PRIOR_T hwiPrio = 3; // The interrupt priority is 3.
100    HWI_MODE_T mode = 0;
101    HWI_ARG_T arg = 0;
102
103    /* Create an interrupt. */
104    ret = LOS_HwiCreate(hwiNum, hwiPrio, mode, (HWI_PROC_FUNC)HwiUsrIrq, (HwiIrqParam *)arg);
105    if (ret == LOS_OK) {
106        PRINTK("Hwi create success!\n");
107    } else {
108        PRINTK("Hwi create failed!\n");
109        return LOS_NOK;
110    }
111
112    /* Delay 50 ticks. Call HwiUsrIrq when a hardware interrupt occurs. */
113    LOS_TaskDelay(50);
114
115    /* Delete the interrupt. */
116    ret = LOS_HwiDelete(hwiNum, (HwiIrqParam *)arg);
117    if (ret == LOS_OK) {
118        PRINTK("Hwi delete success!\n");
119    } else {
120        PRINTK("Hwi delete failed!\n");
121        return LOS_NOK;
122    }
123    return LOS_OK;
124}
125```
126
127
128### Verification
129
130The development is successful if the return result is as follows:
131
132```
133Hwi create success!
134Hwi delete success!
135```
136