1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "los_interrupt.h"
33 #include <stdarg.h>
34 #include "securec.h"
35 #include "los_context.h"
36 #include "los_arch_context.h"
37 #include "los_arch_interrupt.h"
38 #include "los_debug.h"
39 #include "los_hook.h"
40 #include "los_task.h"
41 #include "los_sched.h"
42 #include "los_memory.h"
43 #include "los_membox.h"
44
45 #define INT_OFFSET 6
46 #define PRI_OFF_PER_INT 8
47 #define PRI_PER_REG 4
48 #define PRI_OFF_IN_REG 6
49 #define PRI_BITS 2
50 #define PRI_HI 0
51 #define PRI_LOW 7
52 #define MASK_8_BITS 0xFF
53 #define MASK_32_BITS 0xFFFFFFFF
54 #define BYTES_OF_128_INT 4
55
56 #define OS_USER_HWI_MIN 0
57 #define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
58 #define HWI_ALIGNSIZE 0x400
59
60 UINT32 volatile g_intCount = 0;
61 CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
62
63 VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
64
HwiNumValid(UINT32 num)65 UINT32 HwiNumValid(UINT32 num)
66 {
67 return ((num) >= OS_USER_HWI_MIN) && ((num) <= OS_USER_HWI_MAX);
68 }
69
HalGetPsr(VOID)70 UINT32 HalGetPsr(VOID)
71 {
72 UINT32 intSave;
73 __asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory");
74 return intSave;
75 }
76
HalSetVbr(UINT32 intSave)77 UINT32 HalSetVbr(UINT32 intSave)
78 {
79 __asm__ volatile("mtcr %0, vbr" : : "r"(intSave) : "memory");
80 return intSave;
81 }
82
ArchIntLock(VOID)83 UINT32 ArchIntLock(VOID)
84 {
85 UINT32 intSave;
86 __asm__ __volatile__(
87 "mfcr %0, psr \n"
88 "psrclr ie"
89 : "=r"(intSave)
90 :
91 : "memory");
92 return intSave;
93 }
94
ArchIntUnLock(VOID)95 UINT32 ArchIntUnLock(VOID)
96 {
97 UINT32 intSave;
98 __asm__ __volatile__(
99 "mfcr %0, psr \n"
100 "psrset ie"
101 : "=r"(intSave)
102 :
103 : "memory");
104 return intSave;
105 }
106
ArchIntRestore(UINT32 intSave)107 VOID ArchIntRestore(UINT32 intSave)
108 {
109 __asm__ __volatile__("mtcr %0, psr" : : "r"(intSave));
110 }
111
ArchIntLocked(VOID)112 UINT32 ArchIntLocked(VOID)
113 {
114 UINT32 intSave;
115 __asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory");
116 return !(intSave & (1 << INT_OFFSET));
117 }
118
HwiUnmask(HWI_HANDLE_T hwiNum)119 STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
120 {
121 UINT32 intSave;
122
123 if (!HwiNumValid(hwiNum)) {
124 return LOS_ERRNO_HWI_NUM_INVALID;
125 }
126
127 intSave = LOS_IntLock();
128 VIC_REG->ISER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
129 VIC_REG->ISSR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
130 LOS_IntRestore(intSave);
131
132 return LOS_OK;
133 }
134
HwiSetPriority(HWI_HANDLE_T hwiNum,UINT8 priority)135 STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
136 {
137 UINT32 intSave;
138
139 if (!HwiNumValid(hwiNum)) {
140 return LOS_ERRNO_HWI_NUM_INVALID;
141 }
142
143 if (!HWI_PRI_VALID(priority)) {
144 return OS_ERRNO_HWI_PRIO_INVALID;
145 }
146
147 intSave = LOS_IntLock();
148 VIC_REG->IPR[hwiNum / PRI_PER_REG] |= (((priority << PRI_OFF_IN_REG) << (hwiNum % PRI_PER_REG)) * PRI_OFF_PER_INT);
149 LOS_IntRestore(intSave);
150
151 return LOS_OK;
152 }
153
HwiMask(HWI_HANDLE_T hwiNum)154 STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
155 {
156 UINT32 intSave;
157
158 if (!HwiNumValid(hwiNum)) {
159 return LOS_ERRNO_HWI_NUM_INVALID;
160 }
161
162 intSave = LOS_IntLock();
163 VIC_REG->ICER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
164 LOS_IntRestore(intSave);
165
166 return LOS_OK;
167 }
168
HwiPending(HWI_HANDLE_T hwiNum)169 STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
170 {
171 UINT32 intSave;
172
173 if (!HwiNumValid(hwiNum)) {
174 return LOS_ERRNO_HWI_NUM_INVALID;
175 }
176
177 intSave = LOS_IntLock();
178 VIC_REG->ISPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
179 LOS_IntRestore(intSave);
180
181 return LOS_OK;
182 }
183
HwiClear(HWI_HANDLE_T hwiNum)184 STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
185 {
186 if (!HwiNumValid(hwiNum)) {
187 return LOS_ERRNO_HWI_NUM_INVALID;
188 }
189
190 VIC_REG->ICPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
191
192 return LOS_OK;
193 }
194
195 /* *
196 * @ingroup los_hwi
197 * Hardware interrupt form mapping handling function array.
198 */
199 STATIC HWI_PROC_FUNC __attribute__((aligned(HWI_ALIGNSIZE))) g_hwiForm[OS_VECTOR_CNT] = {0};
200
201 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
202
203 typedef struct {
204 HWI_PROC_FUNC pfnHandler;
205 VOID *pParm;
206 } HWI_HANDLER_FUNC;
207
208 /* *
209 * @ingroup los_hwi
210 * Hardware interrupt handler form mapping handling function array.
211 */
212 STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
213
214 /* *
215 * @ingroup los_hwi
216 * Set interrupt vector table.
217 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector,VOID * arg)218 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
219 {
220 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
221 g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)IrqEntry;
222 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
223 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
224 HwiUnmask(num);
225 }
226 }
227
228 #else
229 /* *
230 * @ingroup los_hwi
231 * Hardware interrupt handler form mapping handling function array.
232 */
233 STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
234
235 /* *
236 * @ingroup los_hwi
237 * Set interrupt vector table.
238 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector)239 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
240 {
241 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
242 g_hwiForm[num + OS_SYS_VECTOR_CNT] = IrqEntry;
243 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
244 HwiUnmask(num);
245 }
246 }
247 #endif
248
249 /* ****************************************************************************
250 Function : HwiNumGet
251 Description : Get an interrupt number
252 Input : None
253 Output : None
254 Return : Interrupt Indexes number
255 **************************************************************************** */
HwiNumGet(VOID)256 STATIC UINT32 HwiNumGet(VOID)
257 {
258 return (HalGetPsr() >> PSR_VEC_OFFSET) & MASK_8_BITS;
259 }
260
261 HwiControllerOps g_archHwiOps = {
262 .triggerIrq = HwiPending,
263 .enableIrq = HwiUnmask,
264 .disableIrq = HwiMask,
265 .setIrqPriority = HwiSetPriority,
266 .getCurIrqNum = HwiNumGet,
267 .clearIrq = HwiClear,
268 };
269
ArchIsIntActive(VOID)270 inline UINT32 ArchIsIntActive(VOID)
271 {
272 return (g_intCount > 0);
273 }
274
275 /* ****************************************************************************
276 Function : HalHwiDefaultHandler
277 Description : default handler of the hardware interrupt
278 Input : None
279 Output : None
280 Return : None
281 **************************************************************************** */
HalHwiDefaultHandler(VOID)282 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
283 {
284 PRINT_ERR("%s irqnum:%x\n", __FUNCTION__, HwiNumGet());
285 while (1) {}
286 }
287
HalPreInterruptHandler(UINT32 arg)288 WEAK VOID HalPreInterruptHandler(UINT32 arg)
289 {
290 (VOID)arg;
291 return;
292 }
293
HalAftInterruptHandler(UINT32 arg)294 WEAK VOID HalAftInterruptHandler(UINT32 arg)
295 {
296 (VOID)arg;
297 return;
298 }
299
300 /* ****************************************************************************
301 Function : HalInterrupt
302 Description : Hardware interrupt entry function
303 Input : None
304 Output : None
305 Return : None
306 **************************************************************************** */
HalInterrupt(VOID)307 LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
308 {
309 UINT32 hwiIndex;
310 UINT32 intSave;
311
312 intSave = LOS_IntLock();
313 g_intCount++;
314 LOS_IntRestore(intSave);
315
316 hwiIndex = HwiNumGet();
317 OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
318
319 HalPreInterruptHandler(hwiIndex);
320 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
321 if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
322 g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
323 }
324 #else
325 if (g_hwiHandlerForm[hwiIndex] != 0) {
326 g_hwiHandlerForm[hwiIndex]();
327 }
328 #endif
329
330 HalAftInterruptHandler(hwiIndex);
331
332 OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
333
334 intSave = LOS_IntLock();
335 g_intCount--;
336 #ifndef CPU_CK804
337 HalIrqEndCheckNeedSched();
338 #endif
339 LOS_IntRestore(intSave);
340 }
341
342 /* ****************************************************************************
343 Function : ArchHwiCreate
344 Description : create hardware interrupt
345 Input : hwiNum --- hwi num to create
346 hwiPrio --- priority of the hwi
347 hwiMode --- unused
348 hwiHandler --- hwi handler
349 irqParam --- param of the hwi handler
350 Output : None
351 Return : LOS_OK on success or error code on failure
352 **************************************************************************** */
ArchHwiCreate(HWI_HANDLE_T hwiNum,HWI_PRIOR_T hwiPrio,HWI_MODE_T hwiMode,HWI_PROC_FUNC hwiHandler,HwiIrqParam * irqParam)353 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
354 HWI_PRIOR_T hwiPrio,
355 HWI_MODE_T hwiMode,
356 HWI_PROC_FUNC hwiHandler,
357 HwiIrqParam *irqParam)
358 {
359 (VOID)hwiMode;
360 UINT32 intSave;
361
362 if (hwiHandler == NULL) {
363 return OS_ERRNO_HWI_PROC_FUNC_NULL;
364 }
365 if (hwiNum >= OS_HWI_MAX_NUM) {
366 return OS_ERRNO_HWI_NUM_INVALID;
367 }
368 if (g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] != 0) {
369 return OS_ERRNO_HWI_ALREADY_CREATED;
370 }
371 if (g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] != 0) {
372 return OS_ERRNO_HWI_ALREADY_CREATED;
373 }
374 if (hwiPrio > OS_HWI_PRIO_LOWEST) {
375 return OS_ERRNO_HWI_PRIO_INVALID;
376 }
377 intSave = LOS_IntLock();
378 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
379 if (irqParam != NULL) {
380 OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
381 } else {
382 OsSetVector(hwiNum, hwiHandler, NULL);
383 }
384 #else
385 (VOID)irqParam;
386 OsSetVector(hwiNum, hwiHandler);
387 #endif
388 HwiUnmask(hwiNum);
389 (VOID)HwiSetPriority(hwiNum, (UINT8)hwiPrio);
390 LOS_IntRestore(intSave);
391
392 return LOS_OK;
393 }
394
395 /* ****************************************************************************
396 Function : ArchHwiDelete
397 Description : Delete hardware interrupt
398 Input : hwiNum --- hwi num to delete
399 irqParam --- param of the hwi handler
400 Output : None
401 Return : LOS_OK on success or error code on failure
402 **************************************************************************** */
ArchHwiDelete(HWI_HANDLE_T hwiNum,HwiIrqParam * irqParam)403 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
404 {
405 (VOID)irqParam;
406 UINT32 intSave;
407
408 if (hwiNum >= OS_HWI_MAX_NUM) {
409 return OS_ERRNO_HWI_NUM_INVALID;
410 }
411 HwiMask(hwiNum);
412 intSave = LOS_IntLock();
413 g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] = 0;
414 LOS_IntRestore(intSave);
415
416 return LOS_OK;
417 }
418
419 ExcInfo g_excInfo = {0};
420
421 #if (LOSCFG_KERNEL_PRINTF != 0)
OsExcTypeInfo(const ExcInfo * excInfo)422 STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
423 {
424 CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
425
426 PRINTK("Type = %d\n", excInfo->type);
427 PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
428 PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
429 PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
430 }
431
OsExcCurTaskInfo(const ExcInfo * excInfo)432 STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
433 {
434 PRINTK("Current task info:\n");
435 if (excInfo->phase == OS_EXC_IN_TASK) {
436 LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
437 PRINTK("Task name = %s\n", taskCB->taskName);
438 PRINTK("Task ID = %d\n", taskCB->taskID);
439 PRINTK("Task SP = 0x%x\n", (UINTPTR)taskCB->stackPointer);
440 PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
441 PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
442 } else if (excInfo->phase == OS_EXC_IN_HWI) {
443 PRINTK("Exception occur in interrupt phase!\n");
444 } else {
445 PRINTK("Exception occur in system init phase!\n");
446 }
447 }
448
OsExcRegInfo(const ExcInfo * excInfo)449 STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
450 {
451 EXC_CONTEXT_S *excContext = excInfo->context;
452 PRINTK("Exception reg dump:\n");
453 PRINTK("R0 = 0x%x\n"
454 "R1 = 0x%x\n"
455 "R2 = 0x%x\n"
456 "R3 = 0x%x\n"
457 "R4 = 0x%x\n"
458 "R5 = 0x%x\n"
459 "R6 = 0x%x\n"
460 "R7 = 0x%x\n"
461 "R8 = 0x%x\n"
462 "R9 = 0x%x\n"
463 "R10 = 0x%x\n"
464 "R11 = 0x%x\n"
465 "R12 = 0x%x\n"
466 "R13 = 0x%x\n"
467 "R14 = 0x%x\n"
468 "R15 = 0x%x\n"
469 "EPSR = 0x%x\n"
470 "EPC = 0x%x\n",
471 excContext->R0, excContext->R1, excContext->R2, excContext->R3, excContext->R4, excContext->R5,
472 excContext->R6, excContext->R7, excContext->R8, excContext->R9, excContext->R10, excContext->R11,
473 excContext->R12, excContext->R13, excContext->R14, excContext->R15, excContext->EPSR,
474 excContext->EPC);
475 }
476
477 #if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(const ExcInfo * excInfo)478 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
479 {
480 UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
481 UINT32 index;
482
483 OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->R14);
484
485 PRINTK("----- backtrace start -----\n");
486 for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
487 if (LR[index] == 0) {
488 break;
489 }
490 PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
491 }
492 PRINTK("----- backtrace end -----\n");
493 }
494 #endif
495
OsExcMemPoolCheckInfo(VOID)496 STATIC VOID OsExcMemPoolCheckInfo(VOID)
497 {
498 PRINTK("\r\nmemory pools check:\n");
499 #if (LOSCFG_PLATFORM_EXC == 1)
500 MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
501 UINT32 errCnt;
502 UINT32 i;
503
504 (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
505
506 errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
507 if (errCnt < OS_SYS_MEM_NUM) {
508 errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
509 }
510
511 if (errCnt == 0) {
512 PRINTK("all memory pool check passed!\n");
513 return;
514 }
515
516 for (i = 0; i < errCnt; i++) {
517 PRINTK("pool num = %d\n", i);
518 PRINTK("pool type = %d\n", memExcInfo[i].type);
519 PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
520 PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
521 PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
522 PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
523 PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
524 PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
525 PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
526 }
527 #endif
528 UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
529 if (ret == LOS_OK) {
530 PRINTK("system heap memcheck over, all passed!\n");
531 }
532
533 PRINTK("memory pool check end!\n");
534 }
535 #endif
536
OsExcInfoDisplay(const ExcInfo * excInfo)537 STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
538 {
539 #if (LOSCFG_KERNEL_PRINTF != 0)
540 PRINTK("*************Exception Information**************\n");
541 OsExcTypeInfo(excInfo);
542 OsExcCurTaskInfo(excInfo);
543 OsExcRegInfo(excInfo);
544 #if (LOSCFG_KERNEL_BACKTRACE == 1)
545 OsExcBackTraceInfo(excInfo);
546 #endif
547 OsGetAllTskInfo();
548 OsExcMemPoolCheckInfo();
549 #endif
550 }
551
HalExcHandleEntry(EXC_CONTEXT_S * excBufAddr,UINT32 faultAddr)552 LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(EXC_CONTEXT_S *excBufAddr, UINT32 faultAddr)
553 {
554 UINT16 tmpFlag = ((excBufAddr->EPSR >> PSR_VEC_OFFSET) & MASK_8_BITS);
555 g_excInfo.nestCnt++;
556 UINT32 excType = (HalGetPsr() >> PSR_VEC_OFFSET) & MASK_8_BITS;
557 g_excInfo.type = excType;
558
559 g_excInfo.faultAddr = faultAddr;
560
561 if (g_losTask.runTask != NULL) {
562 if (tmpFlag > 0) {
563 g_excInfo.phase = OS_EXC_IN_HWI;
564 g_excInfo.thrdPid = tmpFlag;
565 } else {
566 g_excInfo.phase = OS_EXC_IN_TASK;
567 g_excInfo.thrdPid = g_losTask.runTask->taskID;
568 }
569 } else {
570 g_excInfo.phase = OS_EXC_IN_INIT;
571 g_excInfo.thrdPid = OS_NULL_INT;
572 }
573 g_excInfo.context = excBufAddr;
574
575 OsDoExcHook(EXC_INTERRUPT);
576 OsExcInfoDisplay(&g_excInfo);
577 ArchSysExit();
578 }
579
580 /* stack protector */
581 WEAK UINT32 __stack_chk_guard = 0xd00a0dff;
582
__stack_chk_fail(VOID)583 WEAK VOID __stack_chk_fail(VOID)
584 {
585 /* __builtin_return_address is a builtin function, building in gcc */
586 LOS_Panic("stack-protector: Kernel stack is corrupted in: %x\n",
587 __builtin_return_address(0));
588 }
589
HalHwiHandleReInit(UINT32 hwiFormAddr)590 WEAK void HalHwiHandleReInit(UINT32 hwiFormAddr)
591 {
592 }
593
594 /* ****************************************************************************
595 Function : HalHwiInit
596 Description : initialization of the hardware interrupt
597 Input : None
598 Output : None
599 Return : None
600 **************************************************************************** */
HalHwiInit(VOID)601 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
602 {
603 UINT32 i;
604
605 for (i = 1; i < OS_SYS_VECTOR_CNT; i++) {
606 g_hwiForm[i] = (HWI_PROC_FUNC)HandleEntry;
607 }
608
609 for (i = OS_SYS_VECTOR_CNT; i < (LOSCFG_PLATFORM_HWI_LIMIT + OS_SYS_VECTOR_CNT); i++) {
610 g_hwiForm[i] = (HWI_PROC_FUNC)IrqEntry;
611 }
612 HalHwiHandleReInit((UINT32)&g_hwiForm);
613
614 HalSetVbr((UINT32)&g_hwiForm);
615 for (i = 0; i < BYTES_OF_128_INT; i++) {
616 VIC_REG->IABR[i] = 0x0;
617 VIC_REG->ICPR[i] = MASK_32_BITS;
618 }
619 return;
620 }
621
622