1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #ifndef SWR_STATE_H
25 #define SWR_STATE_H
26
27 #include "pipe/p_defines.h"
28 #include "tgsi/tgsi_scan.h"
29 #include "tgsi/tgsi_parse.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "gallivm/lp_bld_init.h"
32 #include "gallivm/lp_bld_tgsi.h"
33 #include "util/crc32.h"
34 #include "api.h"
35 #include "swr_tex_sample.h"
36 #include "swr_shader.h"
37 #include <unordered_map>
38 #include <memory>
39
40 template <typename T>
41 struct ShaderVariant {
42 struct gallivm_state *gallivm;
43 T shader;
44
ShaderVariantShaderVariant45 ShaderVariant(struct gallivm_state *gs, T code) : gallivm(gs), shader(code) {}
~ShaderVariantShaderVariant46 ~ShaderVariant() { gallivm_destroy(gallivm); }
47 };
48
49 using PFN_TCS_FUNC = PFN_HS_FUNC;
50 using PFN_TES_FUNC = PFN_DS_FUNC;
51
52 typedef ShaderVariant<PFN_VERTEX_FUNC> VariantVS;
53 typedef ShaderVariant<PFN_PIXEL_KERNEL> VariantFS;
54 typedef ShaderVariant<PFN_GS_FUNC> VariantGS;
55 typedef ShaderVariant<PFN_TCS_FUNC> VariantTCS;
56 typedef ShaderVariant<PFN_TES_FUNC> VariantTES;
57
58 /* skeleton */
59 struct swr_vertex_shader {
60 struct pipe_shader_state pipe;
61 struct lp_tgsi_info info;
62 std::unordered_map<swr_jit_vs_key, std::unique_ptr<VariantVS>> map;
63 SWR_STREAMOUT_STATE soState;
64 PFN_SO_FUNC soFunc[PIPE_PRIM_MAX] {0};
65 };
66
67 struct swr_fragment_shader {
68 struct pipe_shader_state pipe;
69 struct lp_tgsi_info info;
70 uint32_t constantMask;
71 uint32_t flatConstantMask;
72 uint32_t pointSpriteMask;
73 std::unordered_map<swr_jit_fs_key, std::unique_ptr<VariantFS>> map;
74 };
75
76 struct swr_geometry_shader {
77 struct pipe_shader_state pipe;
78 struct lp_tgsi_info info;
79 SWR_GS_STATE gsState;
80
81 std::unordered_map<swr_jit_gs_key, std::unique_ptr<VariantGS>> map;
82 };
83
84 struct swr_tess_control_shader {
85 struct pipe_shader_state pipe;
86 struct lp_tgsi_info info;
87 uint32_t vertices_per_patch;
88
89 std::unordered_map<swr_jit_tcs_key, std::unique_ptr<VariantTCS>> map;
90 };
91
92 struct swr_tess_evaluation_shader {
93 struct pipe_shader_state pipe;
94 struct lp_tgsi_info info;
95 SWR_TS_STATE ts_state;
96
97 std::unordered_map<swr_jit_tes_key, std::unique_ptr<VariantTES>> map;
98 };
99
100
101 /* Vertex element state */
102 struct swr_vertex_element_state {
103 FETCH_COMPILE_STATE fsState;
104 PFN_FETCH_FUNC fsFunc {NULL};
105 uint32_t stream_pitch[PIPE_MAX_ATTRIBS] {0};
106 uint32_t min_instance_div[PIPE_MAX_ATTRIBS] {0};
107 uint32_t instanced_bufs {0};
108 std::unordered_map<swr_jit_fetch_key, PFN_FETCH_FUNC> map;
109 };
110
111 struct swr_blend_state {
112 struct pipe_blend_state pipe;
113 SWR_BLEND_STATE blendState;
114 RENDER_TARGET_BLEND_COMPILE_STATE compileState[PIPE_MAX_COLOR_BUFS];
115 };
116
117 struct swr_poly_stipple {
118 struct pipe_poly_stipple pipe;
119 bool prim_is_poly;
120 };
121
122 /*
123 * Derived SWR API DrawState
124 * For convenience of making simple changes without re-deriving state.
125 */
126 struct swr_derived_state {
127 SWR_RASTSTATE rastState;
128 SWR_VIEWPORT vp[KNOB_NUM_VIEWPORTS_SCISSORS];
129 SWR_VIEWPORT_MATRICES vpm;
130 };
131
132 void swr_update_derived(struct pipe_context *,
133 const struct pipe_draw_info * = nullptr,
134 const struct pipe_draw_start_count_bias *draw = nullptr);
135
136 /*
137 * Conversion functions: Convert mesa state defines to SWR.
138 */
139
140 static INLINE SWR_LOGIC_OP
swr_convert_logic_op(const UINT op)141 swr_convert_logic_op(const UINT op)
142 {
143 switch (op) {
144 case PIPE_LOGICOP_CLEAR:
145 return LOGICOP_CLEAR;
146 case PIPE_LOGICOP_NOR:
147 return LOGICOP_NOR;
148 case PIPE_LOGICOP_AND_INVERTED:
149 return LOGICOP_AND_INVERTED;
150 case PIPE_LOGICOP_COPY_INVERTED:
151 return LOGICOP_COPY_INVERTED;
152 case PIPE_LOGICOP_AND_REVERSE:
153 return LOGICOP_AND_REVERSE;
154 case PIPE_LOGICOP_INVERT:
155 return LOGICOP_INVERT;
156 case PIPE_LOGICOP_XOR:
157 return LOGICOP_XOR;
158 case PIPE_LOGICOP_NAND:
159 return LOGICOP_NAND;
160 case PIPE_LOGICOP_AND:
161 return LOGICOP_AND;
162 case PIPE_LOGICOP_EQUIV:
163 return LOGICOP_EQUIV;
164 case PIPE_LOGICOP_NOOP:
165 return LOGICOP_NOOP;
166 case PIPE_LOGICOP_OR_INVERTED:
167 return LOGICOP_OR_INVERTED;
168 case PIPE_LOGICOP_COPY:
169 return LOGICOP_COPY;
170 case PIPE_LOGICOP_OR_REVERSE:
171 return LOGICOP_OR_REVERSE;
172 case PIPE_LOGICOP_OR:
173 return LOGICOP_OR;
174 case PIPE_LOGICOP_SET:
175 return LOGICOP_SET;
176 default:
177 assert(0 && "Unsupported logic op");
178 return LOGICOP_NOOP;
179 }
180 }
181
182 static INLINE SWR_STENCILOP
swr_convert_stencil_op(const UINT op)183 swr_convert_stencil_op(const UINT op)
184 {
185 switch (op) {
186 case PIPE_STENCIL_OP_KEEP:
187 return STENCILOP_KEEP;
188 case PIPE_STENCIL_OP_ZERO:
189 return STENCILOP_ZERO;
190 case PIPE_STENCIL_OP_REPLACE:
191 return STENCILOP_REPLACE;
192 case PIPE_STENCIL_OP_INCR:
193 return STENCILOP_INCRSAT;
194 case PIPE_STENCIL_OP_DECR:
195 return STENCILOP_DECRSAT;
196 case PIPE_STENCIL_OP_INCR_WRAP:
197 return STENCILOP_INCR;
198 case PIPE_STENCIL_OP_DECR_WRAP:
199 return STENCILOP_DECR;
200 case PIPE_STENCIL_OP_INVERT:
201 return STENCILOP_INVERT;
202 default:
203 assert(0 && "Unsupported stencil op");
204 return STENCILOP_KEEP;
205 }
206 }
207
208 static INLINE SWR_FORMAT
swr_convert_index_type(const UINT index_size)209 swr_convert_index_type(const UINT index_size)
210 {
211 switch (index_size) {
212 case sizeof(unsigned char):
213 return R8_UINT;
214 case sizeof(unsigned short):
215 return R16_UINT;
216 case sizeof(unsigned int):
217 return R32_UINT;
218 default:
219 assert(0 && "Unsupported index type");
220 return R32_UINT;
221 }
222 }
223
224
225 static INLINE SWR_ZFUNCTION
swr_convert_depth_func(const UINT pipe_func)226 swr_convert_depth_func(const UINT pipe_func)
227 {
228 switch (pipe_func) {
229 case PIPE_FUNC_NEVER:
230 return ZFUNC_NEVER;
231 case PIPE_FUNC_LESS:
232 return ZFUNC_LT;
233 case PIPE_FUNC_EQUAL:
234 return ZFUNC_EQ;
235 case PIPE_FUNC_LEQUAL:
236 return ZFUNC_LE;
237 case PIPE_FUNC_GREATER:
238 return ZFUNC_GT;
239 case PIPE_FUNC_NOTEQUAL:
240 return ZFUNC_NE;
241 case PIPE_FUNC_GEQUAL:
242 return ZFUNC_GE;
243 case PIPE_FUNC_ALWAYS:
244 return ZFUNC_ALWAYS;
245 default:
246 assert(0 && "Unsupported depth func");
247 return ZFUNC_ALWAYS;
248 }
249 }
250
251
252 static INLINE SWR_CULLMODE
swr_convert_cull_mode(const UINT cull_face)253 swr_convert_cull_mode(const UINT cull_face)
254 {
255 switch (cull_face) {
256 case PIPE_FACE_NONE:
257 return SWR_CULLMODE_NONE;
258 case PIPE_FACE_FRONT:
259 return SWR_CULLMODE_FRONT;
260 case PIPE_FACE_BACK:
261 return SWR_CULLMODE_BACK;
262 case PIPE_FACE_FRONT_AND_BACK:
263 return SWR_CULLMODE_BOTH;
264 default:
265 assert(0 && "Invalid cull mode");
266 return SWR_CULLMODE_NONE;
267 }
268 }
269
270 static INLINE SWR_BLEND_OP
swr_convert_blend_func(const UINT blend_func)271 swr_convert_blend_func(const UINT blend_func)
272 {
273 switch (blend_func) {
274 case PIPE_BLEND_ADD:
275 return BLENDOP_ADD;
276 case PIPE_BLEND_SUBTRACT:
277 return BLENDOP_SUBTRACT;
278 case PIPE_BLEND_REVERSE_SUBTRACT:
279 return BLENDOP_REVSUBTRACT;
280 case PIPE_BLEND_MIN:
281 return BLENDOP_MIN;
282 case PIPE_BLEND_MAX:
283 return BLENDOP_MAX;
284 default:
285 assert(0 && "Invalid blend func");
286 return BLENDOP_ADD;
287 }
288 }
289
290 static INLINE SWR_BLEND_FACTOR
swr_convert_blend_factor(const UINT blend_factor)291 swr_convert_blend_factor(const UINT blend_factor)
292 {
293 switch (blend_factor) {
294 case PIPE_BLENDFACTOR_ONE:
295 return BLENDFACTOR_ONE;
296 case PIPE_BLENDFACTOR_SRC_COLOR:
297 return BLENDFACTOR_SRC_COLOR;
298 case PIPE_BLENDFACTOR_SRC_ALPHA:
299 return BLENDFACTOR_SRC_ALPHA;
300 case PIPE_BLENDFACTOR_DST_ALPHA:
301 return BLENDFACTOR_DST_ALPHA;
302 case PIPE_BLENDFACTOR_DST_COLOR:
303 return BLENDFACTOR_DST_COLOR;
304 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
305 return BLENDFACTOR_SRC_ALPHA_SATURATE;
306 case PIPE_BLENDFACTOR_CONST_COLOR:
307 return BLENDFACTOR_CONST_COLOR;
308 case PIPE_BLENDFACTOR_CONST_ALPHA:
309 return BLENDFACTOR_CONST_ALPHA;
310 case PIPE_BLENDFACTOR_SRC1_COLOR:
311 return BLENDFACTOR_SRC1_COLOR;
312 case PIPE_BLENDFACTOR_SRC1_ALPHA:
313 return BLENDFACTOR_SRC1_ALPHA;
314 case PIPE_BLENDFACTOR_ZERO:
315 return BLENDFACTOR_ZERO;
316 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
317 return BLENDFACTOR_INV_SRC_COLOR;
318 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
319 return BLENDFACTOR_INV_SRC_ALPHA;
320 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
321 return BLENDFACTOR_INV_DST_ALPHA;
322 case PIPE_BLENDFACTOR_INV_DST_COLOR:
323 return BLENDFACTOR_INV_DST_COLOR;
324 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
325 return BLENDFACTOR_INV_CONST_COLOR;
326 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
327 return BLENDFACTOR_INV_CONST_ALPHA;
328 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
329 return BLENDFACTOR_INV_SRC1_COLOR;
330 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
331 return BLENDFACTOR_INV_SRC1_ALPHA;
332 default:
333 assert(0 && "Invalid blend factor");
334 return BLENDFACTOR_ONE;
335 }
336 }
337
338 static INLINE enum SWR_SURFACE_TYPE
swr_convert_target_type(const enum pipe_texture_target target)339 swr_convert_target_type(const enum pipe_texture_target target)
340 {
341 switch (target) {
342 case PIPE_BUFFER:
343 return SURFACE_BUFFER;
344 case PIPE_TEXTURE_1D:
345 case PIPE_TEXTURE_1D_ARRAY:
346 return SURFACE_1D;
347 case PIPE_TEXTURE_2D:
348 case PIPE_TEXTURE_2D_ARRAY:
349 case PIPE_TEXTURE_RECT:
350 return SURFACE_2D;
351 case PIPE_TEXTURE_3D:
352 return SURFACE_3D;
353 case PIPE_TEXTURE_CUBE:
354 case PIPE_TEXTURE_CUBE_ARRAY:
355 return SURFACE_CUBE;
356 default:
357 assert(0);
358 return SURFACE_NULL;
359 }
360 }
361
362 /*
363 * Convert mesa PIPE_PRIM_X to SWR enum PRIMITIVE_TOPOLOGY
364 */
365 static INLINE enum PRIMITIVE_TOPOLOGY
swr_convert_prim_topology(const unsigned mode,const unsigned tcs_verts)366 swr_convert_prim_topology(const unsigned mode, const unsigned tcs_verts)
367 {
368 switch (mode) {
369 case PIPE_PRIM_POINTS:
370 return TOP_POINT_LIST;
371 case PIPE_PRIM_LINES:
372 return TOP_LINE_LIST;
373 case PIPE_PRIM_LINE_LOOP:
374 return TOP_LINE_LOOP;
375 case PIPE_PRIM_LINE_STRIP:
376 return TOP_LINE_STRIP;
377 case PIPE_PRIM_TRIANGLES:
378 return TOP_TRIANGLE_LIST;
379 case PIPE_PRIM_TRIANGLE_STRIP:
380 return TOP_TRIANGLE_STRIP;
381 case PIPE_PRIM_TRIANGLE_FAN:
382 return TOP_TRIANGLE_FAN;
383 case PIPE_PRIM_QUADS:
384 return TOP_QUAD_LIST;
385 case PIPE_PRIM_QUAD_STRIP:
386 return TOP_QUAD_STRIP;
387 case PIPE_PRIM_POLYGON:
388 return TOP_TRIANGLE_FAN; /* XXX TOP_POLYGON; */
389 case PIPE_PRIM_LINES_ADJACENCY:
390 return TOP_LINE_LIST_ADJ;
391 case PIPE_PRIM_LINE_STRIP_ADJACENCY:
392 return TOP_LISTSTRIP_ADJ;
393 case PIPE_PRIM_TRIANGLES_ADJACENCY:
394 return TOP_TRI_LIST_ADJ;
395 case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY:
396 return TOP_TRI_STRIP_ADJ;
397 case PIPE_PRIM_PATCHES:
398 // rasterizer has a separate type for each possible number of patch vertices
399 return (PRIMITIVE_TOPOLOGY)((unsigned)TOP_PATCHLIST_BASE + tcs_verts);
400 default:
401 assert(0 && "Unknown topology");
402 return TOP_UNKNOWN;
403 }
404 };
405
406 /*
407 * convert mesa PIPE_POLYGON_MODE_X to SWR enum SWR_FILLMODE
408 */
409 static INLINE enum SWR_FILLMODE
swr_convert_fill_mode(const unsigned mode)410 swr_convert_fill_mode(const unsigned mode)
411 {
412 switch(mode) {
413 case PIPE_POLYGON_MODE_FILL:
414 return SWR_FILLMODE_SOLID;
415 case PIPE_POLYGON_MODE_LINE:
416 return SWR_FILLMODE_WIREFRAME;
417 case PIPE_POLYGON_MODE_POINT:
418 return SWR_FILLMODE_POINT;
419 default:
420 assert(0 && "Unknown fillmode");
421 return SWR_FILLMODE_SOLID; // at least do something sensible
422 }
423 }
424
425
426 #endif
427