1MOV.i32.ts r1, lane_id 2MOV.i32.id r1, wls_ptr 3MOV.i32 r1, lane_id 4MOV.i32 r1, wls_ptr 5FADD.f32 r0, r1 6TEX.computed.2d.slot0 @r2, @r4:r5:r6:r7 7BRANCH 8BRANCH #0 9BRANCH #0, offset: 10BRANCH u0, offset:-123456789 11BRANCH u0, offset:123456789 12IADD_IMM.i32 r3, #12345 13FADD.v2f16 r0, r1, r0.h0 14MOV.i32.wait01.wait1 r0, r1 15MOV.i32.wait01.return r0, r1 16MOV.i32.reconverge.return r0, r1 17FROUND.f32.rtn.clamp_m1_1 r2, `r2.neg 18 19# An instruction may access no more than a single 64-bit uniform slot. 20FADD.f32 r0, u0, u4 21FADD.f32 r0, u5, u3 22FADD.f32 r0, u5, u6 23 24# An instruction may access no more than 64-bits of combined uniforms and constants. 25FMA.f32 r0, u0, u1, 0x0 26FMA.f32 r0, u0, 0x40490FDB, 0x0 27FMA.f32 r0, 0x3F317218, 0x40490FDB, 0x0 28 29# An instruction may only access uniforms in the default immediate mode. 30MOV.i32.id r0, u0 31MOV.i32.ts r0, u1 32 33# An instruction may access no more than a single special immediate (e.g. lane_id). 34IADD.u32 r0, lane_id, core_id 35IADD.u32.id r0, lane_id, core_id 36IADD.u32.ts r0, tls_ptr, wls_ptr 37IADD.u32.ts r0, tls_ptr, tls_ptr_hi 38IADD.u32.id r0, tls_ptr, tls_ptr_hi 39IADD.u32.id r0, tls_ptr, 0x40490FDB 40