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1/*!
2 * \copy
3 *     Copyright (c)  2013, Cisco Systems
4 *     All rights reserved.
5 *
6 *     Redistribution and use in source and binary forms, with or without
7 *     modification, are permitted provided that the following conditions
8 *     are met:
9 *
10 *        * Redistributions of source code must retain the above copyright
11 *          notice, this list of conditions and the following disclaimer.
12 *
13 *        * Redistributions in binary form must reproduce the above copyright
14 *          notice, this list of conditions and the following disclaimer in
15 *          the documentation and/or other materials provided with the
16 *          distribution.
17 *
18 *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 *     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 *     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21 *     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22 *     COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23 *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24 *     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26 *     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 *     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
28 *     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 *     POSSIBILITY OF SUCH DAMAGE.
30 *
31 */
32
33#ifdef HAVE_NEON
34#include "arm_arch_common_macro.S"
35
36.macro LOAD_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
37//  {   //  input: \arg0~\arg3, src*, src_stride
38    vld1.64 {\arg0}, [\arg4,:128], \arg5
39    vld1.64 {\arg1}, [\arg4,:128], \arg5
40    vld1.64 {\arg2}, [\arg4,:128], \arg5
41    vld1.64 {\arg3}, [\arg4,:128], \arg5
42//  }
43.endm
44
45.macro STORE_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
46//  {   //  input: \arg0~\arg3, dst*, dst_stride
47    vst1.64 {\arg0}, [\arg4,:128], \arg5
48    vst1.64 {\arg1}, [\arg4,:128], \arg5
49    vst1.64 {\arg2}, [\arg4,:128], \arg5
50    vst1.64 {\arg3}, [\arg4,:128], \arg5
51//  }
52.endm
53
54.macro LOAD_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
55//  {   //  input: \arg0~\arg3, src*, src_stride
56    vld1.64 {\arg0}, [\arg4], \arg5
57    vld1.64 {\arg1}, [\arg4], \arg5
58    vld1.64 {\arg2}, [\arg4], \arg5
59    vld1.64 {\arg3}, [\arg4], \arg5
60//  }
61.endm
62
63.macro STORE_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
64//  {   //  input: \arg0~\arg3, dst*, dst_stride
65    vst1.64 {\arg0}, [\arg4], \arg5
66    vst1.64 {\arg1}, [\arg4], \arg5
67    vst1.64 {\arg2}, [\arg4], \arg5
68    vst1.64 {\arg3}, [\arg4], \arg5
69//  }
70.endm
71
72
73WELS_ASM_FUNC_BEGIN WelsCopy8x8_neon
74
75    LOAD_UNALIGNED_DATA_WITH_STRIDE d0, d1, d2, d3, r2, r3
76
77    STORE_UNALIGNED_DATA_WITH_STRIDE    d0, d1, d2, d3, r0, r1
78
79    LOAD_UNALIGNED_DATA_WITH_STRIDE d4, d5, d6, d7, r2, r3
80
81    STORE_UNALIGNED_DATA_WITH_STRIDE    d4, d5, d6, d7, r0, r1
82
83WELS_ASM_FUNC_END
84
85
86WELS_ASM_FUNC_BEGIN WelsCopy16x16_neon
87
88    LOAD_ALIGNED_DATA_WITH_STRIDE   q0, q1, q2, q3, r2, r3
89
90    STORE_ALIGNED_DATA_WITH_STRIDE  q0, q1, q2, q3, r0, r1
91
92    LOAD_ALIGNED_DATA_WITH_STRIDE   q8, q9, q10, q11, r2, r3
93
94    STORE_ALIGNED_DATA_WITH_STRIDE  q8, q9, q10, q11, r0, r1
95
96    LOAD_ALIGNED_DATA_WITH_STRIDE   q0, q1, q2, q3, r2, r3
97
98    STORE_ALIGNED_DATA_WITH_STRIDE  q0, q1, q2, q3, r0, r1
99
100    LOAD_ALIGNED_DATA_WITH_STRIDE   q8, q9, q10, q11, r2, r3
101
102    STORE_ALIGNED_DATA_WITH_STRIDE  q8, q9, q10, q11, r0, r1
103
104WELS_ASM_FUNC_END
105
106
107WELS_ASM_FUNC_BEGIN WelsCopy16x16NotAligned_neon
108
109    LOAD_UNALIGNED_DATA_WITH_STRIDE q0, q1, q2, q3, r2, r3
110
111    STORE_UNALIGNED_DATA_WITH_STRIDE    q0, q1, q2, q3, r0, r1
112
113    LOAD_UNALIGNED_DATA_WITH_STRIDE q8, q9, q10, q11, r2, r3
114
115    STORE_UNALIGNED_DATA_WITH_STRIDE    q8, q9, q10, q11, r0, r1
116
117    LOAD_UNALIGNED_DATA_WITH_STRIDE q0, q1, q2, q3, r2, r3
118
119    STORE_UNALIGNED_DATA_WITH_STRIDE    q0, q1, q2, q3, r0, r1
120
121    LOAD_UNALIGNED_DATA_WITH_STRIDE q8, q9, q10, q11, r2, r3
122
123    STORE_UNALIGNED_DATA_WITH_STRIDE    q8, q9, q10, q11, r0, r1
124
125WELS_ASM_FUNC_END
126
127
128WELS_ASM_FUNC_BEGIN WelsCopy16x8NotAligned_neon
129
130    LOAD_UNALIGNED_DATA_WITH_STRIDE q0, q1, q2, q3, r2, r3
131
132    STORE_UNALIGNED_DATA_WITH_STRIDE    q0, q1, q2, q3, r0, r1
133
134    LOAD_UNALIGNED_DATA_WITH_STRIDE q8, q9, q10, q11, r2, r3
135
136    STORE_UNALIGNED_DATA_WITH_STRIDE    q8, q9, q10, q11, r0, r1
137
138WELS_ASM_FUNC_END
139
140
141WELS_ASM_FUNC_BEGIN WelsCopy8x16_neon
142
143    LOAD_UNALIGNED_DATA_WITH_STRIDE d0, d1, d2, d3, r2, r3
144
145    STORE_UNALIGNED_DATA_WITH_STRIDE    d0, d1, d2, d3, r0, r1
146
147    LOAD_UNALIGNED_DATA_WITH_STRIDE d4, d5, d6, d7, r2, r3
148
149    STORE_UNALIGNED_DATA_WITH_STRIDE    d4, d5, d6, d7, r0, r1
150
151    LOAD_UNALIGNED_DATA_WITH_STRIDE d0, d1, d2, d3, r2, r3
152
153    STORE_UNALIGNED_DATA_WITH_STRIDE    d0, d1, d2, d3, r0, r1
154
155    LOAD_UNALIGNED_DATA_WITH_STRIDE d4, d5, d6, d7, r2, r3
156
157    STORE_UNALIGNED_DATA_WITH_STRIDE    d4, d5, d6, d7, r0, r1
158
159WELS_ASM_FUNC_END
160
161#endif
162