1 /*! 2 * \copy 3 * Copyright (c) 2013, Cisco Systems 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 21 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 22 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 26 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 //mb_cache.h 34 #ifndef WELS_MACROBLOCK_CACHE_H__ 35 #define WELS_MACROBLOCK_CACHE_H__ 36 37 #include "typedefs.h" 38 #include "wels_const.h" 39 #include "macros.h" 40 41 namespace WelsEnc { 42 43 /* 44 * MB Cache information, such one cache should be defined within a slice 45 */ 46 /* 47 * Cache for Luma Cache for Chroma(Cb, Cr) 48 * 49 * TL T T T T TL T T 50 * L - - - - L - - 51 * L - - - - L - - TR 52 * L - - - - 53 * L - - - - TR 54 * 55 */ 56 57 ////////////////////////mapping scan index//////////////////////// 58 59 extern const uint8_t g_kuiSmb4AddrIn256[16]; 60 extern const uint8_t g_kuiCache12_8x8RefIdx[4]; 61 62 typedef struct TagDCTCoeff { 63 //ALIGNED_DECLARE( int16_t, residual_ac[16], 16 ); //I_16x16 64 int16_t iLumaBlock[16][16]; //based on block4x4 luma DC/AC 65 //ALIGNED_DECLARE( int16_t, iLumaI16x16Dc[16], 16 ); //I_16x16 DC 66 int16_t iLumaI16x16Dc[16]; 67 //ALIGNED_DECLARE( int16_t, iChromaDc[2][4], 16 ); //chroma DC 68 int16_t iChromaBlock[8][16]; //based on block4x4 chroma DC/AC 69 int16_t iChromaDc[2][4]; 70 } SDCTCoeff ; 71 72 typedef struct TagMbCache { 73 //the followed pData now is promised aligned to 16 bytes 74 ALIGNED_DECLARE (SMVComponentUnit, sMvComponents, 16); 75 76 ALIGNED_DECLARE (int8_t, iNonZeroCoeffCount[48], 16); // Cache line size 77 // int8_t iNonZeroCoeffCount[6 * 8]; // Right luma, Chroma(Left Top Cb, Left btm Cr); must follow by iIntraPredMode! 78 ALIGNED_DECLARE (int8_t, iIntraPredMode[48], 16); 79 // must follow with iNonZeroCoeffCount! 80 81 int32_t iSadCost[4]; //avail 1; unavail 0 82 SMVUnitXY sMbMvp[MB_BLOCK4x4_NUM];// for write bs 83 84 //for residual decoding (recovery) at the side of Encoder 85 int16_t* pCoeffLevel; // tmep 86 //malloc memory for prediction 87 uint8_t* pSkipMb; 88 89 //ALIGNED_DECLARE(uint8_t, pMemPredMb[2][256], 16);//One: Best I_16x16 Luma and refine frac_pixel pBuffer; another: PingPong I_8x8&&Inter Cb + Cr 90 uint8_t* pMemPredMb; 91 uint8_t* pMemPredLuma;// inter && intra share same pointer; 92 //ALIGNED_DECLARE(uint8_t, pMemPredChroma[2][64*2], 16); //another PingPong pBuffer: Best Cb + Cr; 93 uint8_t* pMemPredChroma;// inter && intra share same pointer; 94 uint8_t* pBestPredIntraChroma; //Cb:0~63; Cr:64~127 95 96 //ALIGNED_DECLARE(uint8_t, pMemPredBlk4[2][16], 16); //I_4x4 97 uint8_t* pMemPredBlk4; 98 99 uint8_t* pBestPredI4x4Blk4;//I_4x4 100 101 //ALIGNED_DECLARE(uint8_t, pBufferInterPredMe[4][400], 16);//inter type pBuffer for ME h & v & hv 102 uint8_t* pBufferInterPredMe; // [4][400] is enough because only h&v or v&hv or h&hv. but if both h&v&hv is needed when 8 quart pixel, future we have to use [5][400]. 103 104 //no scan4[] order, just as memory order to store 105 //ALIGNED_DECLARE(bool, pPrevIntra4x4PredModeFlag[16], 16);//if 1, means no rem_intra4x4_pred_mode; if 0, means rem_intra4x4_pred_mode != 0 106 bool* pPrevIntra4x4PredModeFlag; 107 //ALIGNED_DECLARE(int8_t, pRemIntra4x4PredModeFlag[16], 16);//-1 as default; if pPrevIntra4x4PredModeFlag==0, 108 //pRemIntra4x4PredModeFlag or added by 1 is the best pred_mode 109 int8_t* pRemIntra4x4PredModeFlag; 110 111 int32_t iSadCostSkip[4]; //avail 1; unavail 0 112 bool bMbTypeSkip[4]; //1: skip; 0: non-skip 113 int32_t* pEncSad; 114 115 //for residual encoding at the side of Encoder 116 SDCTCoeff* pDct; 117 118 uint8_t uiNeighborIntra; // LEFT_MB_POS:0x01, TOP_MB_POS:0x02, TOPLEFT_MB_POS = 0x04 ,TOPRIGHT_MB_POS = 0x08; 119 uint8_t uiLumaI16x16Mode; 120 uint8_t uiChmaI8x8Mode; 121 122 bool bCollocatedPredFlag;//denote if current MB is collocated predicted (MV==0). 123 uint32_t uiRefMbType; 124 125 struct { 126 /* pointer of current mb location in original frame */ 127 uint8_t* pEncMb[3]; 128 /* pointer of current mb location in recovery frame */ 129 uint8_t* pDecMb[3]; 130 /* pointer of co-located mb location in reference frame */ 131 uint8_t* pRefMb[3]; 132 //for SVC 133 uint8_t* pCsMb[3];//locating current mb's CS in whole frame 134 // int16_t *p_rs[3];//locating current mb's RS in whole frame 135 136 } SPicData; 137 } SMbCache; 138 139 }//end of namespace 140 141 #endif//WELS_MACROBLOCK_CACHE_H__ 142