1 // Copyright 2016 The SwiftShader Authors. All Rights Reserved.
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "CPUID.hpp"
16
17 #if defined(_WIN32)
18 # ifndef WIN32_LEAN_AND_MEAN
19 # define WIN32_LEAN_AND_MEAN
20 # endif
21 # include <windows.h>
22 # include <intrin.h>
23 # include <float.h>
24 #else
25 # include <unistd.h>
26 # include <sched.h>
27 # include <sys/types.h>
28 #endif
29
30 namespace sw {
31
cpuid(int registers[4],int info)32 static void cpuid(int registers[4], int info)
33 {
34 #if defined(__i386__) || defined(__x86_64__)
35 # if defined(_WIN32)
36 __cpuid(registers, info);
37 # else
38 __asm volatile("cpuid"
39 : "=a"(registers[0]), "=b"(registers[1]), "=c"(registers[2]), "=d"(registers[3])
40 : "a"(info));
41 # endif
42 #else
43 registers[0] = 0;
44 registers[1] = 0;
45 registers[2] = 0;
46 registers[3] = 0;
47 #endif
48 }
49
supportsMMX()50 bool CPUID::supportsMMX()
51 {
52 int registers[4];
53 cpuid(registers, 1);
54 return (registers[3] & 0x00800000) != 0;
55 }
56
supportsCMOV()57 bool CPUID::supportsCMOV()
58 {
59 int registers[4];
60 cpuid(registers, 1);
61 return (registers[3] & 0x00008000) != 0;
62 }
63
supportsSSE()64 bool CPUID::supportsSSE()
65 {
66 int registers[4];
67 cpuid(registers, 1);
68 return (registers[3] & 0x02000000) != 0;
69 }
70
supportsSSE2()71 bool CPUID::supportsSSE2()
72 {
73 int registers[4];
74 cpuid(registers, 1);
75 return (registers[3] & 0x04000000) != 0;
76 }
77
supportsSSE3()78 bool CPUID::supportsSSE3()
79 {
80 int registers[4];
81 cpuid(registers, 1);
82 return (registers[2] & 0x00000001) != 0;
83 }
84
supportsSSSE3()85 bool CPUID::supportsSSSE3()
86 {
87 int registers[4];
88 cpuid(registers, 1);
89 return (registers[2] & 0x00000200) != 0;
90 }
91
supportsSSE4_1()92 bool CPUID::supportsSSE4_1()
93 {
94 int registers[4];
95 cpuid(registers, 1);
96 return (registers[2] & 0x00080000) != 0;
97 }
98
coreCount()99 int CPUID::coreCount()
100 {
101 int cores = 0;
102
103 #if defined(_WIN32)
104 DWORD_PTR processAffinityMask = 1;
105 DWORD_PTR systemAffinityMask = 1;
106
107 GetProcessAffinityMask(GetCurrentProcess(), &processAffinityMask, &systemAffinityMask);
108
109 while(systemAffinityMask)
110 {
111 if(systemAffinityMask & 1)
112 {
113 cores++;
114 }
115
116 systemAffinityMask >>= 1;
117 }
118 #else
119 cores = sysconf(_SC_NPROCESSORS_ONLN);
120 #endif
121
122 if(cores < 1) cores = 1;
123 if(cores > 16) cores = 16;
124
125 return cores; // FIXME: Number of physical cores
126 }
127
processAffinity()128 int CPUID::processAffinity()
129 {
130 int cores = 0;
131
132 #if defined(_WIN32)
133 DWORD_PTR processAffinityMask = 1;
134 DWORD_PTR systemAffinityMask = 1;
135
136 GetProcessAffinityMask(GetCurrentProcess(), &processAffinityMask, &systemAffinityMask);
137
138 while(processAffinityMask)
139 {
140 if(processAffinityMask & 1)
141 {
142 cores++;
143 }
144
145 processAffinityMask >>= 1;
146 }
147 #else
148 return coreCount(); // FIXME: Assumes no affinity limitation
149 #endif
150
151 if(cores < 1) cores = 1;
152 if(cores > 16) cores = 16;
153
154 return cores;
155 }
156
setFlushToZero(bool enable)157 void CPUID::setFlushToZero(bool enable)
158 {
159 #if defined(_MSC_VER)
160 _controlfp(enable ? _DN_FLUSH : _DN_SAVE, _MCW_DN);
161 #else
162 // Unimplemented
163 #endif
164 }
165
setDenormalsAreZero(bool enable)166 void CPUID::setDenormalsAreZero(bool enable)
167 {
168 // Unimplemented
169 }
170
171 } // namespace sw
172