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/kernel/linux/linux-5.10/Documentation/hwmon/
Ducd9000.rst11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd90120.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd90124.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd90160.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd90320.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9090.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd90910.pdf
22 Author: Guenter Roeck <linux@roeck-us.net>
26 -----------
31 sequences up to 12 independent voltage rails. The device integrates a 12-bit
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Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
36 Pins AIN3 is the common negative differential input
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/kernel/linux/linux-5.10/sound/soc/stm/
Dstm32_sai.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
40 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
41 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
49 clk_disable_unprepare(sai->pclk); in stm32_sai_pclk_disable()
59 ret = clk_prepare_enable(sai->pclk); in stm32_sai_pclk_enable()
61 dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret); in stm32_sai_pclk_enable()
73 ret = stm32_sai_pclk_enable(&sai->pdev->dev); in stm32_sai_sync_conf_client()
77 writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base); in stm32_sai_sync_conf_client()
79 stm32_sai_pclk_disable(&sai->pdev->dev); in stm32_sai_sync_conf_client()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Drenesas,rst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Renesas R-Car and RZ/G Reset Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the
16 - Latching of the levels on mode pins when PRESET# is negated,
17 - Mode monitoring register,
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/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-falcon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-falcon.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
22 #include "pinctrl-lantiq.h"
47 #define PINS 32 macro
48 #define PORT(x) (x / PINS)
49 #define PORT_PIN(x) (x % PINS)
67 .pins = p, \
90 static struct pinctrl_pin_desc falcon_pads[PORTS * PINS];
95 int base = bank * PINS; in lantiq_load_pin_desc()
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Dpinctrl-u300.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2009-2011 ST-Ericsson AB
11 * pins, so we enumerate the pads we can mux rather than actual pins. The pads
12 * are connected to different pins in different packaging types, so it would
25 #include <linux/pinctrl/pinconf-generic.h>
26 #include "pinctrl-coh901.h"
170 #define DRIVER_NAME "pinctrl-u300"
191 PINCTRL_PIN(2, "PO SIM RST N"),
237 PINCTRL_PIN(48, "PI POW RST N"),
277 PINCTRL_PIN(88, "PO RESOUT2 RST N"),
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dste-hrefv60plus.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include "ste-href-ab8500.dtsi"
7 #include "ste-href.dtsi"
10 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
11 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
16 /* GPIOs 0 - 31 */
17 gpio-line-names =
38 /* GPIOs 32 - 63 */
39 gpio-line-names =
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Drk3188-bqedison2qc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/input/input.h>
13 model = "BQ Edison2 Quad-Core";
14 compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
22 compatible = "pwm-backlight";
23 power-supply = <&vsys>;
27 gpio-keys {
28 compatible = "gpio-keys";
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Dimx7ulp-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 /dts-v1/;
14 compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp";
17 stdout-path = &lpuart4;
26 compatible = "pwm-backlight";
28 brightness-levels = <0 20 25 30 35 40 100>;
29 default-brightness-level = <6>;
33 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
34 compatible = "regulator-fixed";
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Drk3066a-rayeager.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
19 ir: ir-receiver {
20 compatible = "gpio-ir-receiver";
22 pinctrl-names = "default";
23 pinctrl-0 = <&ir_int>;
26 keys: gpio-keys {
27 compatible = "gpio-keys";
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Domap3-cm-t3517.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Support for CompuLab CM-T3517
5 /dts-v1/;
8 #include "omap3-cm-t3x.dtsi"
11 model = "CompuLab CM-T3517";
12 compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
14 vmmc: regulator-vmmc {
15 compatible = "regulator-fixed";
16 regulator-name = "vmmc";
17 regulator-min-microvolt = <3300000>;
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Dimx6ul-imx6ull-opos6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 reg = <0x80000000 0>; /* will be filled by U-Boot */
11 reg_3v3: regulator-3v3 {
12 compatible = "regulator-fixed";
13 regulator-name = "3V3";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
18 usdhc3_pwrseq: usdhc3-pwrseq {
19 compatible = "mmc-pwrseq-simple";
20 reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
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Drk3288-firefly.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/input/input.h>
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 1>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-recovery {
24 press-threshold-microvolt = <0>;
28 dovdd_1v8: dovdd-1v8-regulator {
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Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
28 /* Analogue Audio (On-module) */
29 clk1-out-pw4 {
30 nvidia,pins = "clk1_out_pw4";
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Darmada-388-clearfog.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "armada-388.dtsi"
9 #include "armada-38x-solidrun-microsom.dtsi"
13 /* So that mvebu u-boot can update the MAC addresses */
20 stdout-path = "serial0:115200n8";
23 reg_3p3v: regulator-3p3v {
24 compatible = "regulator-fixed";
25 regulator-name = "3P3V";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
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Domap3-sbc-t3517.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Suppport for CompuLab SBC-T3517 with CM-T3517
6 #include "omap3-cm-t3517.dts"
7 #include "omap3-sb-t35.dtsi"
10 model = "CompuLab SBC-T3517 with CM-T3517";
11 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
18 /* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */
19 vddvario: regulator-vddvario-sb-t35 {
20 compatible = "regulator-fixed";
21 regulator-name = "vddvario";
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8916-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 blsp1_uart1_default: blsp1-uart1-default {
10 pins = "gpio0", "gpio1", "gpio2", "gpio3";
13 drive-strength = <16>;
14 bias-disable;
17 blsp1_uart1_sleep: blsp1-uart1-sleep {
18 pins = "gpio0", "gpio1", "gpio2", "gpio3";
21 drive-strength = <2>;
22 bias-pull-down;
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dlantiq,pinctrl-falcon.txt4 - compatible: "lantiq,pinctrl-falcon"
5 - reg: Should contain the physical address and length of the gpio/pinmux
8 Please refer to pinctrl-bindings.txt in this directory for details of the
14 pin, a group, or a list of pins or groups. This configuration can include the
16 pull-up and open-drain
31 Required subnode-properties:
32 - lantiq,groups : An array of strings. Each string contains the name of a group.
34 - lantiq,function: A string containing the name of the function to mux to the
44 rst, ntr, mdio, led, asc, spi, i2c, jtag, slic, pcm
49 Required subnode-properties:
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Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
16 Available mpp pins/groups and functions:
22 name pins functions
37 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
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/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra-xusb.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
20 #include "../pinctrl-utils.h"
55 const struct pinctrl_pin_desc *pins; member
81 struct reset_control *rst; member
96 writel(value, padctl->regs + offset); in padctl_writel()
102 return readl(padctl->regs + offset); in padctl_readl()
109 return padctl->soc->num_pins; in tegra_xusb_padctl_get_groups_count()
117 return padctl->soc->pins[group].name; in tegra_xusb_padctl_get_group_name()
122 const unsigned **pins, in tegra_xusb_padctl_get_group_pins() argument
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/kernel/linux/linux-5.10/include/soc/tegra/
Dpmc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
63 * enum tegra_io_pad - I/O pad group identifier
65 * I/O pins on Tegra SoCs are grouped into so-called I/O pads. Each such pad
67 * the pins of the given pad.
162 struct reset_control *rst);
177 return -ENOSYS; in tegra_powergate_power_on()
182 return -ENOSYS; in tegra_powergate_power_off()
187 return -ENOSYS; in tegra_powergate_remove_clamping()
192 struct reset_control *rst) in tegra_powergate_sequence_power_up() argument
194 return -ENOSYS; in tegra_powergate_sequence_power_up()
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/kernel/linux/linux-5.10/drivers/input/keyboard/
Dtegra-kbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2009-2011, NVIDIA Corporation.
106 struct reset_control *rst; member
156 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); in tegra_kbc_report_keys()
165 keycodes[num_down] = kbc->keycode[scancode]; in tegra_kbc_report_keys()
167 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) in tegra_kbc_report_keys()
178 * Ghosting occurs if there are 3 keys such that - in tegra_kbc_report_keys()
182 if (kbc->use_ghost_filter && num_down >= 3) { in tegra_kbc_report_keys()
190 * and the other is in the same column as the i-th key. in tegra_kbc_report_keys()
210 scancodes[i] += kbc->max_keys; in tegra_kbc_report_keys()
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/kernel/linux/linux-5.10/arch/mips/boot/dts/img/
Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
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/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Ddpaux.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
49 struct reset_control *rst; member
78 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
80 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
88 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
89 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
98 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_write_fifo()
114 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_read_fifo()
135 if (msg->size > 16) in tegra_dpaux_transfer()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3368-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
12 stdout-path = "serial2:115200n8";
21 compatible = "pwm-backlight";
22 brightness-levels = <
55 default-brightness-level = <128>;
56 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
57 pinctrl-names = "default";
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