1 /* 2 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef _SOC_H 17 #define _SOC_H 18 #include "soc_common.h" 19 20 /* 21 * Get the response interrupt number via mcause. 22 * id = mcause & MCAUSE_INT_ID_MASK 23 */ 24 #define MCAUSE_INT_ID_MASK 0x7FFFFFF 25 #define MSIP 0x2000000 26 #define MTIMERCMP 0x2004000 27 #define MTIMER 0x200BFF8 28 #define CLOCK_CONTRAL_REG 0x10008000 29 30 /* interrupt base addr : 0xc000000 + 4 * interrupt ID 31 * [2:0] priority 32 * [31:3] reserved 33 */ 34 #define PLIC_PRIO_BASE 0xC000000 35 #define PLIC_PEND_BASE 0xC001000 /* interrupt 0-31 */ 36 #define PLIC_PEND_REG2 0xC001004 /* interrupt 32-52 */. 37 #define PLIC_ENABLE_BASE 0xC002000 /* interrupt 0-31 */ 38 #define PLIC_ENABLE_REG2 0xC002004 /* interrupt 32-52 */ 39 #define PLIC_REG_BASE 0xC200000 40 41 #define UART0_BASE 0x10000000 42 43 #define UART0_CLK_FREQ 0x32000000 44 #define UART0_BAUDRAT 115200 45 46 #define RISCV_SYS_MAX_IRQ 11 47 #define RISCV_WDOGCMP_IRQ (RISCV_SYS_MAX_IRQ + 1) 48 #define RISCV_RTCCMP_IRQ (RISCV_SYS_MAX_IRQ + 2) 49 #define RISCV_UART0_IRQ (RISCV_SYS_MAX_IRQ + 3) 50 51 #define RISCV_PLIC_VECTOR_CNT 53 52 53 #endif 54