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1 /*
2  * This header was generated from the Linux kernel headers by update_headers.py,
3  * to provide necessary information from kernel to userspace, such as constants,
4  * structures, and macros, and thus, contains no copyrightable information.
5  */
6 #ifndef __NDCTL_H__
7 #define __NDCTL_H__
8 #include <linux/types.h>
9 struct nd_cmd_dimm_flags {
10 	__u32 status;
11 	__u32 flags;
12 } __packed;
13 struct nd_cmd_get_config_size {
14 	__u32 status;
15 	__u32 config_size;
16 	__u32 max_xfer;
17 } __packed;
18 struct nd_cmd_get_config_data_hdr {
19 	__u32 in_offset;
20 	__u32 in_length;
21 	__u32 status;
22 	__u8 out_buf[0];
23 } __packed;
24 struct nd_cmd_set_config_hdr {
25 	__u32 in_offset;
26 	__u32 in_length;
27 	__u8 in_buf[0];
28 } __packed;
29 struct nd_cmd_vendor_hdr {
30 	__u32 opcode;
31 	__u32 in_length;
32 	__u8 in_buf[0];
33 } __packed;
34 struct nd_cmd_vendor_tail {
35 	__u32 status;
36 	__u32 out_length;
37 	__u8 out_buf[0];
38 } __packed;
39 struct nd_cmd_ars_cap {
40 	__u64 address;
41 	__u64 length;
42 	__u32 status;
43 	__u32 max_ars_out;
44 	__u32 clear_err_unit;
45 	__u16 flags;
46 	__u16 reserved;
47 } __packed;
48 struct nd_cmd_ars_start {
49 	__u64 address;
50 	__u64 length;
51 	__u16 type;
52 	__u8 flags;
53 	__u8 reserved[5];
54 	__u32 status;
55 	__u32 scrub_time;
56 } __packed;
57 struct nd_cmd_ars_status {
58 	__u32 status;
59 	__u32 out_length;
60 	__u64 address;
61 	__u64 length;
62 	__u64 restart_address;
63 	__u64 restart_length;
64 	__u16 type;
65 	__u16 flags;
66 	__u32 num_records;
67 	struct nd_ars_record {
68 		__u32 handle;
69 		__u32 reserved;
70 		__u64 err_address;
71 		__u64 length;
72 	} __packed records[0];
73 } __packed;
74 struct nd_cmd_clear_error {
75 	__u64 address;
76 	__u64 length;
77 	__u32 status;
78 	__u8 reserved[4];
79 	__u64 cleared;
80 } __packed;
81 enum {
82 	ND_CMD_IMPLEMENTED = 0,
83 
84 	ND_CMD_ARS_CAP = 1,
85 	ND_CMD_ARS_START = 2,
86 	ND_CMD_ARS_STATUS = 3,
87 	ND_CMD_CLEAR_ERROR = 4,
88 
89 	ND_CMD_SMART = 1,
90 	ND_CMD_SMART_THRESHOLD = 2,
91 	ND_CMD_DIMM_FLAGS = 3,
92 	ND_CMD_GET_CONFIG_SIZE = 4,
93 	ND_CMD_GET_CONFIG_DATA = 5,
94 	ND_CMD_SET_CONFIG_DATA = 6,
95 	ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
96 	ND_CMD_VENDOR_EFFECT_LOG = 8,
97 	ND_CMD_VENDOR = 9,
98 	ND_CMD_CALL = 10,
99 };
100 enum {
101 	ND_ARS_VOLATILE = 1,
102 	ND_ARS_PERSISTENT = 2,
103 	ND_ARS_RETURN_PREV_DATA = 1 << 1,
104 	ND_CONFIG_LOCKED = 1,
105 };
nvdimm_bus_cmd_name(unsigned cmd)106 static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
107 {
108 	switch (cmd) {
109 	case ND_CMD_ARS_CAP:		return "ars_cap";
110 	case ND_CMD_ARS_START:		return "ars_start";
111 	case ND_CMD_ARS_STATUS:		return "ars_status";
112 	case ND_CMD_CLEAR_ERROR:	return "clear_error";
113 	case ND_CMD_CALL:		return "cmd_call";
114 	default:			return "unknown";
115 	}
116 }
nvdimm_cmd_name(unsigned cmd)117 static inline const char *nvdimm_cmd_name(unsigned cmd)
118 {
119 	switch (cmd) {
120 	case ND_CMD_SMART:			return "smart";
121 	case ND_CMD_SMART_THRESHOLD:		return "smart_thresh";
122 	case ND_CMD_DIMM_FLAGS:			return "flags";
123 	case ND_CMD_GET_CONFIG_SIZE:		return "get_size";
124 	case ND_CMD_GET_CONFIG_DATA:		return "get_data";
125 	case ND_CMD_SET_CONFIG_DATA:		return "set_data";
126 	case ND_CMD_VENDOR_EFFECT_LOG_SIZE:	return "effect_size";
127 	case ND_CMD_VENDOR_EFFECT_LOG:		return "effect_log";
128 	case ND_CMD_VENDOR:			return "vendor";
129 	case ND_CMD_CALL:			return "cmd_call";
130 	default:				return "unknown";
131 	}
132 }
133 #define ND_IOCTL 'N'
134 #define ND_IOCTL_DIMM_FLAGS		_IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
135 					struct nd_cmd_dimm_flags)
136 #define ND_IOCTL_GET_CONFIG_SIZE	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
137 					struct nd_cmd_get_config_size)
138 #define ND_IOCTL_GET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
139 					struct nd_cmd_get_config_data_hdr)
140 #define ND_IOCTL_SET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
141 					struct nd_cmd_set_config_hdr)
142 #define ND_IOCTL_VENDOR			_IOWR(ND_IOCTL, ND_CMD_VENDOR,\
143 					struct nd_cmd_vendor_hdr)
144 #define ND_IOCTL_ARS_CAP		_IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
145 					struct nd_cmd_ars_cap)
146 #define ND_IOCTL_ARS_START		_IOWR(ND_IOCTL, ND_CMD_ARS_START,\
147 					struct nd_cmd_ars_start)
148 #define ND_IOCTL_ARS_STATUS		_IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
149 					struct nd_cmd_ars_status)
150 #define ND_IOCTL_CLEAR_ERROR		_IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
151 					struct nd_cmd_clear_error)
152 #define ND_DEVICE_DIMM 1
153 #define ND_DEVICE_REGION_PMEM 2
154 #define ND_DEVICE_REGION_BLK 3
155 #define ND_DEVICE_NAMESPACE_IO 4
156 #define ND_DEVICE_NAMESPACE_PMEM 5
157 #define ND_DEVICE_NAMESPACE_BLK 6
158 #define ND_DEVICE_DAX_PMEM 7
159 enum nd_driver_flags {
160 	ND_DRIVER_DIMM            = 1 << ND_DEVICE_DIMM,
161 	ND_DRIVER_REGION_PMEM     = 1 << ND_DEVICE_REGION_PMEM,
162 	ND_DRIVER_REGION_BLK      = 1 << ND_DEVICE_REGION_BLK,
163 	ND_DRIVER_NAMESPACE_IO    = 1 << ND_DEVICE_NAMESPACE_IO,
164 	ND_DRIVER_NAMESPACE_PMEM  = 1 << ND_DEVICE_NAMESPACE_PMEM,
165 	ND_DRIVER_NAMESPACE_BLK   = 1 << ND_DEVICE_NAMESPACE_BLK,
166 	ND_DRIVER_DAX_PMEM	  = 1 << ND_DEVICE_DAX_PMEM,
167 };
168 enum {
169 	ND_MIN_NAMESPACE_SIZE = PAGE_SIZE,
170 };
171 enum ars_masks {
172 	ARS_STATUS_MASK = 0x0000FFFF,
173 	ARS_EXT_STATUS_SHIFT = 16,
174 };
175 struct nd_cmd_pkg {
176 	__u64   nd_family;
177 	__u64   nd_command;
178 	__u32   nd_size_in;
179 	__u32   nd_size_out;
180 	__u32   nd_reserved2[9];
181 	__u32   nd_fw_size;
182 	unsigned char nd_payload[];
183 };
184 #define NVDIMM_FAMILY_INTEL 0
185 #define NVDIMM_FAMILY_HPE1 1
186 #define NVDIMM_FAMILY_HPE2 2
187 #define NVDIMM_FAMILY_MSFT 3
188 #define NVDIMM_FAMILY_HYPERV 4
189 #define ND_IOCTL_CALL			_IOWR(ND_IOCTL, ND_CMD_CALL,\
190 					struct nd_cmd_pkg)
191 #endif
192