1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "los_interrupt.h"
33 #include "securec.h"
34 #include <stdarg.h>
35 #include "los_arch_interrupt.h"
36 #include "los_context.h"
37 #include "los_debug.h"
38 #include "los_hook.h"
39 #include "los_task.h"
40 #include "los_sched.h"
41 #include "los_memory.h"
42 #include "los_membox.h"
43 #if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
44 #include "los_cpup.h"
45 #endif
46
47 UINT32 g_intCount = 0;
48
49 #ifdef __ICCARM__
50 #pragma location = ".data.vector"
51 #pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
52 #elif defined(__CC_ARM) || defined(__GNUC__)
53 LITE_OS_SEC_VEC
54 #endif
55 /* *
56 * @ingroup los_hwi
57 * Hardware interrupt form mapping handling function array.
58 */
59 STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
60
61 #if (LOSCFG_DEBUG_TOOLS == 1)
62 STATIC UINT32 g_hwiFormCnt[OS_HWI_MAX_NUM] = {0};
63 STATIC CHAR *g_hwiFormName[OS_HWI_MAX_NUM] = {0};
64
OsGetHwiFormCnt(UINT32 index)65 UINT32 OsGetHwiFormCnt(UINT32 index)
66 {
67 return g_hwiFormCnt[index];
68 }
69
OsGetHwiFormName(UINT32 index)70 CHAR *OsGetHwiFormName(UINT32 index)
71 {
72 return g_hwiFormName[index];
73 }
74
OsGetHwiCreated(UINT32 index)75 BOOL OsGetHwiCreated(UINT32 index)
76 {
77 if (g_hwiForm[index] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
78 return TRUE;
79 }
80
81 return FALSE;
82 }
83 #endif
84
85 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
86
87 typedef struct {
88 HWI_PROC_FUNC pfnHandler;
89 VOID *pParm;
90 } HWI_HANDLER_FUNC;
91
92 /* *
93 * @ingroup los_hwi
94 * Hardware interrupt handler form mapping handling function array.
95 */
96 STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
97
98 /* *
99 * @ingroup los_hwi
100 * Set interrupt vector table.
101 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector,VOID * arg)102 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
103 {
104 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
105 g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
106 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
107 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
108 }
109 }
110
111 #else
112 /* *
113 * @ingroup los_hwi
114 * hardware interrupt handler form mapping handling function array.
115 */
116 STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
117
118 /* *
119 * @ingroup los_hwi
120 * Set interrupt vector table.
121 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector)122 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
123 {
124 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
125 g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
126 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
127 }
128 }
129 #endif
130
SysTick_Handler(VOID)131 WEAK VOID SysTick_Handler(VOID)
132 {
133 return;
134 }
135
136 /* ****************************************************************************
137 Function : HwiNumGet
138 Description : Get an interrupt number
139 Input : None
140 Output : None
141 Return : Interrupt Indexes number
142 **************************************************************************** */
HwiNumGet(VOID)143 STATIC UINT32 HwiNumGet(VOID)
144 {
145 return __get_IPSR();
146 }
147
HwiUnmask(HWI_HANDLE_T hwiNum)148 STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
149 {
150 if (hwiNum >= OS_HWI_MAX_NUM) {
151 return OS_ERRNO_HWI_NUM_INVALID;
152 }
153
154 NVIC_EnableIRQ((IRQn_Type)hwiNum);
155
156 return LOS_OK;
157 }
158
HwiMask(HWI_HANDLE_T hwiNum)159 STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
160 {
161 if (hwiNum >= OS_HWI_MAX_NUM) {
162 return OS_ERRNO_HWI_NUM_INVALID;
163 }
164
165 NVIC_DisableIRQ((IRQn_Type)hwiNum);
166
167 return LOS_OK;
168 }
169
HwiSetPriority(HWI_HANDLE_T hwiNum,UINT8 priority)170 STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
171 {
172 if (hwiNum >= OS_HWI_MAX_NUM) {
173 return OS_ERRNO_HWI_NUM_INVALID;
174 }
175
176 if (priority > OS_HWI_PRIO_LOWEST) {
177 return OS_ERRNO_HWI_PRIO_INVALID;
178 }
179
180 NVIC_SetPriority((IRQn_Type)hwiNum, priority);
181
182 return LOS_OK;
183 }
184
HwiPending(HWI_HANDLE_T hwiNum)185 STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
186 {
187 if (hwiNum >= OS_HWI_MAX_NUM) {
188 return OS_ERRNO_HWI_NUM_INVALID;
189 }
190
191 NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
192
193 return LOS_OK;
194 }
195
HwiClear(HWI_HANDLE_T hwiNum)196 STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
197 {
198 if (hwiNum >= OS_HWI_MAX_NUM) {
199 return OS_ERRNO_HWI_NUM_INVALID;
200 }
201
202 NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
203
204 return LOS_OK;
205 }
206
207 HwiControllerOps g_archHwiOps = {
208 .enableIrq = HwiUnmask,
209 .disableIrq = HwiMask,
210 .setIrqPriority = HwiSetPriority,
211 .getCurIrqNum = HwiNumGet,
212 .triggerIrq = HwiPending,
213 .clearIrq = HwiClear,
214 };
215
ArchIsIntActive(VOID)216 inline UINT32 ArchIsIntActive(VOID)
217 {
218 return (g_intCount > 0);
219 }
220 /* ****************************************************************************
221 Function : HalHwiDefaultHandler
222 Description : default handler of the hardware interrupt
223 Input : None
224 Output : None
225 Return : None
226 **************************************************************************** */
227 /*lint -e529*/
HalHwiDefaultHandler(VOID)228 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
229 {
230 PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
231 while (1) {}
232 }
233
HalPreInterruptHandler(UINT32 arg)234 WEAK VOID HalPreInterruptHandler(UINT32 arg)
235 {
236 (VOID)arg;
237 return;
238 }
239
HalAftInterruptHandler(UINT32 arg)240 WEAK VOID HalAftInterruptHandler(UINT32 arg)
241 {
242 (VOID)arg;
243 return;
244 }
245
246 /* ****************************************************************************
247 Function : HalInterrupt
248 Description : Hardware interrupt entry function
249 Input : None
250 Output : None
251 Return : None
252 **************************************************************************** */
HalInterrupt(VOID)253 LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
254 {
255 UINT32 hwiIndex;
256 UINT32 intSave;
257
258 #if (LOSCFG_KERNEL_RUNSTOP == 1)
259 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
260 #endif
261
262 intSave = LOS_IntLock();
263 g_intCount++;
264 LOS_IntRestore(intSave);
265
266 hwiIndex = HwiNumGet();
267
268 OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
269 #if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
270 OsCpupIrqStart(hwiIndex);
271 #endif
272
273 HalPreInterruptHandler(hwiIndex);
274
275 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
276 if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
277 g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
278 }
279 #else
280 if (g_hwiHandlerForm[hwiIndex] != 0) {
281 g_hwiHandlerForm[hwiIndex]();
282 }
283 #endif
284
285 #if (LOSCFG_DEBUG_TOOLS == 1)
286 ++g_hwiFormCnt[hwiIndex];
287 #endif
288
289 HalAftInterruptHandler(hwiIndex);
290
291 #if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
292 OsCpupIrqEnd(hwiIndex);
293 #endif
294
295 OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
296
297 intSave = LOS_IntLock();
298 g_intCount--;
299 LOS_IntRestore(intSave);
300 }
301
302 /* ****************************************************************************
303 Function : ArchHwiCreate
304 Description : create hardware interrupt
305 Input : hwiNum --- hwi num to create
306 hwiPrio --- priority of the hwi
307 hwiMode --- unused
308 hwiHandler --- hwi handler
309 irqParam --- param of the hwi handler
310 Output : None
311 Return : LOS_OK on success or error code on failure
312 **************************************************************************** */
ArchHwiCreate(HWI_HANDLE_T hwiNum,HWI_PRIOR_T hwiPrio,HWI_MODE_T hwiMode,HWI_PROC_FUNC hwiHandler,HwiIrqParam * irqParam)313 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
314 HWI_PRIOR_T hwiPrio,
315 HWI_MODE_T hwiMode,
316 HWI_PROC_FUNC hwiHandler,
317 HwiIrqParam *irqParam)
318 {
319 (VOID)hwiMode;
320 UINT32 intSave;
321
322 if (hwiHandler == NULL) {
323 return OS_ERRNO_HWI_PROC_FUNC_NULL;
324 }
325
326 if (hwiNum >= OS_HWI_MAX_NUM) {
327 return OS_ERRNO_HWI_NUM_INVALID;
328 }
329
330 if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
331 return OS_ERRNO_HWI_ALREADY_CREATED;
332 }
333
334 if (hwiPrio > OS_HWI_PRIO_LOWEST) {
335 return OS_ERRNO_HWI_PRIO_INVALID;
336 }
337
338 intSave = LOS_IntLock();
339 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
340 if (irqParam != NULL) {
341 OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
342 } else {
343 OsSetVector(hwiNum, hwiHandler, NULL);
344 }
345 #else
346 (VOID)irqParam;
347 OsSetVector(hwiNum, hwiHandler);
348 #endif
349
350 #if (LOSCFG_DEBUG_TOOLS == 1)
351 if ((irqParam != NULL) && (irqParam->pName != NULL)) {
352 g_hwiFormName[hwiNum + OS_SYS_VECTOR_CNT] = (CHAR *)irqParam->pName;
353 }
354 g_hwiFormCnt[hwiNum + OS_SYS_VECTOR_CNT] = 0;
355 #endif
356
357 HwiUnmask((IRQn_Type)hwiNum);
358 HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
359
360 LOS_IntRestore(intSave);
361
362 return LOS_OK;
363 }
364
365 /* ****************************************************************************
366 Function : ArchHwiDelete
367 Description : Delete hardware interrupt
368 Input : hwiNum --- hwi num to delete
369 irqParam --- param of the hwi handler
370 Output : None
371 Return : LOS_OK on success or error code on failure
372 **************************************************************************** */
ArchHwiDelete(HWI_HANDLE_T hwiNum,HwiIrqParam * irqParam)373 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
374 {
375 (VOID)irqParam;
376 UINT32 intSave;
377
378 if (hwiNum >= OS_HWI_MAX_NUM) {
379 return OS_ERRNO_HWI_NUM_INVALID;
380 }
381
382 NVIC_DisableIRQ((IRQn_Type)hwiNum);
383
384 intSave = LOS_IntLock();
385
386 g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
387
388 LOS_IntRestore(intSave);
389
390 return LOS_OK;
391 }
392
393 #define FAULT_STATUS_REG_BIT 32
394 #define USGFAULT (1 << 18)
395 #define BUSFAULT (1 << 17)
396 #define MEMFAULT (1 << 16)
397 #define DIV0FAULT (1 << 4)
398 #define UNALIGNFAULT (1 << 3)
399 #define HARDFAULT_IRQN (-13)
400
401 ExcInfo g_excInfo = {0};
402
403 UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
404 0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
405 0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
406 0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
407 0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
408 };
409
410 #if (LOSCFG_KERNEL_PRINTF != 0)
OsExcNvicDump(VOID)411 STATIC VOID OsExcNvicDump(VOID)
412 {
413 #define OS_NR_NVIC_EXC_DUMP_TYPES 7
414 UINT32 *base = NULL;
415 UINT32 len, i, j;
416 UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
417 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
418 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
419 };
420 UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
421 OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
422 OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
423 OS_NVIC_INT_CTRL_SIZE
424 };
425 CHAR strRgEnable[] = "enable";
426 CHAR strRgPending[] = "pending";
427 CHAR strRgActive[] = "active";
428 CHAR strRgPriority[] = "priority";
429 CHAR strRgException[] = "exception";
430 CHAR strRgShcsr[] = "shcsr";
431 CHAR strRgIntCtrl[] = "control";
432 CHAR *strRgs[] = {
433 strRgEnable, strRgPending, strRgActive, strRgPriority,
434 strRgException, strRgShcsr, strRgIntCtrl
435 };
436
437 PRINTK("\r\nOS exception NVIC dump:\n");
438 for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
439 base = (UINT32 *)rgNvicBases[i];
440 len = rgNvicLens[i];
441 PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
442 len = (len >> 2); /* 2: Gets the next register offset */
443 for (j = 0; j < len; j++) {
444 PRINTK("0x%x ", *(base + j));
445 if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
446 PRINTK("\n");
447 }
448 }
449 PRINTK("\n");
450 }
451 }
452
OsExcTypeInfo(const ExcInfo * excInfo)453 STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
454 {
455 CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
456
457 PRINTK("Type = %d\n", excInfo->type);
458 PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
459 PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
460 PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
461 }
462
OsExcCurTaskInfo(const ExcInfo * excInfo)463 STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
464 {
465 PRINTK("Current task info:\n");
466 if (excInfo->phase == OS_EXC_IN_TASK) {
467 LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
468 PRINTK("Task name = %s\n", taskCB->taskName);
469 PRINTK("Task ID = %d\n", taskCB->taskID);
470 PRINTK("Task SP = %p\n", taskCB->stackPointer);
471 PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
472 PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
473 } else if (excInfo->phase == OS_EXC_IN_HWI) {
474 PRINTK("Exception occur in interrupt phase!\n");
475 } else {
476 PRINTK("Exception occur in system init phase!\n");
477 }
478 }
479
OsExcRegInfo(const ExcInfo * excInfo)480 STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
481 {
482 PRINTK("Exception reg dump:\n");
483 PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
484 PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
485 PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
486 PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
487 PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
488 PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
489 PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
490 PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
491 PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
492 PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
493 PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
494 PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
495 PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
496 PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
497 PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
498 PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
499 PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
500 PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
501 }
502
503 #if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(const ExcInfo * excInfo)504 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
505 {
506 UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
507 UINT32 index;
508
509 OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
510
511 PRINTK("----- backtrace start -----\n");
512 for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
513 if (LR[index] == 0) {
514 break;
515 }
516 PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
517 }
518 PRINTK("----- backtrace end -----\n");
519 }
520 #endif
521
OsExcMemPoolCheckInfo(VOID)522 STATIC VOID OsExcMemPoolCheckInfo(VOID)
523 {
524 PRINTK("\r\nmemory pools check:\n");
525 #if (LOSCFG_PLATFORM_EXC == 1)
526 MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
527 UINT32 errCnt;
528 UINT32 i;
529
530 (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
531
532 errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
533 if (errCnt < OS_SYS_MEM_NUM) {
534 errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
535 }
536
537 if (errCnt == 0) {
538 PRINTK("all memory pool check passed!\n");
539 return;
540 }
541
542 for (i = 0; i < errCnt; i++) {
543 PRINTK("pool num = %d\n", i);
544 PRINTK("pool type = %d\n", memExcInfo[i].type);
545 PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
546 PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
547 PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
548 PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
549 PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
550 PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
551 PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
552 }
553 #endif
554 UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
555 if (ret == LOS_OK) {
556 PRINTK("system heap memcheck over, all passed!\n");
557 }
558
559 PRINTK("memory pool check end!\n");
560 }
561 #endif
562
OsExcInfoDisplay(const ExcInfo * excInfo)563 STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
564 {
565 #if (LOSCFG_KERNEL_PRINTF != 0)
566 PRINTK("*************Exception Information**************\n");
567 OsExcTypeInfo(excInfo);
568 OsExcCurTaskInfo(excInfo);
569 OsExcRegInfo(excInfo);
570 #if (LOSCFG_KERNEL_BACKTRACE == 1)
571 OsExcBackTraceInfo(excInfo);
572 #endif
573 OsGetAllTskInfo();
574 OsExcNvicDump();
575 OsExcMemPoolCheckInfo();
576 #endif
577 }
578
HalExcHandleEntry(UINT32 excType,UINT32 faultAddr,UINT32 pid,EXC_CONTEXT_S * excBufAddr)579 LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
580 {
581 UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
582 g_intCount++;
583 g_excInfo.nestCnt++;
584
585 g_excInfo.type = excType & OS_NULL_SHORT;
586
587 if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
588 g_excInfo.faultAddr = faultAddr;
589 } else {
590 g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
591 }
592 if (g_losTask.runTask != NULL) {
593 if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
594 g_excInfo.phase = OS_EXC_IN_HWI;
595 g_excInfo.thrdPid = pid;
596 } else {
597 g_excInfo.phase = OS_EXC_IN_TASK;
598 g_excInfo.thrdPid = g_losTask.runTask->taskID;
599 }
600 } else {
601 g_excInfo.phase = OS_EXC_IN_INIT;
602 g_excInfo.thrdPid = OS_NULL_INT;
603 }
604 if (excType & OS_EXC_FLAG_NO_FLOAT) {
605 g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
606 } else {
607 g_excInfo.context = excBufAddr;
608 }
609
610 OsDoExcHook(EXC_INTERRUPT);
611 OsExcInfoDisplay(&g_excInfo);
612 ArchSysExit();
613 }
614
615 /* ****************************************************************************
616 Function : HalHwiInit
617 Description : initialization of the hardware interrupt
618 Input : None
619 Output : None
620 Return : None
621 **************************************************************************** */
HalHwiInit(VOID)622 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
623 {
624 #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
625 UINT32 index;
626 g_hwiForm[0] = 0; /* [0] Top of Stack */
627 g_hwiForm[1] = (HWI_PROC_FUNC)Reset_Handler; /* [1] reset */
628 for (index = 2; index < OS_VECTOR_CNT; index++) { /* 2: The starting position of the interrupt */
629 g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
630 }
631 /* Exception handler register */
632 g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
633 g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
634 g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
635 g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
636 g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
637 g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcSvcCall;
638 g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
639 g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)SysTick_Handler;
640
641 /* Interrupt vector table location */
642 SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
643 #endif
644 #if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
645 NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
646 #endif
647
648 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
649 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
650
651 /* Enable DIV 0 and unaligned exception */
652 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
653 *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
654 #else
655 *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
656 #endif
657
658 return;
659 }
660
661