1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "los_interrupt.h"
33 #include "securec.h"
34 #include <stdarg.h>
35 #include "los_arch_interrupt.h"
36 #include "los_context.h"
37 #include "los_debug.h"
38 #include "los_hook.h"
39 #include "los_task.h"
40 #include "los_sched.h"
41 #include "los_memory.h"
42 #include "los_membox.h"
43 #if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
44 #include "los_cpup.h"
45 #endif
46
47 UINT32 g_intCount = 0;
48
49 #pragma location = ".data.vector"
50 #pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
51 /* *
52 * @ingroup los_hwi
53 * Hardware interrupt form mapping handling function array.
54 */
55 STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
56
57 #if (LOSCFG_DEBUG_TOOLS == 1)
58 STATIC UINT32 g_hwiFormCnt[OS_HWI_MAX_NUM] = {0};
59 STATIC CHAR *g_hwiFormName[OS_HWI_MAX_NUM] = {0};
60
OsGetHwiFormCnt(UINT32 index)61 UINT32 OsGetHwiFormCnt(UINT32 index)
62 {
63 return g_hwiFormCnt[index];
64 }
65
OsGetHwiFormName(UINT32 index)66 CHAR *OsGetHwiFormName(UINT32 index)
67 {
68 return g_hwiFormName[index];
69 }
70
OsGetHwiCreated(UINT32 index)71 BOOL OsGetHwiCreated(UINT32 index)
72 {
73 if (g_hwiForm[index] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
74 return TRUE;
75 }
76
77 return FALSE;
78 }
79 #endif
80
81 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
82
83 typedef struct {
84 HWI_PROC_FUNC pfnHandler;
85 VOID *pParm;
86 } HWI_HANDLER_FUNC;
87
88 /* *
89 * @ingroup los_hwi
90 * Hardware interrupt handler form mapping handling function array.
91 */
92 STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
93
94 /* *
95 * @ingroup los_hwi
96 * Set interrupt vector table.
97 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector,VOID * arg)98 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
99 {
100 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
101 g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
102 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
103 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
104 }
105 }
106
107 #else
108 /* *
109 * @ingroup los_hwi
110 * hardware interrupt handler form mapping handling function array.
111 */
112 STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
113
114 /* *
115 * @ingroup los_hwi
116 * Set interrupt vector table.
117 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector)118 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
119 {
120 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
121 g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
122 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
123 }
124 }
125 #endif
126
SysTick_Handler(VOID)127 WEAK VOID SysTick_Handler(VOID)
128 {
129 return;
130 }
131
132 /* ****************************************************************************
133 Function : HwiNumGet
134 Description : Get an interrupt number
135 Input : None
136 Output : None
137 Return : Interrupt Indexes number
138 **************************************************************************** */
HwiNumGet(VOID)139 STATIC UINT32 HwiNumGet(VOID)
140 {
141 return __get_IPSR();
142 }
143
HwiUnmask(HWI_HANDLE_T hwiNum)144 STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
145 {
146 if (hwiNum >= OS_HWI_MAX_NUM) {
147 return OS_ERRNO_HWI_NUM_INVALID;
148 }
149
150 NVIC_EnableIRQ((IRQn_Type)hwiNum);
151
152 return LOS_OK;
153 }
154
HwiMask(HWI_HANDLE_T hwiNum)155 STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
156 {
157 if (hwiNum >= OS_HWI_MAX_NUM) {
158 return OS_ERRNO_HWI_NUM_INVALID;
159 }
160
161 NVIC_DisableIRQ((IRQn_Type)hwiNum);
162
163 return LOS_OK;
164 }
165
HwiSetPriority(HWI_HANDLE_T hwiNum,UINT8 priority)166 STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
167 {
168 if (hwiNum >= OS_HWI_MAX_NUM) {
169 return OS_ERRNO_HWI_NUM_INVALID;
170 }
171
172 if (priority > OS_HWI_PRIO_LOWEST) {
173 return OS_ERRNO_HWI_PRIO_INVALID;
174 }
175
176 NVIC_SetPriority((IRQn_Type)hwiNum, priority);
177
178 return LOS_OK;
179 }
180
HwiPending(HWI_HANDLE_T hwiNum)181 STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
182 {
183 if (hwiNum >= OS_HWI_MAX_NUM) {
184 return OS_ERRNO_HWI_NUM_INVALID;
185 }
186
187 NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
188
189 return LOS_OK;
190 }
191
HwiClear(HWI_HANDLE_T hwiNum)192 STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
193 {
194 if (hwiNum >= OS_HWI_MAX_NUM) {
195 return OS_ERRNO_HWI_NUM_INVALID;
196 }
197
198 NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
199
200 return LOS_OK;
201 }
202
203 HwiControllerOps g_archHwiOps = {
204 .enableIrq = HwiUnmask,
205 .disableIrq = HwiMask,
206 .setIrqPriority = HwiSetPriority,
207 .getCurIrqNum = HwiNumGet,
208 .triggerIrq = HwiPending,
209 .clearIrq = HwiClear,
210 };
211
ArchIsIntActive(VOID)212 inline UINT32 ArchIsIntActive(VOID)
213 {
214 return (g_intCount > 0);
215 }
216 /* ****************************************************************************
217 Function : HalHwiDefaultHandler
218 Description : default handler of the hardware interrupt
219 Input : None
220 Output : None
221 Return : None
222 **************************************************************************** */
223 /*lint -e529*/
HalHwiDefaultHandler(VOID)224 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
225 {
226 PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
227 while (1) {}
228 }
229
HalPreInterruptHandler(UINT32 arg)230 WEAK VOID HalPreInterruptHandler(UINT32 arg)
231 {
232 (VOID)arg;
233 return;
234 }
235
HalAftInterruptHandler(UINT32 arg)236 WEAK VOID HalAftInterruptHandler(UINT32 arg)
237 {
238 (VOID)arg;
239 return;
240 }
241
242 /* ****************************************************************************
243 Function : HalInterrupt
244 Description : Hardware interrupt entry function
245 Input : None
246 Output : None
247 Return : None
248 **************************************************************************** */
HalInterrupt(VOID)249 LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
250 {
251 UINT32 hwiIndex;
252 UINT32 intSave;
253
254 #if (LOSCFG_KERNEL_RUNSTOP == 1)
255 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
256 #endif
257
258 intSave = LOS_IntLock();
259 g_intCount++;
260 LOS_IntRestore(intSave);
261
262 hwiIndex = HwiNumGet();
263
264 OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
265 #if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
266 OsCpupIrqStart(hwiIndex);
267 #endif
268
269 HalPreInterruptHandler(hwiIndex);
270
271 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
272 if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
273 g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
274 }
275 #else
276 if (g_hwiHandlerForm[hwiIndex] != 0) {
277 g_hwiHandlerForm[hwiIndex]();
278 }
279 #endif
280
281 #if (LOSCFG_DEBUG_TOOLS == 1)
282 ++g_hwiFormCnt[hwiIndex];
283 #endif
284
285 HalAftInterruptHandler(hwiIndex);
286
287 #if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
288 OsCpupIrqEnd(hwiIndex);
289 #endif
290
291 OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
292
293 intSave = LOS_IntLock();
294 g_intCount--;
295 LOS_IntRestore(intSave);
296 }
297
298 /* ****************************************************************************
299 Function : ArchHwiCreate
300 Description : create hardware interrupt
301 Input : hwiNum --- hwi num to create
302 hwiPrio --- priority of the hwi
303 hwiMode --- unused
304 hwiHandler --- hwi handler
305 irqParam --- param of the hwi handler
306 Output : None
307 Return : LOS_OK on success or error code on failure
308 **************************************************************************** */
ArchHwiCreate(HWI_HANDLE_T hwiNum,HWI_PRIOR_T hwiPrio,HWI_MODE_T hwiMode,HWI_PROC_FUNC hwiHandler,HwiIrqParam * irqParam)309 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
310 HWI_PRIOR_T hwiPrio,
311 HWI_MODE_T hwiMode,
312 HWI_PROC_FUNC hwiHandler,
313 HwiIrqParam *irqParam)
314 {
315 (VOID)hwiMode;
316 UINT32 intSave;
317
318 if (hwiHandler == NULL) {
319 return OS_ERRNO_HWI_PROC_FUNC_NULL;
320 }
321
322 if (hwiNum >= OS_HWI_MAX_NUM) {
323 return OS_ERRNO_HWI_NUM_INVALID;
324 }
325
326 if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
327 return OS_ERRNO_HWI_ALREADY_CREATED;
328 }
329
330 if (hwiPrio > OS_HWI_PRIO_LOWEST) {
331 return OS_ERRNO_HWI_PRIO_INVALID;
332 }
333
334 intSave = LOS_IntLock();
335 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
336 if (irqParam != NULL) {
337 OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
338 } else {
339 OsSetVector(hwiNum, hwiHandler, NULL);
340 }
341 #else
342 (VOID)irqParam;
343 OsSetVector(hwiNum, hwiHandler);
344 #endif
345
346 #if (LOSCFG_DEBUG_TOOLS == 1)
347 if ((irqParam != NULL) && (irqParam->pName != NULL)) {
348 g_hwiFormName[hwiNum + OS_SYS_VECTOR_CNT] = (CHAR *)irqParam->pName;
349 }
350 g_hwiFormCnt[hwiNum + OS_SYS_VECTOR_CNT] = 0;
351 #endif
352
353 HwiUnmask((IRQn_Type)hwiNum);
354 HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
355
356 LOS_IntRestore(intSave);
357
358 return LOS_OK;
359 }
360
361 /* ****************************************************************************
362 Function : ArchHwiDelete
363 Description : Delete hardware interrupt
364 Input : hwiNum --- hwi num to delete
365 irqParam --- param of the hwi handler
366 Output : None
367 Return : LOS_OK on success or error code on failure
368 **************************************************************************** */
ArchHwiDelete(HWI_HANDLE_T hwiNum,HwiIrqParam * irqParam)369 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
370 {
371 (VOID)irqParam;
372 UINT32 intSave;
373
374 if (hwiNum >= OS_HWI_MAX_NUM) {
375 return OS_ERRNO_HWI_NUM_INVALID;
376 }
377
378 NVIC_DisableIRQ((IRQn_Type)hwiNum);
379
380 intSave = LOS_IntLock();
381
382 g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
383
384 LOS_IntRestore(intSave);
385
386 return LOS_OK;
387 }
388
389 #define FAULT_STATUS_REG_BIT 32
390 #define USGFAULT (1 << 18)
391 #define BUSFAULT (1 << 17)
392 #define MEMFAULT (1 << 16)
393 #define DIV0FAULT (1 << 4)
394 #define UNALIGNFAULT (1 << 3)
395 #define HARDFAULT_IRQN (-13)
396
397 ExcInfo g_excInfo = {0};
398
399 UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
400 0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
401 0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
402 0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
403 0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
404 };
405
406 #if (LOSCFG_KERNEL_PRINTF != 0)
OsExcNvicDump(VOID)407 STATIC VOID OsExcNvicDump(VOID)
408 {
409 #define OS_NR_NVIC_EXC_DUMP_TYPES 7
410 UINT32 *base = NULL;
411 UINT32 len, i, j;
412 UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
413 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
414 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
415 };
416 UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
417 OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
418 OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
419 OS_NVIC_INT_CTRL_SIZE
420 };
421 CHAR strRgEnable[] = "enable";
422 CHAR strRgPending[] = "pending";
423 CHAR strRgActive[] = "active";
424 CHAR strRgPriority[] = "priority";
425 CHAR strRgException[] = "exception";
426 CHAR strRgShcsr[] = "shcsr";
427 CHAR strRgIntCtrl[] = "control";
428 CHAR *strRgs[] = {
429 strRgEnable, strRgPending, strRgActive, strRgPriority,
430 strRgException, strRgShcsr, strRgIntCtrl
431 };
432
433 PRINTK("\r\nOS exception NVIC dump:\n");
434 for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
435 base = (UINT32 *)rgNvicBases[i];
436 len = rgNvicLens[i];
437 PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
438 len = (len >> 2); /* 2: Gets the next register offset */
439 for (j = 0; j < len; j++) {
440 PRINTK("0x%x ", *(base + j));
441 if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
442 PRINTK("\n");
443 }
444 }
445 PRINTK("\n");
446 }
447 }
448
OsExcTypeInfo(const ExcInfo * excInfo)449 STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
450 {
451 CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
452
453 PRINTK("Type = %d\n", excInfo->type);
454 PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
455 PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
456 PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
457 }
458
OsExcCurTaskInfo(const ExcInfo * excInfo)459 STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
460 {
461 PRINTK("Current task info:\n");
462 if (excInfo->phase == OS_EXC_IN_TASK) {
463 LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
464 PRINTK("Task name = %s\n", taskCB->taskName);
465 PRINTK("Task ID = %d\n", taskCB->taskID);
466 PRINTK("Task SP = %p\n", taskCB->stackPointer);
467 PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
468 PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
469 } else if (excInfo->phase == OS_EXC_IN_HWI) {
470 PRINTK("Exception occur in interrupt phase!\n");
471 } else {
472 PRINTK("Exception occur in system init phase!\n");
473 }
474 }
475
OsExcRegInfo(const ExcInfo * excInfo)476 STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
477 {
478 PRINTK("Exception reg dump:\n");
479 PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
480 PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
481 PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
482 PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
483 PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
484 PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
485 PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
486 PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
487 PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
488 PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
489 PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
490 PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
491 PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
492 PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
493 PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
494 PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
495 PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
496 PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
497 }
498
499 #if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(const ExcInfo * excInfo)500 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
501 {
502 UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
503 UINT32 index;
504
505 OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
506
507 PRINTK("----- backtrace start -----\n");
508 for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
509 if (LR[index] == 0) {
510 break;
511 }
512 PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
513 }
514 PRINTK("----- backtrace end -----\n");
515 }
516 #endif
517
OsExcMemPoolCheckInfo(VOID)518 STATIC VOID OsExcMemPoolCheckInfo(VOID)
519 {
520 PRINTK("\r\nmemory pools check:\n");
521 #if (LOSCFG_PLATFORM_EXC == 1)
522 MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
523 UINT32 errCnt;
524 UINT32 i;
525
526 (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
527
528 errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
529 if (errCnt < OS_SYS_MEM_NUM) {
530 errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
531 }
532
533 if (errCnt == 0) {
534 PRINTK("all memory pool check passed!\n");
535 return;
536 }
537
538 for (i = 0; i < errCnt; i++) {
539 PRINTK("pool num = %d\n", i);
540 PRINTK("pool type = %d\n", memExcInfo[i].type);
541 PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
542 PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
543 PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
544 PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
545 PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
546 PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
547 PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
548 }
549 #endif
550 UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
551 if (ret == LOS_OK) {
552 PRINTK("system heap memcheck over, all passed!\n");
553 }
554
555 PRINTK("memory pool check end!\n");
556 }
557 #endif
558
OsExcInfoDisplay(const ExcInfo * excInfo)559 STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
560 {
561 #if (LOSCFG_KERNEL_PRINTF != 0)
562 PRINTK("*************Exception Information**************\n");
563 OsExcTypeInfo(excInfo);
564 OsExcCurTaskInfo(excInfo);
565 OsExcRegInfo(excInfo);
566 #if (LOSCFG_KERNEL_BACKTRACE == 1)
567 OsExcBackTraceInfo(excInfo);
568 #endif
569 OsGetAllTskInfo();
570 OsExcNvicDump();
571 OsExcMemPoolCheckInfo();
572 #endif
573 }
574
HalExcHandleEntry(UINT32 excType,UINT32 faultAddr,UINT32 pid,EXC_CONTEXT_S * excBufAddr)575 LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
576 {
577 UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
578 g_intCount++;
579 g_excInfo.nestCnt++;
580
581 g_excInfo.type = excType & OS_NULL_SHORT;
582
583 if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
584 g_excInfo.faultAddr = faultAddr;
585 } else {
586 g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
587 }
588 if (g_losTask.runTask != NULL) {
589 if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
590 g_excInfo.phase = OS_EXC_IN_HWI;
591 g_excInfo.thrdPid = pid;
592 } else {
593 g_excInfo.phase = OS_EXC_IN_TASK;
594 g_excInfo.thrdPid = g_losTask.runTask->taskID;
595 }
596 } else {
597 g_excInfo.phase = OS_EXC_IN_INIT;
598 g_excInfo.thrdPid = OS_NULL_INT;
599 }
600 if (excType & OS_EXC_FLAG_NO_FLOAT) {
601 g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
602 } else {
603 g_excInfo.context = excBufAddr;
604 }
605
606 OsDoExcHook(EXC_INTERRUPT);
607 OsExcInfoDisplay(&g_excInfo);
608 ArchSysExit();
609 }
610
611 /* ****************************************************************************
612 Function : HalHwiInit
613 Description : initialization of the hardware interrupt
614 Input : None
615 Output : None
616 Return : None
617 **************************************************************************** */
HalHwiInit(VOID)618 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
619 {
620 #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
621 UINT32 index;
622 g_hwiForm[0] = 0; /* [0] Top of Stack */
623 g_hwiForm[1] = (HWI_PROC_FUNC)Reset_Handler; /* [1] reset */
624 for (index = 2; index < OS_VECTOR_CNT; index++) { /* 2: The starting position of the interrupt */
625 g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
626 }
627 /* Exception handler register */
628 g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
629 g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
630 g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
631 g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
632 g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
633 g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcSvcCall;
634 g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
635 g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)SysTick_Handler;
636
637 /* Interrupt vector table location */
638 SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
639 #endif
640 #if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
641 NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
642 #endif
643
644 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
645 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
646
647 /* Enable DIV 0 and unaligned exception */
648 *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
649
650 return;
651 }
652
653