1 // Copyright (c) 2020 André Perez Maselco
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "source/fuzz/fuzzer_pass_add_bit_instruction_synonyms.h"
16
17 #include "source/fuzz/fuzzer_util.h"
18 #include "source/fuzz/instruction_descriptor.h"
19 #include "source/fuzz/transformation_add_bit_instruction_synonym.h"
20
21 namespace spvtools {
22 namespace fuzz {
23
FuzzerPassAddBitInstructionSynonyms(opt::IRContext * ir_context,TransformationContext * transformation_context,FuzzerContext * fuzzer_context,protobufs::TransformationSequence * transformations)24 FuzzerPassAddBitInstructionSynonyms::FuzzerPassAddBitInstructionSynonyms(
25 opt::IRContext* ir_context, TransformationContext* transformation_context,
26 FuzzerContext* fuzzer_context,
27 protobufs::TransformationSequence* transformations)
28 : FuzzerPass(ir_context, transformation_context, fuzzer_context,
29 transformations) {}
30
Apply()31 void FuzzerPassAddBitInstructionSynonyms::Apply() {
32 for (auto& function : *GetIRContext()->module()) {
33 for (auto& block : function) {
34 for (auto& instruction : block) {
35 // This fuzzer pass can add a *lot* of ids. We bail out early if we hit
36 // the recommended id limit.
37 if (GetIRContext()->module()->id_bound() >=
38 GetFuzzerContext()->GetIdBoundLimit()) {
39 return;
40 }
41
42 // Randomly decides whether the transformation will be applied.
43 if (!GetFuzzerContext()->ChoosePercentage(
44 GetFuzzerContext()->GetChanceOfAddingBitInstructionSynonym())) {
45 continue;
46 }
47
48 // TODO(https://github.com/KhronosGroup/SPIRV-Tools/issues/3557):
49 // Right now we only support certain operations. When this issue is
50 // addressed the following conditional can use the function
51 // |spvOpcodeIsBit|.
52 if (instruction.opcode() != SpvOpBitwiseOr &&
53 instruction.opcode() != SpvOpBitwiseXor &&
54 instruction.opcode() != SpvOpBitwiseAnd &&
55 instruction.opcode() != SpvOpNot) {
56 continue;
57 }
58
59 // Right now, only integer operands are supported.
60 if (GetIRContext()
61 ->get_type_mgr()
62 ->GetType(instruction.type_id())
63 ->AsVector()) {
64 continue;
65 }
66
67 // Make sure all bit indexes are defined as 32-bit unsigned integers.
68 uint32_t width = GetIRContext()
69 ->get_type_mgr()
70 ->GetType(instruction.type_id())
71 ->AsInteger()
72 ->width();
73 for (uint32_t i = 0; i < width; i++) {
74 FindOrCreateIntegerConstant({i}, 32, false, false);
75 }
76
77 // Applies the add bit instruction synonym transformation.
78 ApplyTransformation(TransformationAddBitInstructionSynonym(
79 instruction.result_id(),
80 GetFuzzerContext()->GetFreshIds(
81 TransformationAddBitInstructionSynonym::GetRequiredFreshIdCount(
82 GetIRContext(), &instruction))));
83 }
84 }
85 }
86 }
87
88 } // namespace fuzz
89 } // namespace spvtools
90