68 /* Offsets are from @ispi->sregs */
132  * @sregs: Start of software sequencer registers
150 	void __iomem *sregs;  member
194 	if (ispi->sregs) {  in intel_spi_dump_regs()
195 		value = readl(ispi->sregs + SSFSTS_CTL);  in intel_spi_dump_regs()
198 			readl(ispi->sregs + PREOP_OPTYPE));  in intel_spi_dump_regs()
200 			readl(ispi->sregs + OPMENU0));  in intel_spi_dump_regs()
202 			readl(ispi->sregs + OPMENU1));  in intel_spi_dump_regs()
303 	return readl_poll_timeout(ispi->sregs + SSFSTS_CTL, val,  in intel_spi_wait_sw_busy()
315 		ispi->sregs = ispi->base + BYT_SSFSTS_CTL;  in intel_spi_init()
336 		ispi->sregs = ispi->base + LPT_SSFSTS_CTL;  in intel_spi_init()
344 		ispi->sregs = ispi->base + BXT_SSFSTS_CTL;  in intel_spi_init()
352 		ispi->sregs = NULL;  in intel_spi_init()
385 	if (ispi->sregs == NULL && (ispi->swseq_reg || ispi->swseq_erase)) {  in intel_spi_init()
397 		val = readl(ispi->sregs + SSFSTS_CTL);  in intel_spi_init()
399 		writel(val, ispi->sregs + SSFSTS_CTL);  in intel_spi_init()
406 	if (ispi->locked && ispi->sregs) {  in intel_spi_init()
412 		opmenu0 = readl(ispi->sregs + OPMENU0);  in intel_spi_init()
413 		opmenu1 = readl(ispi->sregs + OPMENU1);  in intel_spi_init()
442 	writel(opcode, ispi->sregs + OPMENU0);  in intel_spi_opcode_index()
443 	preop = readw(ispi->sregs + PREOP_OPTYPE);  in intel_spi_opcode_index()
444 	writel(optype << 16 | preop, ispi->sregs + PREOP_OPTYPE);  in intel_spi_opcode_index()
526 			preop = readw(ispi->sregs + PREOP_OPTYPE);  in intel_spi_sw_cycle()
543 	writel(val, ispi->sregs + SSFSTS_CTL);  in intel_spi_sw_cycle()
549 	status = readl(ispi->sregs + SSFSTS_CTL);  in intel_spi_sw_cycle()
600 		preop = readw(ispi->sregs + PREOP_OPTYPE);  in intel_spi_write_reg()
604 			writel(opcode, ispi->sregs + PREOP_OPTYPE);  in intel_spi_write_reg()