Lines Matching refs:radeon_cmdbuf

687    struct radeon_cmdbuf *initial_preamble_cs;
688    struct radeon_cmdbuf *initial_full_flush_preamble_cs;
689    struct radeon_cmdbuf *continue_preamble_cs;
735    struct radeon_cmdbuf *empty_cs[RADV_MAX_QUEUE_FAMILIES];
1472    struct radeon_cmdbuf *cs;
1519 void si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs);
1520 void si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs);
1524 void si_write_scissors(struct radeon_cmdbuf *cs, int first, int count, const VkRect2D *scissors,
1530 void si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec,
1535 void radv_cp_wait_mem(struct radeon_cmdbuf *cs, uint32_t op, uint64_t va, uint32_t ref,
1537 void si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class,
1576 void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples);
1615 radv_emit_shader_pointer_head(struct radeon_cmdbuf *cs, unsigned sh_offset, unsigned pointer_count,  in radv_emit_shader_pointer_head()
1623 radv_emit_shader_pointer_body(struct radv_device *device, struct radeon_cmdbuf *cs, uint64_t va,  in radv_emit_shader_pointer_body()
1636 radv_emit_shader_pointer(struct radv_device *device, struct radeon_cmdbuf *cs, uint32_t sh_offset,  in radv_emit_shader_pointer()
1774    struct radeon_cmdbuf cs;
1776    struct radeon_cmdbuf ctx_cs;
2575 bool radv_queue_internal_submit(struct radv_queue *queue, struct radeon_cmdbuf *cs);
2643 void radv_emit_thread_trace_userdata(const struct radv_device *device, struct radeon_cmdbuf *cs,