/kernel/linux/linux-5.10/drivers/ide/ |
D | umc8672.c | 34 * in the beginning of the driver, which sets the speed of drive 0 to 11 (there 35 * are some lines present). 0 - 11 are allowed speed values. These values are 60 #define UMC_DRIVE1 1 /* 0 to 11 allowed */ 65 static const u8 pio_to_umc [5] = {0, 3, 7, 10, 11}; /* rough guesses */ 67 /* 0 1 2 3 4 5 6 7 8 9 10 11 */ 69 {0x0f, 0x0b, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1}, 70 {0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1}, 71 {0xff, 0xcb, 0xc0, 0x58, 0x36, 0x33, 0x23, 0x22, 0x21, 0x11, 0x10, 0x0} 76 outb_p(port, 0x108); in out_umc() 77 outb_p(wert, 0x109); in out_umc() [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-orion5x/ |
D | bridge-regs.h | 14 #define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) 16 #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) 18 #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) 19 #define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) 21 #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) 23 #define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) 25 #define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) 27 #define BRIDGE_INT_TIMER1_CLR (~0x0004) 29 #define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) 31 #define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) [all …]
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/kernel/linux/linux-5.10/arch/mips/include/asm/ |
D | hpet.h | 9 #define HPET_ID 0x000 10 #define HPET_PERIOD 0x004 11 #define HPET_CFG 0x010 12 #define HPET_STATUS 0x020 13 #define HPET_COUNTER 0x0f0 15 #define HPET_Tn_CFG(n) (0x100 + 0x20 * n) 16 #define HPET_Tn_CMP(n) (0x108 + 0x20 * n) 17 #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n) 19 #define HPET_T0_IRS 0x001 20 #define HPET_T1_IRS 0x002 [all …]
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/kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
D | phy-qcom-qmp.h | 10 #define QSERDES_COM_BG_TIMER 0x00c 11 #define QSERDES_COM_SSC_EN_CENTER 0x010 12 #define QSERDES_COM_SSC_ADJ_PER1 0x014 13 #define QSERDES_COM_SSC_ADJ_PER2 0x018 14 #define QSERDES_COM_SSC_PER1 0x01c 15 #define QSERDES_COM_SSC_PER2 0x020 16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024 17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028 18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034 19 #define QSERDES_COM_CLK_ENABLE1 0x038 [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-mmp/ |
D | regs-icu.h | 11 #define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000) 14 #define ICU2_VIRT_BASE (AXI_VIRT_BASE + 0x84000) 18 #define ICU_INT_CONF_MASK (0xf) 25 #define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */ 26 #define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */ 27 #define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */ 28 #define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */ 29 #define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */ 41 #define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138) 42 #define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c) [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
D | omap-secure.h | 16 #define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE 17 #define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF 20 #define API_HAL_RET_VALUE_OK 0x00 21 #define API_HAL_RET_VALUE_FAIL 0x01 24 #define FLAG_START_CRITICAL 0x4 25 #define FLAG_IRQFIQ_MASK 0x3 26 #define FLAG_IRQ_ENABLE 0x2 27 #define FLAG_FIQ_ENABLE 0x1 28 #define NO_FLAG 0x0 33 #define OMAP3_SAVE_SECURE_RAM_SZ 0x803F [all …]
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/kernel/linux/linux-5.10/drivers/media/pci/cx18/ |
D | cx18-av-audio.c | 60 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in set_audclk_freq() 61 * AUX_PLL Integer = 0x0d, AUX PLL Post Divider = 0x20 in set_audclk_freq() 63 cx18_av_write4(cx, 0x108, 0x200d040f); in set_audclk_freq() 65 /* VID_PLL Fraction = 0x2be2fe */ in set_audclk_freq() 66 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq() 67 cx18_av_write4(cx, 0x10c, 0x002be2fe); in set_audclk_freq() 69 /* AUX_PLL Fraction = 0x176740c */ in set_audclk_freq() 70 /* xtal * 0xd.bb3a060/0x20 = 32000 * 384: 393 MHz p-pd*/ in set_audclk_freq() 71 cx18_av_write4(cx, 0x110, 0x0176740c); in set_audclk_freq() 74 /* 0x1.f77f = (4 * xtal/8*2/455) / 32000 */ in set_audclk_freq() [all …]
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/kernel/linux/linux-5.10/arch/x86/include/asm/ |
D | hpet.h | 11 #define HPET_ID 0x000 12 #define HPET_PERIOD 0x004 13 #define HPET_CFG 0x010 14 #define HPET_STATUS 0x020 15 #define HPET_COUNTER 0x0f0 17 #define HPET_Tn_CFG(n) (0x100 + 0x20 * n) 18 #define HPET_Tn_CMP(n) (0x108 + 0x20 * n) 19 #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n) 21 #define HPET_T0_CFG 0x100 22 #define HPET_T0_CMP 0x108 [all …]
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/kernel/linux/linux-5.10/drivers/media/i2c/cx25840/ |
D | cx25840-audio.c | 39 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in cx25840_set_audclk_freq() 40 * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10 in cx25840_set_audclk_freq() 42 cx25840_write4(client, 0x108, 0x1006040f); in cx25840_set_audclk_freq() 45 * VID_PLL Fraction (register 0x10c) = 0x2be2fe in cx25840_set_audclk_freq() 46 * 28636360 * 0xf.15f17f0/4 = 108 MHz in cx25840_set_audclk_freq() 51 * AUX_PLL Fraction = 0x1bb39ee in cx25840_set_audclk_freq() 52 * 28636363 * 0x6.dd9cf70/0x10 = 32000 * 384 in cx25840_set_audclk_freq() 57 cx25840_write4(client, 0x110, 0x01bb39ee); in cx25840_set_audclk_freq() 61 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider in cx25840_set_audclk_freq() 63 cx25840_write(client, 0x127, 0x50); in cx25840_set_audclk_freq() [all …]
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/kernel/linux/linux-5.10/drivers/clk/renesas/ |
D | clk-sh73a0.c | 24 #define CPG_FRQCRA 0x00 25 #define CPG_FRQCRB 0x04 26 #define CPG_SD0CKCR 0x74 27 #define CPG_SD1CKCR 0x78 28 #define CPG_SD2CKCR 0x7c 29 #define CPG_PLLECR 0xd0 30 #define CPG_PLL0CR 0xd8 31 #define CPG_PLL1CR 0x28 32 #define CPG_PLL2CR 0x2c 33 #define CPG_PLL3CR 0xdc [all …]
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/kernel/linux/linux-5.10/arch/mips/pci/ |
D | pci-vr41xx.h | 12 #define PCIU_BASE 0x0f000c00UL 13 #define PCIU_SIZE 0x200UL 15 #define PCIMMAW1REG 0x00 16 #define PCIMMAW2REG 0x04 17 #define PCITAW1REG 0x08 18 #define PCITAW2REG 0x0c 19 #define PCIMIOAWREG 0x10 20 #define IBA(addr) ((addr) & 0xff000000U) 21 #define MASTER_MSK(mask) (((mask) >> 11) & 0x000fe000U) 22 #define PCIA(addr) (((addr) >> 24) & 0x000000ffU) [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
D | regs-sys-s3c64xx.h | 16 #define S3C64XX_AHB_CON0 S3C_SYSREG(0x100) 17 #define S3C64XX_AHB_CON1 S3C_SYSREG(0x104) 18 #define S3C64XX_AHB_CON2 S3C_SYSREG(0x108) 20 #define S3C64XX_SDMA_SEL S3C_SYSREG(0x110) 22 #define S3C64XX_OTHERS S3C_SYSREG(0x900)
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
D | pipeline.json | 4 "EventCode": "0x108", 10 "EventCode": "0x109", 16 "EventCode": "0x10a", 22 "EventCode": "0x10b", 28 "EventCode": "0x10c", 34 "EventCode": "0x10d", 40 "EventCode": "0x10e", 46 "EventCode": "0x10f",
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/kernel/linux/linux-5.10/drivers/mmc/host/ |
D | sdhci_f_sdh30.h | 11 #define F_SDH30_AHB_CONFIG 0x100 18 #define F_SDH30_AHB_INCR_4 BIT(0) 20 #define F_SDH30_TUNING_SETTING 0x108 23 #define F_SDH30_IO_CONTROL2 0x114 27 #define F_SDH30_ESD_CONTROL 0x124
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/kernel/linux/linux-5.10/drivers/tty/serial/8250/ |
D | 8250_exar_st16c554.c | 16 SERIAL8250_PORT(0x100, 5), 17 SERIAL8250_PORT(0x108, 5), 18 SERIAL8250_PORT(0x110, 5), 19 SERIAL8250_PORT(0x118, 5),
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D | 8250_boca.c | 13 SERIAL8250_PORT(0x100, 12), 14 SERIAL8250_PORT(0x108, 12), 15 SERIAL8250_PORT(0x110, 12), 16 SERIAL8250_PORT(0x118, 12), 17 SERIAL8250_PORT(0x120, 12), 18 SERIAL8250_PORT(0x128, 12), 19 SERIAL8250_PORT(0x130, 12), 20 SERIAL8250_PORT(0x138, 12), 21 SERIAL8250_PORT(0x140, 12), 22 SERIAL8250_PORT(0x148, 12), [all …]
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/kernel/linux/linux-5.10/arch/arm/boot/dts/ |
D | omap4-mcpdm.dtsi | 12 /* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */ 13 OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) 15 /* 0x4a100108 abe_pdm_dl_data.abe_pdm_dl_data af25 */ 16 OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) 18 /* 0x4a10010a abe_pdm_frame.abe_pdm_frame ae25 */ 19 OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) 21 /* 0x4a10010c abe_pdm_lb_clk.abe_pdm_lb_clk af26 */ 22 OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) 24 /* 0x4a10010e abe_clks.abe_clks ah26 */ 25 OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) [all …]
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D | vf610-pinfunc.h | 14 #define ALT0 0x0 15 #define ALT1 0x1 16 #define ALT2 0x2 17 #define ALT3 0x3 18 #define ALT4 0x4 19 #define ALT5 0x5 20 #define ALT6 0x6 21 #define ALT7 0x7 24 #define VF610_PAD_PTA6__GPIO_0 0x000 0x000 ALT0 0x0 25 #define VF610_PAD_PTA6__RMII_CLKOUT 0x000 0x000 ALT1 0x0 [all …]
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/kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
D | clk-hi3660.c | 14 { HI3660_CLKIN_SYS, "clkin_sys", NULL, 0, 19200000, }, 15 { HI3660_CLKIN_REF, "clkin_ref", NULL, 0, 32764, }, 16 { HI3660_CLK_FLL_SRC, "clk_fll_src", NULL, 0, 128000000, }, 17 { HI3660_CLK_PPLL0, "clk_ppll0", NULL, 0, 1600000000, }, 18 { HI3660_CLK_PPLL1, "clk_ppll1", NULL, 0, 1866000000, }, 19 { HI3660_CLK_PPLL2, "clk_ppll2", NULL, 0, 2880000000UL, }, 20 { HI3660_CLK_PPLL3, "clk_ppll3", NULL, 0, 1290000000, }, 21 { HI3660_CLK_SCPLL, "clk_scpll", NULL, 0, 245760000, }, 22 { HI3660_PCLK, "pclk", NULL, 0, 20000000, }, 23 { HI3660_CLK_UART0_DBG, "clk_uart0_dbg", NULL, 0, 19200000, }, [all …]
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D | clk-hi3620.c | 67 { HI3620_OSC32K, "osc32k", NULL, 0, 32768, }, 68 { HI3620_OSC26M, "osc26m", NULL, 0, 26000000, }, 69 { HI3620_PCLK, "pclk", NULL, 0, 26000000, }, 70 { HI3620_PLL_ARM0, "armpll0", NULL, 0, 1600000000, }, 71 { HI3620_PLL_ARM1, "armpll1", NULL, 0, 1600000000, }, 72 { HI3620_PLL_PERI, "armpll2", NULL, 0, 1440000000, }, 73 { HI3620_PLL_USB, "armpll3", NULL, 0, 1440000000, }, 74 { HI3620_PLL_HDMI, "armpll4", NULL, 0, 1188000000, }, 75 { HI3620_PLL_GPU, "armpll5", NULL, 0, 1300000000, }, 80 { HI3620_RCLK_TCXO, "rclk_tcxo", "osc26m", 1, 4, 0, }, [all …]
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/kernel/linux/linux-5.10/include/linux/ |
D | atmel_pdc.h | 15 #define ATMEL_PDC_RPR 0x100 /* Receive Pointer Register */ 16 #define ATMEL_PDC_RCR 0x104 /* Receive Counter Register */ 17 #define ATMEL_PDC_TPR 0x108 /* Transmit Pointer Register */ 18 #define ATMEL_PDC_TCR 0x10c /* Transmit Counter Register */ 19 #define ATMEL_PDC_RNPR 0x110 /* Receive Next Pointer Register */ 20 #define ATMEL_PDC_RNCR 0x114 /* Receive Next Counter Register */ 21 #define ATMEL_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ 22 #define ATMEL_PDC_TNCR 0x11c /* Transmit Next Counter Register */ 24 #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */ 25 #define ATMEL_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ [all …]
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/kernel/linux/linux-5.10/arch/alpha/include/uapi/asm/ |
D | setup.h | 12 #define BOOT_PCB 0x20000000 13 #define BOOT_ADDR 0x20000000 18 #define KERNEL_START_PHYS 0x300000 /* Old bootloaders hardcoded this. */ 20 #define KERNEL_START_PHYS 0x1000000 /* required: Wildfire/Titan/Marvel */ 25 #define INIT_STACK (PAGE_OFFSET+KERNEL_START_PHYS+0x02000) 26 #define EMPTY_PGT (PAGE_OFFSET+KERNEL_START_PHYS+0x04000) 27 #define EMPTY_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x08000) 28 #define ZERO_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x0A000) 30 #define START_ADDR (PAGE_OFFSET+KERNEL_START_PHYS+0x10000) 39 #define COMMAND_LINE ((char*)(PARAM + 0x0000)) [all …]
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/kernel/linux/linux-5.10/drivers/video/fbdev/ |
D | wm8505fb_regs.h | 15 * Color space select register, default value 0x1c 22 #define WMT_GOVR_COLORSPACE 0x1e4 28 #define WMT_GOVR_COLORSPACE1 0x30 30 #define WMT_GOVR_CONTRAST 0x1b8 31 #define WMT_GOVR_BRGHTNESS 0x1bc /* incompatible with RGB? */ 34 #define WMT_GOVR_FBADDR 0x90 35 #define WMT_GOVR_FBADDR1 0x94 /* UV offset in YUV mode */ 38 #define WMT_GOVR_XPAN 0xa4 39 #define WMT_GOVR_YPAN 0xa0 41 #define WMT_GOVR_XRES 0x98 [all …]
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/kernel/linux/linux-5.10/include/dt-bindings/clock/ |
D | lpc18xx-ccu.h | 13 #define CLK_APB3_BUS 0x100 14 #define CLK_APB3_I2C1 0x108 15 #define CLK_APB3_DAC 0x110 16 #define CLK_APB3_ADC0 0x118 17 #define CLK_APB3_ADC1 0x120 18 #define CLK_APB3_CAN0 0x128 19 #define CLK_APB1_BUS 0x200 20 #define CLK_APB1_MOTOCON_PWM 0x208 21 #define CLK_APB1_I2C0 0x210 22 #define CLK_APB1_I2S 0x218 [all …]
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/kernel/linux/linux-5.10/drivers/media/rc/keymaps/ |
D | rc-x96max.c | 13 { 0x140, KEY_POWER }, 22 { 0x118, KEY_VOLUMEUP }, 23 { 0x110, KEY_VOLUMEDOWN }, 25 { 0x143, KEY_MUTE }, // config 27 { 0x100, KEY_EPG }, // mouse 28 { 0x119, KEY_BACK }, 30 { 0x116, KEY_UP }, 31 { 0x151, KEY_LEFT }, 32 { 0x150, KEY_RIGHT }, 33 { 0x11a, KEY_DOWN }, [all …]
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