| /kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-h5-cpu-opp.dtsi | 12 clock-latency-ns = <244144>; /* 8 32k periods */
18 clock-latency-ns = <244144>; /* 8 32k periods */
24 clock-latency-ns = <244144>; /* 8 32k periods */
30 clock-latency-ns = <244144>; /* 8 32k periods */
36 clock-latency-ns = <244144>; /* 8 32k periods */
42 clock-latency-ns = <244144>; /* 8 32k periods */
48 clock-latency-ns = <244144>; /* 8 32k periods */
54 clock-latency-ns = <244144>; /* 8 32k periods */
60 clock-latency-ns = <244144>; /* 8 32k periods */
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| D | sun50i-a64-cpu-opp.dtsi | 14 clock-latency-ns = <244144>; /* 8 32k periods */
20 clock-latency-ns = <244144>; /* 8 32k periods */
26 clock-latency-ns = <244144>; /* 8 32k periods */
32 clock-latency-ns = <244144>; /* 8 32k periods */
38 clock-latency-ns = <244144>; /* 8 32k periods */
44 clock-latency-ns = <244144>; /* 8 32k periods */
50 clock-latency-ns = <244144>; /* 8 32k periods */
56 clock-latency-ns = <244144>; /* 8 32k periods */
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| D | sun50i-h6-cpu-opp.dtsi | 12 clock-latency-ns = <244144>; /* 8 32k periods */
21 clock-latency-ns = <244144>; /* 8 32k periods */
30 clock-latency-ns = <244144>; /* 8 32k periods */
39 clock-latency-ns = <244144>; /* 8 32k periods */
48 clock-latency-ns = <244144>; /* 8 32k periods */
57 clock-latency-ns = <244144>; /* 8 32k periods */
66 clock-latency-ns = <244144>; /* 8 32k periods */
75 clock-latency-ns = <244144>; /* 8 32k periods */
84 clock-latency-ns = <244144>; /* 8 32k periods */
93 clock-latency-ns = <244144>; /* 8 32k periods */
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| /kernel/linux/linux-5.10/fs/btrfs/tests/ |
| D | extent-map-tests.c | 41 * extent [0, 16K), followed by another file extent [16K, 20K), two dio reads
42 * are entering btrfs_get_extent() concurrently, t1 is reading [8K, 16K), t2 is
43 * reading [0, 8K)
48 * -> add_extent_mapping(0, 16K)
50 * ->add_extent_mapping(0, 16K)
67 /* Add [0, 16K) */ in test_case_1()
76 test_err("cannot add extent range [0, 16K)"); in test_case_1()
81 /* Add [16K, 20K) following [0, 16K) */ in test_case_1()
97 test_err("cannot add extent range [16K, 20K)"); in test_case_1()
109 /* Add [0, 8K), should return [0, 16K) instead. */ in test_case_1()
[all …]
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| /kernel/linux/linux-5.10/drivers/media/common/b2c2/ |
| D | flexcop-sram.c | 183 * 32K memory chip. If not, the data is read
203 * 32K memory chip. If not, the data is
285 return 32768; /* 32K */
287 return 65536; /* 64K */
289 return 131072; /* 128K */
290 return 32768; /* 32K */
293 /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
294 - for 128K there are 4x32K chips at bank 0,1,2,3.
295 - for 64K there are 2x32K chips at bank 1,2.
296 - for 32K there is one 32K chip at bank 0.
[all …]
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| /kernel/linux/linux-5.10/tools/include/linux/ |
| D | jhash.h | 14 * These are functions for producing 32-bit hashes for hash table lookup.
34 /* __jhash_mix -- mix 3 32-bit values reversibly. */
45 /* __jhash_final - final mixing of 3 32-bit values (a,b,c) into c */
61 * @k: sequence of bytes as key
73 const u8 *k = key; in jhash() local
78 /* All but the last block: affect some 32 bits of (a,b,c) */ in jhash()
80 a += __get_unaligned_cpu32(k); in jhash()
81 b += __get_unaligned_cpu32(k + 4); in jhash()
82 c += __get_unaligned_cpu32(k + 8); in jhash()
85 k += 12; in jhash()
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | jhash.h | 14 * These are functions for producing 32-bit hashes for hash table lookup.
34 /* __jhash_mix -- mix 3 32-bit values reversibly. */
45 /* __jhash_final - final mixing of 3 32-bit values (a,b,c) into c */
61 * @k: sequence of bytes as key
73 const u8 *k = key; in jhash() local
78 /* All but the last block: affect some 32 bits of (a,b,c) */ in jhash()
80 a += __get_unaligned_cpu32(k); in jhash()
81 b += __get_unaligned_cpu32(k + 4); in jhash()
82 c += __get_unaligned_cpu32(k + 8); in jhash()
85 k += 12; in jhash()
[all …]
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| D | zconf.h | 13 that is: 128K for windowBits=15 + 128K for memLevel = 8 (default values)
15 the default memory requirements from 256K to 128K, compile with
20 that is, 32K for windowBits=15 (default value) plus a few kilobytes
35 # define MAX_WBITS 15 /* 32K LZ77 window */
54 typedef unsigned long uLong; /* 32 bits or more */
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ |
| D | key.c | 130 const struct ath_keyval *k, in ath_hw_set_keycache_entry() argument
143 switch (k->kv_type) { in ath_hw_set_keycache_entry()
164 if (k->kv_len < WLAN_KEY_LEN_WEP40) { in ath_hw_set_keycache_entry()
166 k->kv_len); in ath_hw_set_keycache_entry()
169 if (k->kv_len <= WLAN_KEY_LEN_WEP40) in ath_hw_set_keycache_entry()
171 else if (k->kv_len <= WLAN_KEY_LEN_WEP104) in ath_hw_set_keycache_entry()
180 ath_err(common, "cipher %u not supported\n", k->kv_type); in ath_hw_set_keycache_entry()
184 key0 = get_unaligned_le32(k->kv_val + 0); in ath_hw_set_keycache_entry()
185 key1 = get_unaligned_le16(k->kv_val + 4); in ath_hw_set_keycache_entry()
186 key2 = get_unaligned_le32(k->kv_val + 6); in ath_hw_set_keycache_entry()
[all …]
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-renesas-intc-irqpin.c | 36 * SENSE is read-write 32-bit with 2-bits or 4-bits per IRQ (*)
37 * PRIO is read-write 32-bit with 4-bits per IRQ (**)
38 * SOURCE is read-only 32-bit or 8-bit with 1-bit per IRQ (***)
39 * MASK is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
40 * CLEAR is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
147 /* The PRIO register is assumed to be 32-bit with fixed 4-bit fields. */ in intc_irqpin_mask_unmask_prio()
149 int shift = 32 - (irq + 1) * bitfield_width; in intc_irqpin_mask_unmask_prio()
158 /* The SENSE register is assumed to be 32-bit. */ in intc_irqpin_set_sense()
160 int shift = 32 - (irq + 1) * bitfield_width; in intc_irqpin_set_sense()
305 int k; in intc_irqpin_shared_irq_handler() local
[all …]
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| /kernel/linux/linux-5.10/arch/x86/crypto/ |
| D | sha256-avx2-asm.S | 162 addl \disp(%rsp, SRND), h # h = k + w + h # --
176 add h, d # d = k + w + h + d # --
190 vpslld $(32-7), XTMP1, XTMP3
192 add y1, h # h = k + w + h + S0 # --
194 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
198 add y2, h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
210 addl offset(%rsp, SRND), h # h = k + w + h # --
225 add h, d # d = k + w + h + d # --
227 vpslld $(32-18), XTMP1, XTMP1
244 add y1, h # h = k + w + h + S0 # --
[all …]
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| /kernel/linux/linux-5.10/arch/sparc/crypto/ |
| D | camellia_asm.S | 32 .align 32
36 ld [%o0 + 0x00], %f0 ! i0, k[0]
37 ld [%o0 + 0x04], %f1 ! i1, k[1]
38 ld [%o0 + 0x08], %f2 ! i2, k[2]
39 ld [%o0 + 0x0c], %f3 ! i3, k[3]
40 std %f0, [%o1 + 0x00] ! k[0, 1]
42 std %f2, [%o1 + 0x08] ! k[2, 3]
49 std %f0, [%o1 + 0x20] ! k[8, 9]
57 std %f2, [%o1 + 0x28] ! k[10, 11]
89 std %f0, [%o1 + 0x10] ! k[ 4, 5]
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/opp/ |
| D | allwinner,sun50i-h6-operating-points.yaml | 68 clock-latency-ns = <244144>; /* 8 32k periods */
77 clock-latency-ns = <244144>; /* 8 32k periods */
86 clock-latency-ns = <244144>; /* 8 32k periods */
95 clock-latency-ns = <244144>; /* 8 32k periods */
104 clock-latency-ns = <244144>; /* 8 32k periods */
113 clock-latency-ns = <244144>; /* 8 32k periods */
122 clock-latency-ns = <244144>; /* 8 32k periods */
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| /kernel/linux/linux-5.10/arch/m68k/include/uapi/asm/ |
| D | bootinfo-hp300.h | 25 #define HP_320 0 /* 16MHz 68020+HP MMU+16K external cache */
28 #define HP_345 3 /* 50MHz 68030+32K external cache */
29 #define HP_350 4 /* 25MHz 68020+HP MMU+32K external cache */
31 #define HP_370 6 /* 33MHz 68030+64K external cache */
32 #define HP_375 7 /* 50MHz 68030+32K external cache */
36 #define HP_400 10 /* 50MHz 68030+32K external cache */
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ |
| D | ia_css_s3a.host.c | 145 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_ae_dump()
147 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_ae_dump()
149 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_ae_dump()
158 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_awb_dump()
160 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_awb_dump()
162 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_awb_dump()
171 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_af_dump()
173 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_af_dump()
175 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_af_dump()
177 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_af_dump()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireguard/selftest/ |
| D | allowedips.c | 32 if (bits == 32) { in print_node()
112 if (cidr % 32) in horrible_cidr_to_mask()
113 mask.all[cidr / 32] = (__force u32)htonl( in horrible_cidr_to_mask()
114 (0xFFFFFFFFUL << (32 - (cidr % 32))) & 0xFFFFFFFFUL); in horrible_cidr_to_mask()
256 unsigned int i, j, k, mutate_amount, cidr; in randomized_test() local
288 cidr = prandom_u32_max(32) + 1; in randomized_test()
303 mutate_amount = prandom_u32_max(32); in randomized_test()
304 for (k = 0; k < mutate_amount / 8; ++k) in randomized_test()
305 mutate_mask[k] = 0xff; in randomized_test()
306 mutate_mask[k] = 0xff in randomized_test()
[all …]
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| /kernel/linux/linux-5.10/crypto/ |
| D | wp512.c | 31 #define WP256_DIGEST_SIZE 32
34 #define WP512_LENGTHBYTES 32
784 u64 K[8]; /* the round key */ in wp512_process_buffer() local
793 state[0] = block[0] ^ (K[0] = wctx->hash[0]); in wp512_process_buffer()
794 state[1] = block[1] ^ (K[1] = wctx->hash[1]); in wp512_process_buffer()
795 state[2] = block[2] ^ (K[2] = wctx->hash[2]); in wp512_process_buffer()
796 state[3] = block[3] ^ (K[3] = wctx->hash[3]); in wp512_process_buffer()
797 state[4] = block[4] ^ (K[4] = wctx->hash[4]); in wp512_process_buffer()
798 state[5] = block[5] ^ (K[5] = wctx->hash[5]); in wp512_process_buffer()
799 state[6] = block[6] ^ (K[6] = wctx->hash[6]); in wp512_process_buffer()
[all …]
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| /kernel/linux/linux-5.10/lib/ |
| D | test_hash.c | 5 * produce the same thing and, for cases where a k-bit hash
26 /* 32-bit XORSHIFT generator. Seed must not be zero. */
71 int k; in test_int_hash() local
87 /* Test k = 1..32 bits */ in test_int_hash()
88 for (k = 1; k <= 32; k++) { in test_int_hash()
89 u32 const m = ((u32)2 << (k-1)) - 1; /* Low k bits set */ in test_int_hash()
92 hash_or[0][k] |= h1 = hash_32(h0, k); in test_int_hash()
94 pr_err("hash_32(%#x, %d) = %#x > %#x", h0, k, h1, m); in test_int_hash()
98 h2 = hash_32_generic(h0, k); in test_int_hash()
102 " = %#x", h0, k, h1, h2); in test_int_hash()
[all …]
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| /kernel/linux/linux-5.10/include/crypto/ |
| D | twofish.h | 8 #define TF_MAX_KEY_SIZE 32
15 * subkeys, K[0] through K[7]. k holds the remaining, "round" subkeys. Note
16 * that k[i] corresponds to what the Twofish paper calls K[i+8]. */
18 u32 s[4][256], w[8], k[32]; member
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| /kernel/linux/linux-5.10/arch/arm/plat-omap/ |
| D | counter_32k.c | 3 * OMAP 32ksynctimer/counter_32k-related code
22 #include <plat/counter-32k.h>
24 /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
31 * 32KHz clocksource ... always available, on pretty most chips except
47 * 32k sync timer. Convert the cycles elapsed since last read into
71 * omap_init_clocksource_32k - setup and register counter 32k as a
84 * 32k sync Counter IP register offsets vary between the in omap_init_clocksource_32k()
102 ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, in omap_init_clocksource_32k()
103 250, 32, clocksource_mmio_readl_up); in omap_init_clocksource_32k()
105 pr_err("32k_counter: can't register clocksource\n"); in omap_init_clocksource_32k()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | sun8i-a33.dtsi | 56 clock-latency-ns = <244144>; /* 8 32k periods */
62 clock-latency-ns = <244144>; /* 8 32k periods */
68 clock-latency-ns = <244144>; /* 8 32k periods */
74 clock-latency-ns = <244144>; /* 8 32k periods */
80 clock-latency-ns = <244144>; /* 8 32k periods */
86 clock-latency-ns = <244144>; /* 8 32k periods */
92 clock-latency-ns = <244144>; /* 8 32k periods */
98 clock-latency-ns = <244144>; /* 8 32k periods */
104 clock-latency-ns = <244144>; /* 8 32k periods */
110 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | bcache.h | 10 static inline __u64 name(const type *k) \
11 { return (k->field >> offset) & ~(~0ULL << size); } \
13 static inline void SET_##name(type *k, __u64 v) \
15 k->field &= ~(~(~0ULL << size) << offset); \
16 k->field |= (v & ~(~0ULL << size)) << offset; \
26 static inline __u64 name(const struct bkey *k, unsigned int i) \
27 { return (k->ptr[i] >> offset) & ~(~0ULL << size); } \
29 static inline void SET_##name(struct bkey *k, unsigned int i, __u64 v) \
31 k->ptr[i] &= ~(~(~0ULL << size) << offset); \
32 k->ptr[i] |= (v & ~(~0ULL << size)) << offset; \
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/ |
| D | Kconfig | 4 config 32BIT
19 # 32T of address space (2^45), which should ensure a reasonable gap
21 # consume "normal" amounts of address space. Book3S 64 only supports 64K
22 # and 4K page sizes.
23 default 29 if PPC_BOOK3S_64 && PPC_64K_PAGES # 29 = 45 (32T) - 16 (64K)
24 default 33 if PPC_BOOK3S_64 # 33 = 45 (32T) - 12 (4K)
28 # of address space (2^44). Only 4K page sizes are supported.
29 default 32 if 64BIT # 32 = 44 (16T) - 12 (4K)
31 # For 32-bit, use the compat values, as they're the same.
36 default 14 if 64BIT && PPC_64K_PAGES # 14 = 30 (1GB) - 16 (64K)
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/ |
| D | ssfdc.c | 46 1MiB 2MiB 4MiB 8MiB 16MiB 32MiB 64MiB 128MiB
49 NSector 4 8 8 16 16 16 32 32
50 SumSector 2,000 4,000 8,000 16,000 32,000 64,000 128,000 256,000
68 { MiB( 32), 500, 8, 16 },
69 { MiB( 64), 500, 8, 32 },
70 { MiB(128), 500, 16, 32 },
77 int k; in get_chs() local
80 k = 0; in get_chs()
81 while (chs_table[k].size > 0 && size > chs_table[k].size) in get_chs()
82 k++; in get_chs()
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | atomic_ll_sc.h | 29 #define K macro
122 ATOMIC_OPS(and, and, K) in ATOMIC_OPS()
123 ATOMIC_OPS(or, orr, K) in ATOMIC_OPS()
124 ATOMIC_OPS(xor, eor, K) in ATOMIC_OPS()
273 if (sz < 32) \
296 * handle the 'K' constraint for the value 4294967295 - thus we use no
297 * constraint for 32 bit operations.
299 __CMPXCHG_CASE(w, b, , 8, , , , , K)
300 __CMPXCHG_CASE(w, h, , 16, , , , , K)
301 __CMPXCHG_CASE(w, , , 32, , , , , K)
[all …]
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