Searched +full:dsp +full:- +full:uart1 +full:- +full:tx (Results 1 – 23 of 23) sorted by relevance
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of various 26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt 29 [3] include/dt-bindings/pinctrl/lochnagar.h 37 - cirrus,lochnagar-pinctrl 39 gpio-controller: true 41 '#gpio-cells': [all …]
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/kernel/linux/linux-5.10/arch/arm/boot/dts/ |
D | omap2.dtsi | 4 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 11 #include <dt-bindings/bus/ti-sysc.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/omap.h> 18 interrupt-parent = <&intc>; 19 #address-cells = <1>; 20 #size-cells = <1>; 24 serial0 = &uart1; 32 #address-cells = <0>; [all …]
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D | omap3.dtsi | 4 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 11 #include <dt-bindings/bus/ti-sysc.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/omap.h> 18 interrupt-parent = <&intc>; 19 #address-cells = <1>; 20 #size-cells = <1>; 30 serial0 = &uart1; 36 #address-cells = <1>; [all …]
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D | dra7-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include "dra74-ipu-dsp-common.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/clock/ti-dra7-atl.h> 9 #include <dt-bindings/input/input.h> 13 stdout-path = &uart1; 17 compatible = "linux,extcon-usb-gpio"; 18 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 22 compatible = "linux,extcon-usb-gpio"; [all …]
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D | prima2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 #address-cells = <1>; 11 #size-cells = <1>; 12 interrupt-parent = <&intc>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a9"; 22 d-cache-line-size = <32>; 23 i-cache-line-size = <32>; 24 d-cache-size = <32768>; [all …]
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D | atlas6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 #address-cells = <1>; 11 #size-cells = <1>; 12 interrupt-parent = <&intc>; 15 #address-cells = <1>; 16 #size-cells = <0>; 20 d-cache-line-size = <32>; 21 i-cache-line-size = <32>; 22 d-cache-size = <32768>; 23 i-cache-size = <32768>; [all …]
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D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 23 serial1 = &uart1; 32 #address-cells = <1>; [all …]
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D | dm816x.dtsi | 7 #include <dt-bindings/bus/ti-sysc.h> 8 #include <dt-bindings/clock/dm816.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/omap.h> 14 interrupt-parent = <&intc>; 15 #address-cells = <1>; 16 #size-cells = <1>; 22 serial0 = &uart1; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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D | dra72-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-ipu-dsp-common.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/clock/ti-dra7-atl.h> 13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; 20 stdout-path = &uart1; 23 evm_12v0: fixedregulator-evm12v0 { 25 compatible = "regulator-fixed"; [all …]
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D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/omap.h> 12 #include <dt-bindings/clock/omap5.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 19 interrupt-parent = <&wakeupgen>; [all …]
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D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/bus/ti-sysc.h> 7 #include <dt-bindings/clock/omap4.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/omap.h> 11 #include <dt-bindings/clock/omap4.h> 15 interrupt-parent = <&wakeupgen>; 16 #address-cells = <1>; [all …]
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D | am5729-beagleboneai.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/ 6 /dts-v1/; 9 #include "am57xx-commercial-grade.dtsi" 10 #include "dra74x-mmc-iodelay.dtsi" 11 #include "dra74-ipu-dsp-common.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/dra.h> 18 compatible = "beagle,am5729-beagleboneai", "ti,am5728", [all …]
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D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 interrupt-parent = <&crossbar_mpu>; [all …]
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D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "ti,omap4-l4-cfg", "simple-bus"; 7 reg-names = "ap", "la", "ia0"; 8 #address-cells = <1>; 9 #size-cells = <1>; 19 compatible = "simple-bus"; 20 #address-cells = <1>; 21 #size-cells = <1>; 44 target-module@2000 { /* 0x4a002000, ap 3 06.0 */ 45 compatible = "ti,sysc-omap4", "ti,sysc"; [all …]
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D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-bus"; 6 reg-names = "ap", "la", "ia0"; 7 #address-cells = <1>; 8 #size-cells = <1>; 18 compatible = "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 52 target-module@2000 { /* 0x4a002000, ap 3 44.0 */ 53 compatible = "ti,sysc-omap4", "ti,sysc"; 55 reg-names = "rev"; [all …]
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
D | ti-dma-crossbar.txt | 4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar 5 "ti,am335x-edma-crossbar" for AM335x and AM437x 6 - reg: Memory map for accessing module 7 - #dma-cells: Should be set to to match with the DMA controller's dma-cells 8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar. 9 - dma-requests: Number of DMA requests the crossbar can receive 10 - dma-masters: phandle pointing to the DMA controller 13 - dma-requests: Number of DMA requests the controller can handle 16 - ti,dma-safe-map: Safe routing value for unused request lines 17 - ti,reserved-dma-request-ranges: DMA request ranges which should not be used [all …]
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/kernel/linux/linux-5.10/drivers/pinctrl/cirrus/ |
D | pinctrl-lochnagar.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2017-2018 Cirrus Logic, Inc. and 21 #include <linux/pinctrl/pinconf-generic.h> 27 #include <dt-bindings/pinctrl/lochnagar.h> 29 #include "../pinctrl-utils.h" 33 #define LN_CDC_AIF1_STR "codec-aif1" 34 #define LN_CDC_AIF2_STR "codec-aif2" 35 #define LN_CDC_AIF3_STR "codec-aif3" 36 #define LN_DSP_AIF1_STR "dsp-aif1" 37 #define LN_DSP_AIF2_STR "dsp-aif2" [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
D | dm644x.c | 12 #include <linux/clk-provider.h> 18 #include <linux/irqchip/irq-davinci-aintc.h> 20 #include <linux/platform_data/gpio-davinci.h> 31 #include <clocksource/timer-davinci.h> 61 .end = DM644X_EMAC_BASE + SZ_16K - 1, 84 .end = DM644X_EMAC_MDIO_BASE + SZ_4K - 1, 123 MUX_CFG(DM644X, UART1, 1, 1, 1, 1, true) 152 /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ 188 [IRQ_TINT1_TINT12] = 7, /* DSP timer */ 220 /*----------------------------------------------------------------------*/ [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-omap1/ |
D | board-osk.c | 2 * linux/arch/arm/mach-omap1/board-osk.c 43 #include <linux/platform_data/gpio-omap.h> 46 #include <asm/mach-types.h> 60 #define OMAP_GPIO_LABEL "gpio-0-15" 66 * alternate pin configurations for hardware-controlled blinking. 77 /* bootloader (U-Boot, etc) in first sector */ 82 .mask_flags = MTD_WRITEABLE, /* force read-only */ 116 .name = "physmap-flash", 144 .id = -1, 160 .id = -1, [all …]
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
D | 0001_linux_arch.patch | 7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954 9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig 11 --- a/arch/arm64/Kconfig 13 @@ -183,7 +183,6 @@ config ARM64 17 - select HOLES_IN_ZONE 21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK 31 @@ -1148,7 +1150,7 @@ config XEN 35 - int 40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0 44 -config MITIGATE_SPECTRE_BRANCH_HISTORY [all …]
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> 16 #include <dt-bindings/interconnect/qcom,sdm845.h> [all …]
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/kernel/linux/patches/linux-4.19/hispark_taurus_patch/ |
D | hispark_taurus.patch | 1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig 3 --- a/arch/arm/Kconfig 5 @@ -330,7 +330,7 @@ config ARCH_MULTIPLATFORM 9 - select AUTO_ZRELADDR 14 @@ -751,6 +751,8 @@ source "arch/arm/mach-highbank/Kconfig" 16 source "arch/arm/mach-hisi/Kconfig" 18 +source "arch/arm/mach-hibvt/Kconfig" 20 source "arch/arm/mach-imx/Kconfig" 22 source "arch/arm/mach-integrator/Kconfig" 23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile [all …]
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/kernel/linux/patches/linux-5.10/yangfan_patch/ |
D | drivers.patch | 6 Change-Id: I9825adaa8537a316db8a1831e759a74223b9e428 7 --- 9 drivers/block/nbd.c | 6 - 12 drivers/clk/clk.c | 2 +- 13 drivers/clk/rockchip/Kconfig | 42 +- 15 drivers/clk/rockchip/clk-cpu.c | 92 +- 16 drivers/clk/rockchip/clk-ddr.c | 171 +- 17 drivers/clk/rockchip/clk-half-divider.c | 35 +- 18 drivers/clk/rockchip/clk-pll.c | 779 ++- 19 drivers/clk/rockchip/clk-rk3399.c | 589 +- [all …]
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