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/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mq-pinfunc.h"
[all …]
Dimx8mq-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
9 #include "imx8mq.dtsi"
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
[all …]
Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
8 #include "imx8mq.dtsi"
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
Dimx8mq-nitrogen.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "imx8mq.dtsi"
13 compatible = "boundary,imx8mq-nitrogen8m", "fsl,imx8mq";
16 stdout-path = "serial0:115200n8";
24 gpio-keys {
25 compatible = "gpio-keys";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_gpio_keys>;
[all …]
Dimx8mq-hummingboard-pulse.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 /dts-v1/;
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
16 stdout-path = &uart1;
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed";
21 pinctrl-names = "default";
[all …]
Dimx8mq-thor96.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mq.dtsi"
13 compatible = "einfochips,imx8mq-thor96", "fsl,imx8mq";
16 stdout-path = &uart1;
25 compatible = "gpio-leds";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_leds>;
29 user-led1 {
32 linux,default-trigger = "heartbeat";
[all …]
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mm-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
11 #include "imx8mq.dtsi"
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
[all …]
Dimx8mq-sr-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 #include "imx8mq.dtsi"
9 reg_vdd_3v3: regulator-vdd-3v3 {
10 compatible = "regulator-fixed";
11 regulator-always-on;
12 regulator-name = "vdd_3v3";
13 regulator-min-microvolt = <3300000>;
14 regulator-max-microvolt = <3300000>;
19 pinctrl-names = "default";
[all …]
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mn-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
12 #include "imx8mq.dtsi"
16 compatible = "purism,librem5-devkit", "fsl,imx8mq";
18 backlight_dsi: backlight-dsi {
[all …]
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
12 #include "imx8mq.dtsi"
16 compatible = "purism,librem5", "fsl,imx8mq";
18 backlight_dsi: backlight-dsi {
[all …]
Dimx8mq-zii-ultra.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mq.dtsi"
10 mdio-gpio0 = &mdio0;
15 stdout-path = &uart1;
18 mdio0: bitbang-mdio {
19 compatible = "virtual,mdio-gpio";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_mdio_bitbang>, <&pinctrl_fec1_phy_reset>;
24 #address-cells = <1>;
25 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dfsl,imx7-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX7 System Reset Controller
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The system reset controller can be used to reset various set of
14 peripherals. Device nodes that need access to reset lines should
15 specify them as a reset phandle in their corresponding node as
16 specified in reset.txt.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dnwl-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
7 - compatible:
8 - "fsl,imx6q-pcie"
9 - "fsl,imx6sx-pcie",
10 - "fsl,imx6qp-pcie"
11 - "fsl,imx7d-pcie"
12 - "fsl,imx8mq-pcie"
13 - reg: base address and length of the PCIe controller
14 - interrupts: A list of interrupt outputs of the controller. Must contain an
15 entry for each entry in the interrupt-names property.
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/dwc/
Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
31 #include <linux/reset.h>
35 #include "pcie-designware.h"
43 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
50 IMX8MQ, enumerator
96 /* PCIe Port Logic registers (memory-mapped) */
109 /* PHY registers (not memory-mapped) */
146 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
21 IP cores belonging to a power domain should contain a 'power-domains'
27 - fsl,imx7d-gpc
28 - fsl,imx8mq-gpc
36 interrupt-controller: true
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dfsl-imx-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: "watchdog.yaml#"
18 - const: fsl,imx21-wdt
19 - items:
20 - enum:
21 - fsl,imx8mm-wdt
[all …]
/kernel/linux/linux-5.10/drivers/reset/
Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
[all …]
/kernel/linux/linux-5.10/drivers/soc/imx/
Dgpcv2.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
18 #include <dt-bindings/power/imx7-power.h>
19 #include <dt-bindings/power/imx8mq-power.h>
139 const bool has_regulator = !IS_ERR(domain->regulator); in imx_gpc_pu_pgc_sw_pxx_req()
143 regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, in imx_gpc_pu_pgc_sw_pxx_req()
144 domain->bits.map, domain->bits.map); in imx_gpc_pu_pgc_sw_pxx_req()
147 ret = regulator_enable(domain->regulator); in imx_gpc_pu_pgc_sw_pxx_req()
149 dev_err(domain->dev, "failed to enable regulator\n"); in imx_gpc_pu_pgc_sw_pxx_req()
154 /* Enable reset clocks for all devices in the domain */ in imx_gpc_pu_pgc_sw_pxx_req()
[all …]
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0032_linux_drivers_regulator_remoteproc_reset_rpmsg_rtc.patch7 Change-Id: I70798f1381ce7dac1b89f11aa3a0c5633845487e
9 diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
11 --- a/drivers/regulator/core.c
13 @@ -3499,6 +3499,16 @@ static int _regulator_do_set_suspend_voltage(struct regulator_dev *rdev,
21 + if (rdev->desc->ops->get_bypass)
22 + rdev->desc->ops->get_bypass(rdev, &bypassed);
30 @@ -3568,8 +3578,9 @@ int regulator_set_voltage_rdev(struct regulator_dev *rdev, int min_uV,
31 if (rdev->supply &&
32 regulator_ops_is_valid(rdev->supply->rdev,
34 - (rdev->desc->min_dropout_uV || !(rdev->desc->ops->get_voltage ||
[all …]
D0030_linux_drivers_pci_misc_nvmem_of_mtd_mmc.patch7 Change-Id: Iec160bd007994d82f416debdccfbc0d9bdb40470
9 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
11 --- a/drivers/misc/Kconfig
13 @@ -314,6 +314,26 @@ config ISL29020
40 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
42 --- a/drivers/misc/Makefile
44 @@ -19,6 +19,8 @@ obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o
45 obj-$(CONFIG_PHANTOM) += phantom.o
46 obj-$(CONFIG_QCOM_COINCELL) += qcom-coincell.o
47 obj-$(CONFIG_QCOM_FASTRPC) += fastrpc.o
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dnwl-dsi.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/reset.h>
33 #include "nwl-dsi.h"
35 #define DRV_NAME "nwl-dsi"
83 * The DSI host controller needs this reset sequence according to NWL:
84 * 1. Deassert pclk reset to get access to DSI regs
88 * 5. Deassert DPI reset so DPI receives pixels and starts sending
106 * hardware bug: the i.MX8MQ needs this clock on during reset
136 int ret = dsi->error; in nwl_dsi_clear_error()
138 dsi->error = 0; in nwl_dsi_clear_error()
[all …]

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