memcpy memset __aeabi_unwind_cpp_pr0 __stack_chk_fail __stack_chk_guard drv_vpss_process drv_vpss_register_func drv_vpss_un_register_func g_vpss_acquire_frame g_vpss_dequeue_frame g_vpss_ext_mutex g_vpss_queue_frame g_vpss_release_frame hi_drv_vpss_acquire_frame hi_drv_vpss_create_port hi_drv_vpss_create_vpss hi_drv_vpss_deinit hi_drv_vpss_dequeue_frame hi_drv_vpss_destroy_port hi_drv_vpss_destroy_vpss hi_drv_vpss_enable_port hi_drv_vpss_get_default_cfg hi_drv_vpss_get_default_port_cfg hi_drv_vpss_get_handle hi_drv_vpss_get_port_cfg hi_drv_vpss_get_vpss_cfg hi_drv_vpss_init hi_drv_vpss_queue_frame hi_drv_vpss_regist_hook hi_drv_vpss_release_frame hi_drv_vpss_send_command hi_drv_vpss_set_port_cfg hi_drv_vpss_set_vpss_cfg hi_log_out osal_exportfunc_register osal_exportfunc_unregister vpss_comm_destory_mutex vpss_comm_down_mutex vpss_comm_init_mutex vpss_comm_up_mutex vpss_intf_process_cmd g_vpss_mutex osal_dev_register osal_dev_unregister printf snprintf_s strlen vpss_ctrl_acquire_frame vpss_ctrl_create_instance vpss_ctrl_create_port vpss_ctrl_deinit vpss_ctrl_dequeue_frame vpss_ctrl_destory_instance vpss_ctrl_destroy_port vpss_ctrl_dev_resume vpss_ctrl_dev_suspend vpss_ctrl_enable_port vpss_ctrl_get_default_cfg vpss_ctrl_get_default_port_cfg vpss_ctrl_get_handle vpss_ctrl_get_port_cfg vpss_ctrl_get_vpss_cfg vpss_ctrl_init vpss_ctrl_init_context vpss_ctrl_queue_frame vpss_ctrl_queue_task_frame vpss_ctrl_regist_hook vpss_ctrl_release_frame vpss_ctrl_send_command vpss_ctrl_set_port_cfg vpss_ctrl_set_vpss_cfg vpss_drv_mod_exit vpss_drv_mod_init vpss_intf_close vpss_intf_lowpower_resume vpss_intf_lowpower_suspend vpss_intf_open vpss_intf_resume vpss_intf_suspend __aeabi_unwind_cpp_pr1 alloc_port_id dump_logic_channel_config_info free_all_reg_buffer free_all_split_node_buffer get_in_rect_interlace get_rd_mode_interlace get_reg_interlace get_safe_mode get_sec_page_table_addr hi_drv_mmz_alloc hi_drv_mmz_flush hi_drv_mmz_map_cache hi_drv_mmz_release hi_drv_mmz_unmap_and_release hi_drv_sys_get_hw_buff_io_map_base_addr memcpy_s memset_s move_loading_buffer osal_ioremap_nocache osal_iounmap osal_vfree osal_vmalloc process_smmu_state set_algorithm_channel_interlace set_algorithm_channel_prog set_algorithm_disable set_buffer_split set_cccl_channel set_cccl_cyc_buffer set_cyc_buffer_interlace set_cyc_buffer_prog set_dei_channel set_dei_cyc_buffer set_dm_cyc_buffer set_first_frame_cfg set_global_stt_cyc_buffer set_interlace_node_cfg set_mirror_node set_prog_node_cfg set_reg_interlace set_rgme_channel set_rgme_cyc_buffer set_rotate_node set_rotate_out_cfg set_snr_channel set_test_pattern set_tnr_channel set_tnr_cyc_buffer set_tunl_cfg set_tunl_mode_interlace set_tunl_mode_prog vpss_comm_allocate_smmu_mem vpss_comm_free_smmu_mem vpss_comm_get_page_table_addr vpss_crg_set_clock_en vpss_hal_calc_split_width vpss_hal_clear_int_state vpss_hal_clear_smmu_int_state vpss_hal_clear_task_reset vpss_hal_complete_logic vpss_hal_deinit vpss_hal_dump_reg vpss_hal_get_cmp_size vpss_hal_get_int_state vpss_hal_get_lbd_info vpss_hal_get_reg_vir_addr vpss_hal_get_rgmv_addr vpss_hal_get_smmu_int_state vpss_hal_golden_write_chn_file vpss_hal_hwbuff_cfg vpss_hal_hwbuff_init_cfg vpss_hal_hwbuff_modify vpss_hal_hwbuff_queue_rst vpss_hal_hwbuff_reset vpss_hal_hwbuff_send_en vpss_hal_hwbuff_update vpss_hal_init vpss_hal_init_hal_info vpss_hal_logic_cfg_limit vpss_hal_modify_complete vpss_hal_process_dcmp_interrupt vpss_hal_process_interrupt vpss_hal_set_clock vpss_hal_set_first_node vpss_hal_set_node_info vpss_hal_set_other_node vpss_hal_smmu_de_init vpss_hal_smmu_init vpss_hal_start_logic vpss_mac_get_prot vpss_mac_init_rchn_cfg vpss_mac_init_wchn_cfg vpss_mac_set_prot vpss_mac_set_rchn_cfg vpss_mac_set_reg_load vpss_mac_set_wchn_cfg vpss_master_set_mstr0_routstanding vpss_master_set_mstr0_woutstanding vpss_mmu_get_err_ns_rd_addr vpss_mmu_get_err_ns_wr_addr vpss_mmu_get_err_s_rd_addr vpss_mmu_get_err_s_wr_addr vpss_mmu_set_auto_clk_gt_en vpss_mmu_set_cb_ttbr vpss_mmu_set_cb_ttbr_h vpss_mmu_set_com_clk_gt_en vpss_mmu_set_err_ns_rd_addr vpss_mmu_set_err_ns_rd_addr_h vpss_mmu_set_err_ns_wr_addr vpss_mmu_set_err_ns_wr_addr_h vpss_mmu_set_err_s_rd_addr vpss_mmu_set_err_s_rd_addr_h vpss_mmu_set_err_s_wr_addr vpss_mmu_set_err_s_wr_addr_h vpss_mmu_set_glb_bypass vpss_mmu_set_int_en vpss_mmu_set_ints_clr vpss_mmu_set_mst_clk_gt_en vpss_mmu_set_ptw_pf vpss_mmu_set_scb_ttbr vpss_mmu_set_scb_ttbr_h vpss_rchn_set_hor_offset vpss_rchn_set_lm_rmode vpss_rchn_set_ver_offset vpss_reg_set_rotate_cfg vpss_set_split_node_pq_cfg vpss_snr_set_valid_area_width0 vpss_soft_reset vpss_sys_get_rgmv_addr vpss_sys_set_axi_ck_gt_en vpss_sys_set_btmode vpss_sys_set_bufblk0_width vpss_sys_set_bufblk1_width vpss_sys_set_bufblk2_width vpss_sys_set_bufblk3_width vpss_sys_set_bufcc_c_end_addr vpss_sys_set_bufcc_c_start_addr vpss_sys_set_bufcc_c_stride vpss_sys_set_bufcc_ccnt_cycbuf_en vpss_sys_set_bufcc_ccnt_end_addr vpss_sys_set_bufcc_ccnt_start_addr vpss_sys_set_bufcc_ccnt_stride vpss_sys_set_bufcc_cycbuf_en vpss_sys_set_bufcc_y_end_addr vpss_sys_set_bufcc_y_start_addr vpss_sys_set_bufcc_y_stride vpss_sys_set_bufcc_ycnt_cycbuf_en vpss_sys_set_bufcc_ycnt_end_addr vpss_sys_set_bufcc_ycnt_start_addr vpss_sys_set_bufcc_ycnt_stride vpss_sys_set_bufdi_blkmt_cycbuf_en vpss_sys_set_bufdi_blkmt_end_addr vpss_sys_set_bufdi_blkmt_start_addr vpss_sys_set_bufdi_blkmt_stride vpss_sys_set_bufdi_blkmv_cycbuf_en vpss_sys_set_bufdi_blkmv_end_addr vpss_sys_set_bufdi_blkmv_start_addr vpss_sys_set_bufdi_blkmv_stride vpss_sys_set_bufdi_c_end_addr vpss_sys_set_bufdi_c_start_addr vpss_sys_set_bufdi_c_stride vpss_sys_set_bufdi_cycbuf_en vpss_sys_set_bufdi_hismt_cycbuf_en vpss_sys_set_bufdi_hismt_end_addr vpss_sys_set_bufdi_hismt_start_addr vpss_sys_set_bufdi_hismt_stride vpss_sys_set_bufdi_stcnt_cycbuf_en vpss_sys_set_bufdi_stcnt_end_addr vpss_sys_set_bufdi_stcnt_start_addr vpss_sys_set_bufdi_stcnt_stride vpss_sys_set_bufdi_y_end_addr vpss_sys_set_bufdi_y_start_addr vpss_sys_set_bufdi_y_stride vpss_sys_set_bufdm_cnt_cycbuf_en vpss_sys_set_bufdm_cnt_end_addr vpss_sys_set_bufdm_cnt_start_addr vpss_sys_set_bufdm_cnt_stride vpss_sys_set_bufnr_mad_cycbuf_en vpss_sys_set_bufnr_mad_end_addr vpss_sys_set_bufnr_mad_start_addr vpss_sys_set_bufnr_mad_stride vpss_sys_set_bufp_cycbuf_addr vpss_sys_set_bufp_cycbuf_waddr vpss_sys_set_bufref_c_end_addr vpss_sys_set_bufref_c_start_addr vpss_sys_set_bufref_c_stride vpss_sys_set_bufref_cycbuf_en vpss_sys_set_bufref_y_end_addr vpss_sys_set_bufref_y_start_addr vpss_sys_set_bufref_y_stride vpss_sys_set_bufrg_prjh_cycbuf_en vpss_sys_set_bufrg_prjh_end_addr vpss_sys_set_bufrg_prjh_start_addr vpss_sys_set_bufrg_prjh_stride vpss_sys_set_bufrg_prjv_cycbuf_en vpss_sys_set_bufrg_prjv_end_addr vpss_sys_set_bufrg_prjv_start_addr vpss_sys_set_bufrg_prjv_stride vpss_sys_set_bufrg_rgmv_cycbuf_en vpss_sys_set_bufrg_rgmv_end_addr vpss_sys_set_bufrg_rgmv_start_addr vpss_sys_set_bufrg_rgmv_stride vpss_sys_set_bufsplit_en vpss_sys_set_bufsplit_mode vpss_sys_set_bufsplit_num vpss_sys_set_cccl_en vpss_sys_set_cf_test_pattern_angle vpss_sys_set_cf_test_pattern_color vpss_sys_set_cf_test_pattern_en vpss_sys_set_cf_test_pattern_width vpss_sys_set_cfg_ck_gt_en vpss_sys_set_ck_gt_en vpss_sys_set_clk_gt_en vpss_sys_set_dbd_en vpss_sys_set_dei_en vpss_sys_set_dei_switch vpss_sys_set_dsd_en vpss_sys_set_first_frame vpss_sys_set_fod_en vpss_sys_set_igbm_en vpss_sys_set_in_rtunl_en vpss_sys_set_in_tunl_init vpss_sys_set_in_tunl_write vpss_sys_set_in_wtunl_en vpss_sys_set_int_mask vpss_sys_set_mcdi_en vpss_sys_set_mcnr_en vpss_sys_set_meds_en vpss_sys_set_node_rst_en vpss_sys_set_out_rtunl_en vpss_sys_set_out_test_pattern_angle vpss_sys_set_out_test_pattern_color vpss_sys_set_out_test_pattern_en vpss_sys_set_out_test_pattern_width vpss_sys_set_out_tunl_init vpss_sys_set_out_tunl_write vpss_sys_set_out_wtunl_en vpss_sys_set_p_next vpss_sys_set_ppc_ck_gt_en vpss_sys_set_rgme_en vpss_sys_set_rotate_en vpss_sys_set_scd_en vpss_sys_set_snr_en vpss_sys_set_snr_mad_copy_en vpss_sys_set_snr_mad_sel vpss_sys_set_snr_no_ptemp vpss_sys_set_stt_r_addr vpss_sys_set_stt_w_addr vpss_sys_set_tnr_en vpss_sys_set_tnr_mad_mode vpss_sys_set_tunl_en vpss_sys_set_tunl_mode vpss_sys_set_vc1_en vpss_sys_set_vpss_start vpss_sys_setcf_field_420_copy_en vpss_sys_setout_crop_en vpss_vc1_set_vc1_mapc vpss_vc1_set_vc1_mapcflg vpss_vc1_set_vc1_mapy vpss_vc1_set_vc1_mapyflg vpss_vc1_set_vc1_profile vpss_vc1_set_vc1_rangedfrm vpss_wchn_set_lm_rmode vpss_hal_hwbuff_warn_det vpss_reg_reg_read vpss_reg_reg_write check_set_rchn_cfg g_pq_para g_pst_reg_crg g_vpss_rchn_addr g_vpss_wchn_addr osal_udelay vpss_calu_dei_split_else_pos vpss_calu_dei_split_pos vpss_crg_cken vpss_dei_set_c0_mc0 vpss_dei_set_c1_mc0 vpss_dei_set_dei_demo_border0 vpss_dei_set_dei_demo_en0 vpss_dei_set_dei_demo_mode_l0 vpss_dei_set_dei_demo_mode_r0 vpss_dei_set_mc_col_end00 vpss_dei_set_mc_col_end10 vpss_dei_set_mc_col_start00 vpss_dei_set_mc_col_start10 vpss_dei_set_mc_row_end10 vpss_dei_set_mcendc0 vpss_dei_set_mcstartc0 vpss_get_rchn_class_type vpss_get_wchn_class_type vpss_mac_set_img_pro_mode vpss_mac_set_rchn_pixchn_cfg vpss_mac_set_rchn_solochn_cfg vpss_mac_set_wchn_pixchn_cfg vpss_mac_set_wchn_solochn_cfg vpss_mmu_get_intns_stat vpss_mmu_get_ints_stat vpss_mmu_set_intns_clr vpss_rchn_set2b_bypass vpss_rchn_set_bitw vpss_rchn_set_c2b_addr_h vpss_rchn_set_c2b_addr_l vpss_rchn_set_c2b_stride vpss_rchn_set_c_addr_h vpss_rchn_set_c_addr_l vpss_rchn_set_c_mute_val vpss_rchn_set_c_stride vpss_rchn_set_cr_addr_h vpss_rchn_set_cr_addr_l vpss_rchn_set_d_bypass vpss_rchn_set_en vpss_rchn_set_en1 vpss_rchn_set_flip vpss_rchn_set_format vpss_rchn_set_h_bypass vpss_rchn_set_height vpss_rchn_set_mirror vpss_rchn_set_mute_en vpss_rchn_set_mute_mode vpss_rchn_set_order vpss_rchn_set_tunl_en vpss_rchn_set_type vpss_rchn_set_uv_invert vpss_rchn_set_width vpss_rchn_set_y2b_addr_l vpss_rchn_set_y2b_stride vpss_rchn_set_y_addr_h vpss_rchn_set_y_addr_l vpss_rchn_set_y_head_stride vpss_rchn_set_y_mute_val vpss_rchn_set_y_stride vpss_rchn_solo_set_addr_h vpss_rchn_solo_set_addr_l vpss_rchn_solo_set_d_bypass vpss_rchn_solo_set_en vpss_rchn_solo_set_en1 vpss_rchn_solo_set_flip vpss_rchn_solo_set_height vpss_rchn_solo_set_mirror vpss_rchn_solo_set_mute_en vpss_rchn_solo_set_mute_mode vpss_rchn_solo_set_mute_val0 vpss_rchn_solo_set_mute_val1 vpss_rchn_solo_set_stride vpss_rchn_solo_set_tunle_en vpss_rchn_solo_set_width vpss_set_split_node_pq_block_cfg vpss_set_split_node_pq_dei_cfg vpss_set_split_node_pq_demo_cfg vpss_set_split_node_pq_get_para vpss_set_split_node_pq_maket_cfg vpss_set_split_node_pq_mark_cfg vpss_set_split_node_pq_snr_cfg vpss_snr_set_demo_en0 vpss_snr_set_demo_mod0 vpss_snr_set_demo_wx0 vpss_snr_set_valid_area_offset0 vpss_snr_set_valid_area_overlap0 vpss_sys_get_int_state vpss_sys_set_int_clr vpss_sys_set_mask0 vpss_sys_set_mask1 vpss_sys_set_mask2 vpss_sys_set_mask3 vpss_sys_set_mask4 vpss_sys_set_mask5 vpss_sys_set_mask6 vpss_sys_set_mask7 vpss_sys_set_rotate_angle vpss_tnr_set_market_coor0 vpss_tnr_set_market_mode0 vpss_tnr_set_market_mode_en0 vpss_wchn_env_set_finfo_h vpss_wchn_env_set_finfo_l vpss_wchn_env_set_format vpss_wchn_env_set_height vpss_wchn_env_set_width vpss_wchn_set_bitw vpss_wchn_set_c_addr_h vpss_wchn_set_c_addr_l vpss_wchn_set_c_mute_val vpss_wchn_set_c_stride vpss_wchn_set_cts_bit_sel vpss_wchn_set_cts_en vpss_wchn_set_d_bypass vpss_wchn_set_dither_en vpss_wchn_set_dither_mode vpss_wchn_set_en vpss_wchn_set_flip vpss_wchn_set_h_bypass vpss_wchn_set_hor_offset vpss_wchn_set_mirror vpss_wchn_set_mute_en vpss_wchn_set_mute_mode vpss_wchn_set_tunl_en vpss_wchn_set_type vpss_wchn_set_uv_invert vpss_wchn_set_ver_offset vpss_wchn_set_y_addr_h vpss_wchn_set_y_addr_l vpss_wchn_set_y_mute_val vpss_wchn_set_y_stride vpss_wchn_solo_env_set_height vpss_wchn_solo_env_set_width vpss_wchn_solo_set_addr_h vpss_wchn_solo_set_addr_l vpss_wchn_solo_set_d_bypass vpss_wchn_solo_set_en vpss_wchn_solo_set_flip vpss_wchn_solo_set_mirror vpss_wchn_solo_set_mute_en vpss_wchn_solo_set_mute_mode vpss_wchn_solo_set_mute_val0 vpss_wchn_solo_set_mute_val1 vpss_wchn_solo_set_stride vpss_wchn_solo_set_tunl_en copy_vpssreg_to_cfginfo vpss_dei_config_check vpss_get_cfg_info vpss_ip_config_check vpss_mac_config_chan_check vpss_mac_config_check vpss_mac_config_comm_check vpss_mac_config_hight_check vpss_mac_config_stride_check vpss_snr_config_check vpss_sys_apb_config_check vpss_sys_config_check vpss_sys_config_rotation_check vpss_tnr_config_check vpss_correct_prog_by_width_height vpss_policy_cal_buff_width_height vpss_policy_calc_crop_rect vpss_policy_check_crop_rect vpss_policy_check_dei_need_drop vpss_policy_check_frame_cmp_fmt vpss_policy_check_need_trans vpss_policy_check_special_field vpss_policy_check_support_virtual_port vpss_policy_check_use_pq vpss_policy_correct_rotation_port_format vpss_policy_fill_hal_input_flip vpss_policy_fill_out_frame_attr_pixformat vpss_policy_frame_buff_height vpss_policy_get_data_fmt vpss_policy_get_nr_frf_fmt vpss_policy_get_port_buf_strategy vpss_policy_get_port_outf_fmt vpss_policy_revise_image vpss_policy_revise_out_format vpss_policy_revise_out_frame_info vpss_policy_revise_rotation_stride vpss_policy_revise_tile_special_filed_info vpss_policy_revise_tran_frame_bitwidth vpss_policy_support_3d_detect vpss_policy_support_3d_process vpss_policy_support_alg vpss_policy_support_alg_chn_cmp vpss_policy_support_cccl_height_and_width vpss_policy_support_crop vpss_policy_support_height_and_width vpss_policy_support_in_fmt vpss_policy_support_lbx vpss_policy_support_out_fmt vpss_policy_support_out_tunnel vpss_policy_support_secure vpss_policy_support_zme vpss_policy_support_zme_upsamp vpss_stt_blkmt_complete vpss_stt_blkmt_deinit vpss_stt_blkmt_get_cfg vpss_stt_blkmt_init vpss_stt_blkmt_reset vpss_stt_blkmv_complete vpss_stt_blkmv_deinit vpss_stt_blkmv_get_cfg vpss_stt_blkmv_init vpss_stt_blkmv_reset vpss_stt_ccclcnt_complete vpss_stt_ccclcnt_deinit vpss_stt_ccclcnt_get_cfg vpss_stt_ccclcnt_init vpss_stt_ccclcnt_reset vpss_stt_complete vpss_stt_cyc_buff_complete vpss_stt_cyc_buff_deinit vpss_stt_cyc_buff_get_info vpss_stt_cyc_buff_init vpss_stt_cyc_buff_reset vpss_stt_de_init vpss_stt_dihismt_complete vpss_stt_dihismt_deinit vpss_stt_dihismt_get_cfg vpss_stt_dihismt_init vpss_stt_dihismt_reset vpss_stt_distcnt_complete vpss_stt_distcnt_deinit vpss_stt_distcnt_get_cfg vpss_stt_distcnt_init vpss_stt_distcnt_reset vpss_stt_dmcnt_complete vpss_stt_dmcnt_deinit vpss_stt_dmcnt_get_cfg vpss_stt_dmcnt_init vpss_stt_dmcnt_reset vpss_stt_fill_stt_info vpss_stt_get_cfg vpss_stt_global_complete vpss_stt_global_deinit vpss_stt_global_get_info vpss_stt_global_init vpss_stt_global_reset vpss_stt_init vpss_stt_nrmad_complete vpss_stt_nrmad_deinit vpss_stt_nrmad_get_cfg vpss_stt_nrmad_init vpss_stt_nrmad_reset vpss_stt_prjh_complete vpss_stt_prjh_deinit vpss_stt_prjh_get_cfg vpss_stt_prjh_init vpss_stt_prjh_reset vpss_stt_prjv_complete vpss_stt_prjv_deinit vpss_stt_prjv_get_cfg vpss_stt_prjv_init vpss_stt_prjv_reset vpss_stt_reset vpss_stt_rgmv_complete vpss_stt_rgmv_deinit vpss_stt_rgmv_get_cfg vpss_stt_rgmv_init vpss_stt_rgmv_reset vpss_comm_allocate_mmz_mem vpss_comm_free_mmz_mem vpss_stt_cal_dihismt_buf_size vpss_stt_cal_distcnt_buf_size vpss_inst_set_hal_frame_info vpss_wbc_ccclrfr_complete vpss_wbc_ccclrfr_deinit vpss_wbc_ccclrfr_get_frame_info vpss_wbc_ccclrfr_init vpss_wbc_ccclrfr_reset vpss_wbc_complete vpss_wbc_de_init vpss_wbc_dierfr_complete vpss_wbc_dierfr_deinit vpss_wbc_dierfr_get_frame_info vpss_wbc_dierfr_init vpss_wbc_dierfr_reset vpss_wbc_fill_wbc_frame_info vpss_wbc_get_cfg vpss_wbc_get_nr_cfg vpss_wbc_init vpss_wbc_nrrfr_complete vpss_wbc_nrrfr_deinit vpss_wbc_nrrfr_get_frame_info vpss_wbc_nrrfr_init vpss_wbc_nrrfr_reset vpss_wbc_reset vpss_wbc_ccclrfr_cal_buf_size vpss_wbc_ccclrfr_get_frame_pixfmt vpss_wbc_dierfr_cal_buf_size vpss_wbc_dierfr_get_frame_pixfmt vpss_wbc_nrrfr_cal_buf_size vpss_wbc_nrrfr_get_frame_pixfmt delete_inst_from_task g_vpss_date hiirq_platform_set_irq_reg osal_get_jiffies osal_irq_free osal_irq_request osal_irq_set_affinity osal_kthread_create osal_kthread_destroy osal_kthread_set_priority osal_kthread_should_stop osal_mdelay osal_msleep_uninterruptible osal_printk osal_proc_add osal_proc_print osal_proc_remove osal_strncmp osal_strtol vpss0_ctrl_int_service vpss1_ctrl_int_service vpss_comm_destory_event vpss_comm_destory_spin vpss_comm_down_spin vpss_comm_get_sched_time vpss_comm_give_event vpss_comm_init_event vpss_comm_init_spin vpss_comm_reset_event vpss_comm_up_spin vpss_comm_wait_event vpss_ctrl_add_instance vpss_ctrl_advance_release_frame vpss_ctrl_advance_send_frame vpss_ctrl_check_task vpss_ctrl_clear_task vpss_ctrl_close vpss_ctrl_complete_task vpss_ctrl_config_task vpss_ctrl_create_proc vpss_ctrl_create_thread vpss_ctrl_del_instance vpss_ctrl_destory_proc vpss_ctrl_destory_thread vpss_ctrl_distribution_task vpss_ctrl_echo_help vpss_ctrl_find_available_instance vpss_ctrl_get_distribute_ip vpss_ctrl_get_instance vpss_ctrl_init_inst_list vpss_ctrl_malloc_instance_id vpss_ctrl_open vpss_ctrl_pause vpss_ctrl_prepare_task vpss_ctrl_proc_read vpss_ctrl_process_interrupt vpss_ctrl_process_task vpss_ctrl_regist_isr vpss_ctrl_resume vpss_ctrl_resume_inst vpss_ctrl_start_task vpss_ctrl_suspend_inst vpss_ctrl_thread_process vpss_ctrl_un_regist_isr vpss_ctrl_update_task vpss_ctrl_update_task_success vpss_ctrl_wake_up_thread vpss_init_set_plugin_width_and_height vpss_inst_calc_run_time vpss_inst_check_image vpss_inst_check_inst_available vpss_inst_check_port_cfg vpss_inst_clear_task vpss_inst_complete_task vpss_inst_config_task vpss_inst_create_port vpss_inst_create_proc vpss_inst_deinit vpss_inst_dequeue_frame vpss_inst_destory_port vpss_inst_enable_port vpss_inst_get_def_inst_cfg vpss_inst_get_def_port_cfg vpss_inst_get_delay_time vpss_inst_get_inst_cfg vpss_inst_get_port_cfg vpss_inst_get_port_frame vpss_inst_init vpss_inst_prepare_task vpss_inst_queue_frame vpss_inst_regist_hook vpss_inst_rel_port_frame vpss_inst_release_frame vpss_inst_reply_user_command vpss_inst_send_frame vpss_inst_set_inst_cfg vpss_inst_set_port_cfg vpss_inst_update_state vpss_instance_get_crop_info vpss_comm_save_frame_to_file vpss_dbg_print_frame vpss_dbg_print_frame_addr vpss_dbg_print_ref_count_info vpss_dbg_print_tunl_info vpss_dbg_save_frame vpss_dbg_save_output_frame vpss_dbg_save_src_frame put_interlace_frame release_src_target_node vpss_in_acquire_frame vpss_in_de_init vpss_in_dequeue_frame vpss_in_get_buf_num vpss_in_init vpss_in_queue_frame vpss_in_release_frame vpss_in_reset vpss_src_complete_image vpss_src_de_init vpss_src_flush vpss_src_get_process_image vpss_src_init vpss_src_is_empty vpss_src_move_next vpss_src_put_image vpss_src_reset vpss_src_rls_done_full_node vpss_src_show_status check_atv_source check_frame_need_drop check_hdr_frame check_inst_need_drop_by_rate check_inter_min_frame_rate check_tile_10bit_frame check_yuyv_frame correct_port_format correct_port_rect correct_port_rotation fill_frame_addr_info fill_rotate_frame_addr_info get_cmp_size get_hal_info_rd_mode get_lbd_info get_out_frame_info get_src_list_mode hi_drv_smmu_flush hi_drv_stat_event invoke_pq_function revise_frame_wh revise_plugin_frame_info revise_rect stt_reg_buff_flush vpss_comm_cal_buf_size vpss_comm_decrease_frame_refcount vpss_comm_get_frame_size vpss_comm_increase_frame_refcount vpss_comm_notify_event vpss_comm_run_alg vpss_comm_update_vpss_pq_reg vpss_comm_update_vpss_pq_timing_info vpss_comm_vplugin_create_instance vpss_comm_vplugin_dequeue_buffer vpss_comm_vplugin_destory_instance vpss_comm_vplugin_get_enable vpss_comm_vplugin_get_param vpss_comm_vplugin_queue_buffer vpss_comm_vplugin_start_instance vpss_comm_vplugin_stop_instance vpss_inst_3d_detect_outframe_info vpss_inst_add_process_frame vpss_inst_adjust_frame_info vpss_inst_adjust_out_frame_info vpss_inst_alloc_rotate_buff vpss_inst_change_in_rate vpss_inst_check_3d_task vpss_inst_check_check_rotation vpss_inst_check_flag_info vpss_inst_check_in_out_buff vpss_inst_check_need_rotation_buff vpss_inst_check_node_type vpss_inst_check_port_flag vpss_inst_check_port_num vpss_inst_check_process_frame vpss_inst_check_scenes_change vpss_inst_check_vaild_port vpss_inst_check_virtual_start vpss_inst_complete_frame vpss_inst_config_2d_task vpss_inst_config_3d_task vpss_inst_config_rotation_task vpss_inst_correct_port_config vpss_inst_correct_prog_by_frame_info vpss_inst_correct_prog_info vpss_inst_correct_prog_with_stream_type vpss_inst_create_all_buffer vpss_inst_debug_ctr vpss_inst_desroy_alg_buffer vpss_inst_destory_proc vpss_inst_echo_help vpss_inst_fill_10bit_addr_info vpss_inst_fill_alg_info vpss_inst_fill_attr_info vpss_inst_fill_frame_type vpss_inst_fill_hal_info vpss_inst_fill_input_frame_info vpss_inst_fill_instance_info_from_port vpss_inst_fill_out_frame_3d_type vpss_inst_fill_out_frame_info vpss_inst_fill_output_frame_info vpss_inst_fill_rect_info vpss_inst_fill_tunl_info vpss_inst_flush vpss_inst_get_frame_from_in_buffer vpss_inst_get_in_crop vpss_inst_get_port vpss_inst_get_video_rect vpss_inst_modify_buff_status vpss_inst_notify_out_event vpss_inst_print_pq_info vpss_inst_proc_read vpss_inst_process_deque_frame_from_vdp vpss_inst_process_trans_frame vpss_inst_put_frame vpss_inst_release_in_buffer vpss_inst_reset vpss_inst_reset_port vpss_inst_rotate_outframe_info vpss_inst_set_3d_detect_out_frame_info vpss_inst_set_enable vpss_inst_set_hal_rotate vpss_inst_set_out_frame_info vpss_inst_set_pause vpss_inst_sync_usr_cfg vpss_inst_update_stream_info vpss_inst_update_vpss_pq_reg vpss_inst_update_vpss_pq_timing_info vpss_inst_user_get_image vpss_inst_user_rel_image vpss_inst_user_rel_undo_image vpss_out_add_empty_frm_buf vpss_out_add_ful_frm_buf vpss_out_check_empty_buf vpss_out_deinit vpss_out_get_empty_buf vpss_out_get_ful_frm vpss_out_get_original_frm vpss_out_get_state vpss_out_init vpss_out_move_target vpss_out_move_target_no_lock vpss_out_rel_ful_frm vpss_out_rel_ful_frm_no_lock vpss_out_reset vpss_queue_plugin_frame_to_vdp vpss_reset_vplugin_buff vpss_send_pluginbuf_to_vdp vpss_set_debug_frame_info malloc_node_buffer revise_buffer_for_plugin vpss_out_add_empty_frm_buf_no_lock g_allocate_mem_total_time g_check_buff_time g_check_total_time hi_drv_ld_notify_event hi_drv_mmz_alloc_and_map hi_drv_sec_smmu_query_buffer_source hi_drv_secmmz_alloc hi_drv_secmmz_release hi_drv_secsmmu_alloc hi_drv_secsmmu_buffer_get hi_drv_secsmmu_buffer_put hi_drv_secsmmu_query_buffer_ref hi_drv_secsmmu_release hi_drv_smmu_alloc hi_drv_smmu_alloc_and_map hi_drv_smmu_buffer_get hi_drv_smmu_buffer_put hi_drv_smmu_get_page_table_addr hi_drv_smmu_map hi_drv_smmu_map_cache hi_drv_smmu_query_buffer_ref hi_drv_smmu_query_buffer_source hi_drv_smmu_release hi_drv_smmu_unmap hi_drv_smmu_unmap_and_release hi_drv_sys_get_time_stamp_ms osal_div64_u64 osal_exportfunc_get osal_klib_fclose osal_klib_fopen osal_klib_fread osal_klib_fwrite osal_sched_clock osal_sem_destory osal_sem_down osal_sem_init osal_sem_up osal_spin_lock_destory osal_spin_lock_init osal_spin_lock_irqsave osal_spin_unlock_irqrestore osal_wait_destroy osal_wait_init osal_wait_timeout_uninterruptible osal_wait_wakeup vpss_comm_alloc_secmmz_mem vpss_comm_alloc_secsmmu_mem vpss_comm_calc_cmp_y_stride vpss_comm_check_allocate_mem_time vpss_comm_decrease_ref_count vpss_comm_div vpss_comm_event_flag vpss_comm_fclose vpss_comm_fopen vpss_comm_fread vpss_comm_fwrite vpss_comm_get_buffer_size vpss_comm_get_pix_format_type vpss_comm_increase_ref_count vpss_comm_mem_map vpss_comm_mem_unmap vpss_comm_query_mem_source vpss_comm_transfor10bit_tobit vpss_comm_vplugin_get_func libsec_shared.z.so libhi_soc.z.so libhi_msp.so libdrvstat.z.so libdrvsys.z.so libc.so libvpss.z.so
buf_manager/buf_num/buf_ful/buf_empty vpss_hal_hwbuff_modify get_hal_ctx secure/cmp_mode/topfirst/frame_index vpss%02x unknow vpss_p%d_right_%d_x%d_%d_hz_.yuv vpss_src_right_%d_x%d_%d_hz_.yuv vpss_p%d_%d_x%d_%d_hz_.yuv vpss_src_%d_x%d_%d_hz_.yuv vpss_ctrl_init_context vpss_src_move_next butt secure/bypass/topfirst/real_top_first vpss_hal_hwbuff_queue_rst vpss_ctrl_suspend_inst vpss_ctrl_init_inst_list vpss_ctrl_init_spin_and_inst_list vpss_inst_destory_port vpss_ctrl_destroy_port vpss_intf_destroy_port vpss_inst_get_port out_width/out_height/b_3d_detect_port vpss_inst_create_port hi_drv_vpss_create_port vpss_ctrl_create_port vpss_intf_create_port vpss_inst_enable_port vpss_ctrl_enable_port vpss_intf_enable_port check_use_uv_invert vpss_hal_process_interrupt vpss_comm_increase_frame_refcount vpss_comm_decrease_frame_refcount state/bit_width/3d_support/out_count inst_num/targetpos/clear_task_count vpss_comm_increase_ref_count vpss_comm_decrease_ref_count vpss_inst_tran_reference_count vpss_ctrl_init_event plugin_in_cnt/plugin_out_cnt total_time/time_out_cnt src_chg_cnt/src_drop_cnt/out_drop_cnt/reset_cnt src_rel_cnt/out_rel_trans_cnt clear_task_cnt vpss_inst_last_tran_refrence_cnt out_que_trans_cnt/out_que_trans_suc_cnt out_dequeue_cnt/out_dequeue_suc_cnt in_dequeue_cnt/in_dequeue_suc_cnt out_queue_cnt/out_queue_suc_cnt in_queue_cnt/in_queue_suc_cnt out_release_cnt/out_release_suc_cnt out_acquire_cnt/out_acquire_suc_cnt src_rel_fence_cnt/src_rel_fence_suc_cnt vpss_policy_support_out_fmt vpss_policy_check_frame_cmp_fmt vpss_policy_support_in_fmt convert_data_fmt inter/rate/3d_type/fmt interlace/rate/3d_type/fmt vpss_hal_hwbuff_check_modify_result vpss_stt_blkmv_deinit vpss_stt_rgmv_deinit vpss_stt_prjv_deinit vpss_out_deinit vpss_stt_distcnt_deinit vpss_stt_dmcnt_deinit vpss_stt_ccclcnt_deinit vpss_stt_dihismt_deinit vpss_stt_blkmt_deinit vpss_wbc_nrrfr_deinit vpss_wbc_ccclrfr_deinit vpss_wbc_dierfr_deinit vpss_ctrl_deinit vpss_hal_deinit vpss_stt_global_deinit vpss_stt_prjh_deinit vpss_stt_cyc_buff_deinit vpss_stt_nrmad_deinit vpss_stt_blkmv_init vpss_stt_rgmv_init vpss_stt_prjv_init vpss_hal_smmu_init vpss_out_init vpss_stt_init vpss_stt_distcnt_init vpss_stt_dmcnt_init vpss_stt_ccclcnt_init vpss_stt_dihismt_init vpss_stt_blkmt_init vpss_wbc_nrrfr_init vpss_wbc_ccclrfr_init vpss_wbc_dierfr_init vpss_in_init vpss_ctrl_init vpss_hal_init vpss_stt_global_init vpss_stt_prjh_init vpss_stt_cyc_buff_init vpss_hal_smmu_de_init vpss_stt_de_init vpss_in_de_init vpss_src_de_init vpss_wbc_de_init vpss_drv_mod_init vpss_stt_nrmad_init vpss_src_init vpss_wbc_init vpss_hal_logic_cfg_limit save_sp422_to_file_8bit write_sp422_to_file_8bit save_sp420_to_file_8bit save_sp422_to_file_10bit save_sp420_to_file_10bit write_sp422_y_data_10bit write_sp420_y_data_10bit write_sp422_uv_data_10bit write_sp420_uv_data_10bit width/height vpss_stt_blkmv_reset vpss_stt_rgmv_reset vpss_stt_prjv_reset vpss_out_reset vpss_stt_reset vpss_stt_distcnt_reset vpss_stt_dmcnt_reset vpss_stt_ccclcnt_reset vpss_stt_dihismt_reset vpss_stt_blkmt_reset vpss_wbc_nrrfr_reset vpss_wbc_ccclrfr_reset vpss_wbc_dierfr_reset vpss_in_reset vpss_stt_global_reset vpss_hal_clear_task_reset vpss_stt_prjh_reset vpss_hal_hwbuff_reset vpss_stt_cyc_buff_reset vpss_stt_nrmad_reset vpss_src_reset vpss_wbc_reset vpss_out_move_target vpss_hal_hwbuff_warn_det convert_crop_to_inrect revise_rect vpss_inst_modify_buff_status vpss_ctrl_notify_frame_status vpss_intf_destroy_vpss hi_vpss hi_drv_vpss_create_vpss vpss_intf_create_vpss hi_vpss_process vpss_ctrl_thread_process acquire_success/release_success sleep/threadpos wait_times/total_times %s/%s usr vpss_ctrl_regist_isr update/isr state/use_pq/user vpss_nrrfr_buffer vpss_ccclrfr_buffer vpss_dierfr_buffer vpss_inst_get_frame_from_in_buffer vpss_inst_release_in_buffer vpss_inst_create_all_buffer vpss_comm_vplugin_dequeue_buffer vpss_comm_vplugin_queue_buffer reset_split_node_buffer get_split_node_buffer vpss_split_node_buffer free_all_split_node_buffer malloc_node_buffer vpss port has no empty buffer vpss port %d has no empty buffer dst_id/hw_idx/hw_addr vpss_hal_get_rgmv_addr vpss_inst_check_rgmv_addr vpss_hal_get_reg_vir_addr vpss_dbg_print_frame_addr get_sec_page_table_addr pixel_format/rotation/b_user_crop max_framerate/lowdelay/h_flip/v_flip vpss_ctrl_get_distribute_ip vpss_send_pluginbuf_to_vdp vpss_queue_plugin_frame_to_vdp vpss_queue_frame_to_vdp vpss_comm_mem_unmap vpss_comm_mem_map auto vpss_stt_fill_stt_info vpss_proc_input_list_info vpss_dbg_print_ref_count_info vpss_stt_global_get_info vpss_stt_cyc_buff_get_info fill_mirror_node_addr_info vpss_inst_print_pq_info vpss_instance_get_crop_info vpss_dbg_print_tunl_info vpss_hal_init_hal_info vpss_inst_fill_hal_info vpss_inst_update_vpss_pq_timing_info vpss_comm_update_vpss_pq_timing_info vpss_get_cfg_info vpss_inst_check_flag_info vpss_inst_rotate_outframe_info vpss_inst_fill_output_frame_info vpss_inst_fill_input_frame_info vpss_inst_set_out_frame_info vpss_inst_set_3d_detect_out_frame_info vpss_wbc_nrrfr_get_frame_info vpss_wbc_ccclrfr_get_frame_info vpss_wbc_dierfr_get_frame_info vpss_wbc_fill_wbc_frame_info vpss_hal_set_node_info fill_prog_node_info fill_interlace_node_info get_lbd_info version vpss_init_spin vpss_ctrl_open p_reg[ii]->vpss_di_p3_blkmv_ctrl.bits.di_p3_blkmv_en p_reg[ii]->vpss_di_p2_blkmv_ctrl.bits.di_p2_blkmv_en p_reg[ii]->vpss_di_p1_blkmv_ctrl.bits.di_p1_blkmv_en p_reg[ii]->vpss_rg_cf_rgmv_ctrl.bits.rg_cf_rgmv_en p_reg[ii]->vpss_nr_p2_rgmv_ctrl.bits.nr_p2_rgmv_en p_reg[ii]->vpss_di_p1_rgmv_ctrl.bits.di_p1_rgmv_en p_reg[ii]->vpss_rg_p1_rgmv_ctrl.bits.rg_p1_rgmv_en p_reg[ii]->vpss_rg_cf_rpjv_ctrl.bits.rg_cf_prjv_en p_reg[ii]->vpss_p2_prjv_ctrl.bits.rg_p2_prjv_en p_reg[ii]->vpss_di_p3_stcnt_ctrl.bits.di_p3_stcnt_en p_reg[ii]->vpss_di_p2_stcnt_ctrl.bits.di_p2_stcnt_en p_reg[ii]->vpss_dm_cf_cnt_ctrl.bits.dm_cf_cnt_en p_reg[ii]->vpss_dm_p2_cnt_ctrl.bits.dm_p2_cnt_en p_reg[ii]->vpss_di_p4_hismt_ctrl.bits.di_p4_hismt_en p_reg[ii]->vpss_di_p3_blkmt_ctrl.bits.di_p3_blkmt_en p_reg[ii]->vpss_di_p2_blkmt_ctrl.bits.di_p2_blkmt_en dense_stripe_str_en == dense_stripe_det_en p_reg[ii]->vpss_nr_rfr_ctrl.bits.nr_rfr_en p_reg[ii]->vpss_di_rfr_ctrl.bits.di_rfr_en p_reg[ii]->vpss_p3i_ctrl.bits.p3i_en p_reg[ii]->vpss_rg_cf_rpjh_ctrl.bits.rg_cf_prjh_en p_reg[ii]->vpss_p2_prjh_ctrl.bits.rg_p2_prjh_en p_reg[ii]->vpss_di_blkmv_cyc_ctrl.bits.di_blkmv_cycbuf_en p_reg[ii]->vpss_cc_ycnt_cyc_ctrl.bits.cc_ycnt_cycbuf_en p_reg[ii]->vpss_di_stcnt_cyc_ctrl.bits.di_stcnt_cycbuf_en p_reg[ii]->vpss_cc_ccnt_cyc_ctrl.bits.cc_ccnt_cycbuf_en p_reg[ii]->vpss_di_hismt_cyc_ctrl.bits.di_hismt_cycbuf_en p_reg[ii]->vpss_di_blkmt_cyc_ctrl.bits.di_blkmt_cycbuf_en p_reg[ii]->vpss_di_cyc_ctrl.bits.di_cycbuf_en p_reg[ii]->vpss_ref_cyc_ctrl.bits.ref_cycbuf_en p_reg[ii]->vpss_nr_mad_cyc_ctrl.bits.nr_mad_cycbuf_en p_reg[ii]->vpss_cc_cyc_ctrl.bits.cc_cycbuf_en vpss_hal_hwbuff_send_en p_reg[ii]->snr_reg0.bits.mndet_en == p_reg[ii]->vpss_ctrl.bits.dbd_en p_reg[ii]->vpss_nr_cf_mad_ctrl.bits.nr_cf_mad_en p_reg[ii]->vpss_snr_p2_mad_ctrl.bits.snr_p2_mad_en p_reg[ii]->vpss_nr_p2_mad_ctrl.bits.nr_p2_mad_en p_reg[ii]->vpss_p3_ctrl.bits.p3_en p_reg[ii]->vpss_p2_ctrl.bits.p2_en p_reg[ii]->vpss_p1_ctrl.bits.p1_en state/instnum vpss_inst_check_port_num node_num == pq_para->split_num add_reg_buffer_num 3drs_type/scan_num vpss_in_get_buf_num vpss_out_get_ful_frm vpss_out_rel_ful_frm vpss_out_get_original_frm vpss_comm_alloc_secmmz_mem vpss_comm_allocate_mmz_mem vpss_comm_free_mmz_mem vpss_comm_alloc_secsmmu_mem vpss_comm_allocate_smmu_mem vpss_comm_free_smmu_mem vpss_comm_vplugin_get_param out_wtunl/out_rtunl in_wtunl/in_rtunl src_id/forward_tunl call back func is null memcpy_s fail ----VPSS %d get process frame fail free/busy/wait/rel can't support tunnel release_frame_alloc_buffer_abnormal p_reg[ii]->hipp_dei_ctrl.bits.mchdir_c == p_reg[ii]->hipp_dei_ctrl.bits.mchdir_l p_reg[ii]->hipp_dei_ctrl.bits.dei_out_sel_c == p_reg[ii]->hipp_dei_ctrl.bits.dei_out_sel_l vpss_ctrl_clear_task vpss_inst_config_rotation_task vpss_inst_config_task vpss_ctrl_config_task vpss_inst_complete_task vpss_ctrl_complete_task vpss_ctrl_update_task vpss_inst_prepare_task vpss_ctrl_prepare_task vpss_inst_config_3d_task vpss_inst_config_2d_task vpss_inst_regist_hook hi_drv_vpss_regist_hook vpss_ctrl_regist_hook vpss_intf_regist_hook vpss_hal_set_clock vpss_out_move_target_no_lock vpss_out_rel_ful_frm_no_lock vpss_out_add_empty_frm_buf_no_lock handle/ctrl_ip/enable/quick vpss_mac_config_hight_check vpss_sys_config_rotation_check vpss_mac_config_chan_check vpss_mac_config_comm_check vpss_sys_config_check vpss_tnr_config_check vpss_snr_config_check vpss_dei_config_check vpss_sys_apb_config_check vpss_mac_config_stride_check pst_cfg_info[ii]->wth == st_scence_cfg_info->wth vpss_convert_bitwidth vpss_policy_support_height_and_width (P/I condition)/pix_format/height/width vpss_src_flush acquire_hz/releasing/waiting/working vpss_comm_run_alg vpss_inst_set_inst_cfg vpss_inst_get_inst_cfg hi_drv_vpss_get_default_port_cfg vpss_intf_get_default_port_cfg vpss_inst_set_port_cfg hi_drv_vpss_set_port_cfg vpss_ctrl_set_port_cfg vpss_intf_set_port_cfg vpss_inst_get_port_cfg hi_drv_vpss_get_port_cfg vpss_ctrl_get_port_cfg vpss_intf_get_port_cfg vpss_inst_check_port_cfg hi_drv_vpss_get_default_cfg vpss_intf_get_default_cfg vpss_hal_hwbuff_init_cfg vpss_set_split_node_pq_maket_cfg vpss_stt_blkmv_get_cfg vpss_stt_rgmv_get_cfg vpss_stt_prjv_get_cfg vpss_stt_get_cfg vpss_stt_distcnt_get_cfg vpss_stt_dmcnt_get_cfg vpss_stt_ccclcnt_get_cfg vpss_stt_dihismt_get_cfg vpss_stt_blkmt_get_cfg vpss_stt_prjh_get_cfg vpss_stt_nrmad_get_cfg vpss_wbc_get_cfg hi_drv_vpss_set_vpss_cfg vpss_ctrl_set_vpss_cfg vpss_intf_set_vpss_cfg hi_drv_vpss_get_vpss_cfg vpss_ctrl_get_vpss_cfg vpss_intf_get_vpss_cfg vpss_wbc_get_nr_cfg vpss_set_split_node_pq_demo_cfg check_set_rchn_cfg vpss_mac_set_rchn_cfg convert_to_wwbc_chn_cfg convert_to_rwbc_chn_cfg vpss_set_split_node_pq_mark_cfg vpss_hal_hwbuff_cfg set_prog_node_cfg set_interlace_node_cfg vpss_comm_update_vpss_pq_reg vpss_inst_check_port_flag vpss_out_get_empty_buf vpss_out_check_empty_buf vpss_stt_blkmv_buf vpss_stt_rgmv_buf vpss_stt_prjv_buf vpss_rot_buf vpss_stt_distcnt_buf vpss_stt_dmcnt_buf vpss_stt_ccclcnt_buf vpss_stt_dihismt_buf vpss_stt_blkmt_buf vpss_out_add_empty_frm_buf vpss_frm_buf vpss_out_add_ful_frm_buf vpss_stt_global_buf vpss_stt_prjh_buf vpss_reg_buf vpss_stt_nrmad_buf vpss_inst_check_in_out_buff vpss_reset_vplugin_buff vpss_inst_alloc_rotate_buff vpss_stt_cycle_buff get_mirror_node_buff get_reg_node_buff off (p_reg[ii]->regload_mask1.bits.mask1 & 0x0000ffff) == 0x0000ffff get_cmp_size vpss_wbc_nrrfr_cal_buf_size vpss_wbc_ccclrfr_cal_buf_size vpss_wbc_dierfr_cal_buf_size vpss_comm_cal_buf_size cal_split_node_buf_size true vpss_comm_fwrite vpss_hal_modify_complete vpss_stt_blkmv_complete vpss_stt_rgmv_complete vpss_stt_prjv_complete vpss_stt_complete vpss_stt_distcnt_complete vpss_stt_dmcnt_complete vpss_stt_ccclcnt_complete vpss_stt_dihismt_complete vpss_stt_blkmt_complete vpss_wbc_nrrfr_complete vpss_wbc_ccclrfr_complete vpss_wbc_dierfr_complete vpss_stt_global_complete vpss_stt_prjh_complete vpss_stt_cyc_buff_complete vpss_stt_nrmad_complete vpss_wbc_complete dev_state process_smmu_state vpss_hal_get_smmu_int_state vpss_hal_clear_smmu_int_state vpss_hal_get_int_state vpss_hal_clear_int_state vpss_out_get_state check_inst_need_drop_by_rate out_rate vpss_hal_hwbuff_update vpss_ctrl_pause vpss instance%d state:pause suspend/pause vpss_ctrl_close false vpss_get_wchn_class_type vpss_get_rchn_class_type vpss_inst_check_node_type bit_width/frame(W/H)/type vpss_ctrl_dev_resume vpss_inst_get_delay_time create_all_buffer_time/destroy_all_buffer_time complete_task_time/alg_run_time logic_time/software time/total_time pq_timing_info_time/start_task_time check_task_time/prepare_task_time config_task_time/update_pq_reg_time config_time/start_time/complete_time check_time/prepare_time vpss_dbg_save_output_frame vpss_inst_get_port_frame vpss_inst_rel_port_frame vpss_dbg_print_frame vpss_wbc_nrrfr_init_frame vpss_wbc_ccclrfr_init_frame vpss_wbc_dierfr_init_frame vpss_in_check_have_repeat_frame buff_have_repeat_frame vpss_inst_add_process_frame vpss_inst_process_trans_frame vpss_intf_queue_task_frame set_prog_frame vpss_dbg_save_frame vpss_inst_dequeue_frame hi_drv_vpss_dequeue_frame vpss_in_dequeue_frame vpss_ctrl_dequeue_frame vpss_intf_dequeue_frame vpss_inst_queue_frame hi_drv_vpss_queue_frame vpss_in_queue_frame vpss_ctrl_queue_frame vpss_intf_queue_frame vpss_inst_release_frame hi_drv_vpss_release_frame vpss_in_release_frame vpss_ctrl_release_frame vpss_intf_release_frame vpss_ctrl_advance_release_frame hi_drv_vpss_acquire_frame vpss_in_acquire_frame vpss_ctrl_acquire_frame vpss_intf_acquire_frame put_interlace_frame set_interlace_sd_frame vpss_inst_send_frame vpss_ctrl_advance_send_frame set_interlace_hd_frame vpss_dbg_save_src_frame vpss_comm_save_frame_to_file save_sp422_to_file save_sp420_to_file hi_drv_vpss_get_handle vpss_intf_get_handle init_reg_table vpss_comm_vplugin_get_enable allocate_mmz_and_cache vpss_src_put_image vpss_inst_user_get_image vpss_src_get_process_image vpss_inst_user_rel_undo_image vpss_inst_user_rel_image vpss_inst_check_image vpss_src_complete_image vpss_policy_revise_image set_mirror_node vpss_hal_set_other_node vpss_src_rls_done_full_node set_rotate_node convert_hal_rwmode framerate/3d_type/frametype/fieldmode source/field_mode/buff_mode source/field_mode/pre_field_mode vpss_comm_calc_cmp_y_stride p_reg[ii]->vpss_di_cyc_stride.bits.di_c_stride == p_reg[ii]->vpss_di_cyc_stride.bits.di_y_stride p_reg[ii]->vpss_ref_cyc_stride.bits.ref_c_stride == p_reg[ii]->vpss_ref_cyc_stride.bits.ref_y_stride p_reg[ii]->vpss_cc_cyc_stride.bits.cc_c_stride == p_reg[ii]->vpss_cc_cyc_stride.bits.cc_y_stride vpss_comm_query_mem_source only_i_frame/quickout/secure/source vpss_comm_vplugin_destory_instance vpss_ctrl_destory_instance vpss_comm_vplugin_start_instance vpss_ctrl_get_instance vpss_comm_vplugin_stop_instance vpss_ctrl_del_instance vpss_comm_vplugin_create_instance vpss_ctrl_create_instance vpss_ctrl_add_instance vpss1_ctrl_int_service set_reg_interlace vpss_ctrl_dev_suspend IP/IRQ/open_num/suspend vpss_inst_reply_user_command hi_drv_vpss_send_command vpss_ctrl_send_command vpss_intf_send_command vpss_intf_process_cmd frame(W/H)/bit_width/special_field hw_idx/hw_addr/dst_id alloc_port_id complete fence buffer failed port = %d rel_port_frame %d failed vpss_ctrl_create_thread vpss_comm_fread vpss_inst_proc_read vpss_ctrl_proc_read vpss_ctrl%02d can't support rotation %d can't here ,3dtype %d, eye %d invalid port_id %d, handle %d invalid port_id %d vpss_inst_create_proc vpss_ctrl_create_proc vpss_comm_vplugin_get_func drv_vpss_register_func vpss_hal_start_logic vpss_hal_complete_logic ../../device/hisilicon/hi3751v350/sdk_linux/source/msp/drv/vpss/chip/hi3751v350/hal/cbb/vpss_hal_limit.c ../../device/hisilicon/hi3751v350/sdk_linux/source/msp/drv/vpss/chip/hi3751v350/hal/vpss_hal_reg.c write_sp422_y_data write_sp420_y_data vpss_set_split_node_pq_get_para busy_list[index, addr] wait_list[index, addr] rel_list [index, addr] DTV ATV VPSS_OUT BUTT START SCART DEINIT 8BIT 12BIT 10BIT WAIT pst_cfg_info[ii]->hgt >= HAL_LIMIT_MIN_HEIGHT pst_cfg_info[ii]->wth >= HAL_LIMIT_MIN_HEIGHT HDR10PLUS HI_VPSS SUCCESS FS YES CVBS SBS VPSS1_ISR VPSS0_ISR YPBPR TECHNICOLOR SDR CLEAR TOP VDP NO SVIDEO VPSS_IN OPEN BOTTOM pst_vpss_reg_logic != NULL ALL DOLBY_EL DOLBY_BL NETWORK FPK VI HDMI node_num <= XDP_VPSS_MAX_NODELENGTH pst_cfg_info[ii]->wth >= HAL_LIMIT_MIN_WIDTH VDH HLG CONFIG SLF CLOSE PREPARE NONE IDLE SUSPEND 2D GRAPHIC TAB MEDIA VGA %-40s: p_reg->vpss_mst_outstanding.bits.mstr0_woutstanding <= 7 V5 p_reg->vpss_mst_ctrl.bits.split_mode <= 0x4 V4 2020-04-24 pst_cfg_info[ii]->hgt == st_scence_cfg_info->hgt || pst_cfg_info[ii]->hgt == (st_scence_cfg_info->hgt + 3) / 4 * 4 V3 VDH3 pst_cfg_info[ii]->format <= 3 p_reg[ii]->vpss_chn_cfg_ctrl.bits.max_req_num <= 0x2 p_reg->vpss_chn_cfg_ctrl.bits.img_pro_mode <= 0x2 VDH2 pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_422 pst_cfg_info[ii]->format != 2 VDH1 pst_rchn_cfg->st_in_rect.hgt >= 31 pst_rchn_cfg->st_in_rect.wth >= 31 pq_para->block_x >= 1 p_reg[ii]->vpss_ctrl.bits.snr_mad_copy_en == 1 p_reg[ii]->vpss_ctrl.bits.meds_en == 1 p_reg[ii]->snr_reg0.bits.snr_en == 1 p_reg[ii]->hipp_ma_mt14.bits.ppre_info_en == 1 p_reg[ii]->snr_reg0.bits.dm_en == 1 p_reg[ii]->vpss_ctrl.bits.snr_mad_sel == 1 p_reg->vpss_ctrl.bits.dei_switch == 1 p_reg[ii]->vpss_chn_cfg_ctrl.bits.max_req_len <= 1 p_reg[ii]->vpss_ctrl.bits.tnr_mad_mode != 1 90 180 270 HDR10 00 pst_rchn_cfg->st_in_rect.x == 0 p_reg->vpss_out_ctrl.bits.out_mirror == 0 p_reg->vpss_ctrl.bits.snr_mad_copy_en == 0 p_reg[ii]->vpss_ctrl.bits.snr_mad_copy_en == 0 pst_cfg_info[ii]->u32cf_field_420_copy_en == 0 p_reg[ii]->snr_reg0.bits.cbcr_v5h1_flt_en == 0 p_reg->vpss_out_testpattern.bits.out_test_pat_en == 0 p_reg->vpss_ctrl.bits.meds_en == 0 p_reg[ii]->vpss_ctrl.bits.meds_en == 0 p_reg->vpss_ctrl.bits.tnr_en == 0 p_reg->vpss_ctrl.bits.snr_en == 0 p_reg->vpss_ctrl.bits.mcnr_en == 0 p_reg[ii]->snr_reg62.bits.dm_blkgradinfo_en == 0 p_reg[ii]->hipp_ma_mt14.bits.pre_info_en == 0 p_reg->vpss_ctrl.bits.igbm_en == 0 p_reg->vpss_ctrl.bits.cccl_en == 0 p_reg[ii]->vpss_tnr_reg25.bits.y_mc_adj_en == 0 p_reg[ii]->vpss_tnr_reg25.bits.c_mc_adj_en == 0 p_reg->vpss_ctrl.bits.dei_en == 0 p_reg->vpss_ctrl.bits.mcdi_en == 0 p_reg->vpss_chn_cfg_ctrl.bits.rotate_en == 0 p_reg->vpss_ctrl.bits.rgme_en == 0 p_reg[ii]->vpss_tnr_reg17.bits.ma_me_en == 0 p_reg->vpss_ctrl.bits.dsd_en == 0 p_reg->vpss_ctrl.bits.fod_en == 0 p_reg->vpss_ctrl.bits.scd_en == 0 p_reg->vpss_ctrl.bits.dbd_en == 0 p_reg[ii]->vpss_snr_p2_mad_ctrl.bits.snr_p2_mad_en == 0 p_reg[ii]->vpss_tnr_ctrl.bits.cls3d_en == 0 p_reg[ii]->vpss_tnr_ctrl.bits.ccs_3d_en == 0 p_reg[ii]->snr_reg0.bits.ccs2d_en == 0 p_reg->vpss_ctrl.bits.vc1_en == 0 p_reg->vpss_ctrl.bits.snr_mad_sel == 0 p_reg[ii]->vpss_ctrl.bits.snr_mad_sel == 0 p_reg->vpss_ctrl.bits.dei_switch == 0 p_reg->vpss_chn_cfg_ctrl.bits.img_pro_mode == 0 pst_rchn_cfg->st_addr[VPSS_RCHN_ADDR_DATA].y_str % 16 == 0 pst_cfg_info[ii]->hgt % 0x4 == 0 pst_cfg_info[ii]->hgt % 0x2 == 0 pst_cfg_info[ii]->wth % 0x2 == 0 (err_ns_wr_addr & 0xff) == 0 (err_ns_rd_addr & 0xff) == 0 (cb_ttbr & 0x3f) == 0 (pst_rchn_cfg->st_in_rect.hgt % 2) == 0 (pst_rchn_cfg->st_in_rect.wth % 2) == 0 p_reg[ii]->vpss_di_cyc_y_start_addr_low.bits.di_y_start_addr != 0 p_reg[ii]->vpss_ref_cyc_y_start_addr_low.bits.ref_y_start_addr != 0 p_reg[ii]->vpss_cc_cyc_y_start_addr_low.bits.cc_y_start_addr != 0 p_reg[ii]->vpss_di_blkmv_cyc_start_addr_low.bits.di_blkmv_start_addr != 0 p_reg[ii]->vpss_cc_ycnt_cyc_start_addr_low.bits.cc_ycnt_start_addr != 0 p_reg[ii]->vpss_di_stcnt_cyc_start_addr_low.bits.di_stcnt_start_addr != 0 p_reg[ii]->vpss_cc_ccnt_cyc_start_addr_low.bits.cc_ccnt_start_addr != 0 p_reg[ii]->vpss_di_hismt_cyc_start_addr_low.bits.di_hismt_start_addr != 0 p_reg[ii]->vpss_di_blkmt_cyc_start_addr_low.bits.di_blkmt_start_addr != 0 p_reg[ii]->vpss_nr_mad_cyc_start_addr_low.bits.nr_mad_start_addr != 0 p_reg[ii]->vpss_di_cyc_c_start_addr_low.bits.di_c_start_addr != 0 p_reg[ii]->vpss_ref_cyc_c_start_addr_low.bits.ref_c_start_addr != 0 p_reg[ii]->vpss_cc_cyc_c_start_addr_low.bits.cc_c_start_addr != 0 p_reg->vpss_mst_ctrl.bits.split_mode != 0 p_reg->vpss_chn_cfg_ctrl.bits.img_pro_mode != 0 invalid port_id %#x. invalid port_id %d, handle %d. increase_ref_count(try_increase/suc_increase) decrease_ref_count(try_decrease/suc_decrease) threadsleep/idle_sleep/task_sleep/wait_sleep(HZ) src_list(PUT/COMPL/REL/FULL) trans_fb_list(PUT/REL) src_list_total(PUT/REL) process_hz(try/OK) get_src_img_hz(try/OK)/get_out_buf_hz(try/OK) acquire(try/OK)/release(try/OK) out_rect(X/Y/W/H) crop_rect(X/Y/W/H) video_rect(X/Y/W/H) offset_rect(L/R/T/B) !(p_reg[ii]->hipp_dei_ctrl.bits.mc_only == 1 && p_reg[ii]->hipp_dei_ctrl.bits.ma_only == 1) !(dsd_en == 0 && dense_stripe_det_en == 1) !(dsd_en == 0 && dense_stripe_str_en == 1) !(p_reg[ii]->vpss_ctrl.bits.mcdi_en == 0 && igbm_en == 1) !(p_reg[ii]->vpss_ctrl.bits.dei_en == 0 && p_reg[ii]->vpss_ctrl.bits.mcdi_en == 1) !(p_reg[ii]->vpss_ctrl.bits.mcdi_en == 0 && fod_en == 1) (pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_420) || (pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_422) || (pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_400) !(p_reg[ii]->vpss_ctrl.bits.mcdi_en == 0 && p_reg[ii]->hipp_dei_ctrl.bits.ma_only == 0) !(p_reg[ii]->vpss_ctrl.bits.dei_en == 1 && rgme_en == 0) !((pst_cfg_info[ii]->wth < HAL_ME_MIN_WIDTH && meds_en == 1) || (pst_cfg_info[ii]->wth > HAL_TVD_MAX_WIDTH && meds_en == 0 && p_reg[ii]->vpss_split_ctrl.bits.split_en == 0)) true [%-8d,0x%x] process_hz(try/OK) process_cnt(try/OK) srclist is empty vpss out_get idx=%d addr=0x%x dstid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss deque idx=%d addr=0x%x dstid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss release idx=%d addr=0x%x dstid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss out_put idx=%d addr=0x%x srcid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss get idx=%d addr=0x%x srcid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss que idx=%d addr=0x%x srcid=%d tunl=%d hw_idx=%d hwaddr=0x%llx type=%d,can't support refcnt, addr=0x%08x type=%d,can't support ref cnt, addr=0x%08x Can't find rel frame index=%d,addr:0x%08x decrease ref fail! addr=%08x Current rgmv addr err, cf addr %08x, head addr %08x %-40s:%-8s/%-8d/0x%-8x vpssprocess refcnt-- idx=%d addr=0x%x vpssunprocess refcnt-- idx=%d addr=0x%x vpss tran refcnt-- idx=%d addr=0x%x vpss queue refcnt++ idx=%d addr=0x%x vpss outtunl dst_id=%d idx=%d addr=0x%x vpss intunl src_id=%d idx=%d addr=0x%x this frame has been in vpss busy list 0x%x this frame has been in vpss wait_rel_list list 0x%x this frame has been in vpss release list 0x%x hi_drv_smmu_query_buffer_source fail ret 0x%x query buffer fail ret is 0x%x write_error_addr 0x%x, read_error_addr 0x%x query_mem_source fail, ret = 0x%x query mem_source fail, ret = 0x%x memset_s failed, err = 0x%x vpss command not found,cmd = 0x%x decrease ref fail addr=%x VPSS queue_frame to vdp failed id %d laddr %x raddr %x can't get rel_frm id %d,addr %x queue to vplugin failed %x invalid dbg_part %#x alloc buffer fail.size %#x no node needs start [%d]Warning: HWadd = %#x has been modified before opt VPSS IP%d, already de_init VPSS IP%d, already init list not init hal is not init VPSS HAL is not init resource has not init IN no node to get current field order is same with the last one and no more frame to process command print success command set rotate support alg width and height success command vpssbypass success command pqbypass success command open_tunl_read_error success command inter success command print_frame_addr success command closecmp success command printinfo success command print_ref_cnt_info success command tran_pq_info success command tran_vo_info success command print_tunl_info success command testpattern success command SetMeVersion success command SetMeScanNum success command tunl success command pause success command check alloc mem time success command print software time success command print logic time success command save_frame success command SetRate success can't get first two released nodes can't get first one released nodes %-40s:%-8s %-40s:%-8d/%-8llx/%-8s %-40s:%-8s/%-8s %-40s:%-8s/%-8s/%-8s %-40s:%-8s/%-8s/%-8s/%-8s %-40s:%-8d/%-8s/%-8s/%-8s %-40s:%-8d/%-8d/%-8s/%-8s %-40s:%-8d/%-8d/%-8s %-40s:%-8s/%-8d/%-8d/%-8s %-40s:%-8d/%-8d/%-8d/%-8s %-40s:%-8d/%-16s/%-16s snprintf_s failed! ret=%d str=%s snprintf_s failed! ret=%d proc_name=%s snprintf_s failed! ret=%d ch_file=%s ssert failed at: >file name: %s >function : %s >line no. : %d >condition: %s empty list err ful list err rel cnt err add out buf err rel_ful_frm_buf error,full list error get hw buffer reg addr error port [%d] error complete src image function is not register null pointer echo printinfo 0~11 0~3 num >/proc/msp/vpss_ctrl00 para1:0(port0)/1(port1)/2(port2)/3(src) para2:num is printframe number echo saveyuv 0~11 0~3 num >/proc/msp/vpss_ctrl00 para1:0(port0)/1(port1)/2(port2)/3(src) para2:num is frame number invalid out pix_format %d,can't get addr vpss dump logic chan config addr reg virtual address is zero echo openprint 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) explanation: open plugin input and output frameinfo echo refcntinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) explanation:print reference count infomation echo setbuffnum 0~11 0/1 2~6 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:(2~6) is buffer num p_args is null pArgs is null para is null IN no node to fill vpss refcount -- fail vpss refcount ++ fail task timeout %lld, clear task need_drop quote == 0, please check vpss resume finish vpss lowpower resume finish vpss suspend finish vpss lowpower suspend finish empty list node too big ful list node too big IN no node to dequeue echo readerrorstate 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) explanation: open tunl read error state echo checkmemtime 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) (alloc consume of parts) para2:0(off)/1(on) (total time) explanation: allocating mem time echo softwaretime 0~11 0/1 time >/proc/msp/vpss_ctrl00 para1:0(off)/1(on)para2: max logictime. explanation: print software time echo logictime 0~11 0/1 time >/proc/msp/vpss_ctrl00 para1:0(off)/1(on)para2: max logictime. explanation: print logic time repeat frame Don't support secure frame has only one frame vpss can't support this pixfmt=%d savetofile vpss can't support this bitwidth =%d savetofile vpss ctrl isn't enable %-40s:%-8lld/%-8lld/%-8lld/%-8lld %-40s:%-16lld/%-16lld %-40s:%-16lld/%-16lld/%-16lld logic_time %lld software time %lld VPSS IP%d, is not vaild ip %d is invalid h_vpss(%d) is invalid SRCIN has been de_inited out has been inited src has been inited IN has been inited h_vpss(%d) is not be vaild or created [%d] add = %#x modified successed vpss_hal_deinit failed memcpy_s failed memset_s failed create buffer failed VPSS add reg node buffer failed vpss_get_cfg_info failed set clock failed vpss_sys_config_check failed vpss_tnr_config_check failed vpss_snr_config_check failed vpss_dei_config_check failed vpss_mac_config_check failed vpss_sys_apb_config_check failed alloc ro_buf failed alloc vpss_reg_buf failed proc smmu state failed clear smmu int state failed get int state failed clear int state failed Mmz map_cache failed Alloc map_cache failed complete_image failed vpss_ctrl_del_instance failed error [%d] add = %#x modified failed vpss_ctrl_create_thread failed vpss_ctrl_create_proc failed hi_drv_smmu_map alloc failed hi_drv_module_register VPSS failed ioremap VPSS_REG(%#x) failed %-40s:%-8d %-40s:%-8s/%-8d %-40s:%-8s/%-8s/%-8s/%-8d %-40s:%-8s/%-8d/%-8s/%-8d %-40s:%-8d/%-8d %-40s:%-8d/%-8d/%-8d %-40s:%-8s/%-8d/%-8d/%-8d %-40s:%-8d/%-8d/%-8d/%-8d %-40s:%-16s/%-16d %-40s:%-16lld/%-16d %-40s:%-16d/%-16d %-40s:%-12d/%-12d/%-12d/%-12d input tunnel error!!!! state = %x cnt=%d snprintf_s failed! ret=%d vpss_ctrl_wait_inst_idle ERROR state = %d,waittime ms=%d vpss_ctrl_pause waittime ms=%d rchn=%d, yaddr = 0x%llx, caddr = 0x%llx, w=%d,h=%d,ys=%d,cs=%d vpss can't support lossless cmp mode b_loss_cmp=%d vpss get reg buffer failed, node_num=%d g_st_vpss_ctrl[%d].inst_ctrl_info.instance_num=%d wchn=%d, yaddr = 0x%llx, caddr = 0x%llx, w=%d,h=%d,ys=%d,cs=%d,size=%d vpss doesn't have buffer to config logic, nodetype=%d invalid frm info w=%d,h=%d,yaddr=0x%08x,caddr=0x%08x,ystride=%d,cstride=%d vpss can't support the ip ,id=%d timing interlace %d b422 %d en_cs %d pixfmt %d en_in %d rate %d h %d w %d src h %d src w %d run_alg out scd %d scd_va %d key_va %d film_ty %d field_or %d dir_mch %d die_out %d can't be processed top_field_first %d don't support this port %d vpss can't support fmt %d can't be processed fmt %d file name is not right %d offset is too long, top %d bottom %d height %d 3D tile image can't be processed e_pix_format %d vpss can't be processed output pix_format %d vpss can't be processed inpute pix_format %d invalid port format %d Instance num should be 0, but num is %d 3dtype err %d vpss input invaild enum in %s! var %d not support cmp %d invalide ip %d vpss ctrl isn't opened, ip %d port num %d is more than %d not vpss channel. hw_buff_chan %d can't run here, i %d task num %d vpss can't support bitwidth %d vpss can't support this bitwidth %d can't be processed bit_width %d offset is too long, left %d right %d width %d Set virtual_rect error w %d h %d can't be processed w %d, h %d file name is too long %d vpss alloc split node buffer failed, no secure,size %d vir_addr is NULL,alloc size %d rgmv alloc memory failed. size %d prjv alloc memory failed. size %d blkmt alloc memory failed. size %d prjh alloc memory failed. size %d vpss alloc buffer failed. size %d Alloc mmz failed, size %d Alloc smmu failed, size %d instance get wbc cfg failed, eye %d can't be processed frame_rate %d can't be processed secure %d can't be processed frm_type %d can't be processed src_frame_type %d invalid frame_type %d invalid refcnt type %d invalid tunl type %d instance get stt cfg failed, type %d can't be processed only_have_i_frame %d port doesn't exit, handle %d invalid port ID %d, handle %d can't be processed buffer_mode %d in image can't be processed field_mode %d can't be processed source %d can't be processed interlace %d run_alg in hand %d source %d interlace %d w %d h %d stride %d scd %d fieldorder %d ref_field %d error,can't happen portid %d 3D image can't be processed W %d node num too big. NUM %d 3D image can't be processed H %d invalid port ID %d check frame para fail,index = %d check_use_uv_invert error,infmt = %d, outfmt = %d get instance failed , h_vpss = %d get instance failed , vpss = %d 2d image has been saved to '%s' W=%d H=%d format=%d ys = %d, cs = %d vpss delay timems = %d, buf num = %d stt global init alloc memory failed. size = %d cyc buff init alloc memory failed. size = %d vpss malloc buffer failed, size = %d can not use increaseref now en_mem_source = %d unknown command = %d function : %s line: %d wchn: %d function : %s line: %d rchn: %d rotate angle error %d %-20s allocating spend %-8d ns, size %-4d kb <===[Exit] ===>[Enter] vpss_hal_alloc_port_id failed!en_port [%d] src waiting buffer: src complete buffer: decreaseref fail.en_mem_source = %d .just support 0 1 echo help > /proc/msp/vpss_ctrl00 input number %d is too big,we support 0~1000 vpss delay timems = 0 invalid VPSS HANDLE %x. out: ystride %d, cstride %d, w %d, h %d, phy %#llx, size %d, yoffset %#x, uvoffset %#x. in: ystride %d, cstride %d, w %d, h %d, phy %#llx, size %d, yoffset %#x, uvoffset %#x. ctrl_del_init error,destroy instance first. vpss_src_get_pre_img_info delint. vpss_src_put_image delint. vpss_src_get_process_image delint. vpss_src_complete_image delint. stt has not init. STT not init. set_port err. vpss_src_move_next error. read or write mode %d is error. write mode 0 is error. read mode 0 is error. set_port_cfg error. data is null pointer. P is null pointer. Split block doesn't support out pattern. echo rotateneedalg 0~11 w h >/proc/msp/vpss_ctrl00 para1:w(width) para2:h(height) explanation:if less than this resolution, rotation support algrithm. Frame info is null. Buf is null. File is null. VPSS_GET_SRCIMAGE is null. port%d buffer is full. there is not enough space. h_port is invalid. 3dsupport %d is invalid. h_port %d is invalid. hvpss %d is invalid. h_vpss %d is invalid. vert_flip %d is invalid. hori_flip %d is invalid. rotation %d is invalid. buf_type %d is invalid. tunnel_enable %d is invalid. para en_mode %d is invalid. bit_width %d invalid. by_pass_mode %d invalid. blkmv alloc memory failed. distcnt alloc memory failed. dmcnt alloc memory failed. dihismt alloc memory failed. Init inst list failed. Init event failed. vpss_ctrl_init failed. Smmu init failed. Init failed. Notify frame status failed. Init spin failed. Update pq timing failed. Mmz_map_cache failed. set_mirror_node failed. drv_vpss_register_func failed. register VPSS failed. can not create thread. instance number is max,%d. port num is max %d. unsupport pixformat %d. unsupport bitwidth %d and pixformat %d. unsupport bitwidth %d, pixformat %d. init_frame fail. bitwidth %d, pixformat %d. init frame fail. bitwidth %d, pixformat %d. unsupport pix_format %d. use multi port, port num %d. ctrl_del_init error,vpss hasn't initted,ip %d,open num %d. buffer destory error already delete %d total %d. unsupport bitwidth %d. unsupport bit_width %d. wakeup_thread success. cfg %d pre %d in_frm %d out_buff %d. cccl_cnt init alloc memory failed, size %d. VPSS nrmad alloc memory failed, size %d. nr wbc alloc memory failed, size %d. cccl wbc alloc memory failed, size %d. die wbc alloc memory failed, size %d. stt context is NULL. wbc context is NULL. STT context is NULL. pst_vpss_frame is NULL. inst %d OUT buf is FULL. input para3 is too big, need 64 <= input_height <= 1088. Input para3 is too big, 0:v3 1:v4 2:v5. Input para3 is too big, 0:4 1:5. Input para2 %d is too big, inst num should 0~3. Input para2 is too big, inst num should 0~3. input para2 is too big, need 0/1/2/3. input para2 is too big, inst num should 0~1. Input para2 is too big, inst num should 0~1. Input para2 is too big, inst num should 0~11. Buff num %d is wrong. num should be 1~20. input para2 is too big, need 128 <= input_width <= 1920. Cmp_rate is 0. vpss resume start... vpss lowpower resume start... vpss suspend start... vpss lowpower suspend start... blkmv deinit error(not init). rgmv deinit error(not init). prjv deinit error(not init). distcnt deinit error(not init). dmcnt deinit error(not init). ccclcnt deinit error(not init). dihismt deinit error(not init). blkmt deinit error(not init). prjh deinit error(not init). nrmad deinit error(not init). cccl wbc deinit error(not init). die wbc deinit error(not init). cyc buffer de_init error(not init). nr wbc de_init error(not init). STT de_init error(not init). blkmv reset error(not init). rgmv reset error(not init). prjv reset error(not init). distcnt reset error(not init). dmcnt reset error(not init). dihismt reset error(not init). cyc buffer reset error(not init). prjh reset error(not init). nrmad reset error(not init). nr wbc reset error(not init). cccl wbc reset error(not init). die wbc reset error(not init). STT reset error(not init). rgmv get_info error(not init). distcnt get_info error(not init). prjh get_info error(not init). vpss cccl_cnt get_ref_info error(not init). die wbc get_wbc_info error(not init). blkmv get info error(not init). prjv get info error(not init). dmcnt get info error(not init). dihismt get info error(not init). blkmt get info error(not init). nr_mad get info error(not init). nr wbc get frame info error(not init). cccl wbc get frame info error(not init). cyc buffer getcfg error(not init). STT getcfg error(not init). blkmv complete error(not init). rgmv complete error(not init). prjv complete error(not init). distcnt complete error(not init). dmcnt complete error(not init). ccclcnt complete error(not init). cccl_cnt complete error(not init). dihismt complete error(not init). blkmt complete error(not init). cyc buffer complete error(not init). prjh complete error(not init). nrmad complete error(not init). nr wbc complete error(not init). cccl wbc complete error(not init). die wbc complete error(not init). STT complete error(not init). Delint failed(not init). VPSS src reset failed(not init). wbc deinit failed.(not init). -----------vpss src buffer status---------- -------------------------------VPSS%04x algorithm----------------------------- -------------------------------source_frame_list info------------------------------ --------------------------------orignal frame_info------------------------------- -----------------------------frame in node info------------------------------- -------------------------------thread info------------------------------- -------------------------------VPSS CTRL-------------------------------- --------------------------------revise frame_info--------------------------------- -----------------------------out_frame_list info--------------------------------- -------------------------------ctrl info--------------------------------- -------------------------------task[0x%x] info--------------------------------- -------------------------------VPSS%04x STATE--------------------------------- -----------------------------reference count info----------------------------------- --------------------------------tunl info------------------------------------- ------------------------------port[0x%x] info-------------------------------------- ------------------------------------VPSS--------------------------------------- ------------------------------------------------------------------------------- -------------------------performance statistics ----------------------------------- -------------------------vplugin info ----------------------------------- --------------------------------prog_info_condition ------------------------------- Stt deinit fail.(not init) STT de_init fail.(not init) Ctrl deinit failed. (not init) echo printframeaddr 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo outtestpattern 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printtunlinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printmemcinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo intestpattern 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printpqinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printvoinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo vpssbypass 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo pqbypass 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo colsecmp 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo setpause 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo outtunlenable 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:0(output tunl disable)/1(output tunl enable) echo intunlenable 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:0(input tunl disable)/1(input tunl enable) echo setinter 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:0(prog)/1(interlace) This chip can't support vpss id (%d) vpss para null pointer in %s! vpss input invaild bool in %s! set_node_info err! fix_task err! can't happen,error! set_node_info error! get_image error! line %d: fwrite fail! hiirq_platform_set_irq_reg for vpss1 fail! hiirq_platform_set_irq_reg for vpss0 fail! open file '%s' fail! write file '%s' fail! can not unmap in secure mode! can not map in secure mode! send ladder to vdp fail,port invalid! address is not valid! can't get original frm,memcpy_s failed! get node buffer failed! get node12 buffer failed! get node01 buffer failed! set_out_frame_info failed! get_cmp_size failed! get_image failed! get_src_image failed! vpss add proc failed! VPSS%d registe IRQ failed! mutex init dailed! no this node type:%d! get_lbd_info error frame w %d h %d,lbd top %d bot %d left %d right %d! get_lbd_info t %d b %d l %d r %d shift %d %d %d %d! error,en_lr = %d! hi_drv_mmz_alloc_and_map alloc failed,alloc size = %d! hi_drv_smmu_alloc or map alloc failed,alloc size = %d! hi_drv_secmmz_alloc alloc failed,alloc size = %d! hi_drv_secsmmu_alloc alloc failed,alloc size = %d! vir_addr is NULL,alloc size = %d! can't get instance %d proc! Framerate %d is out of limit,should be 1~500HZ! pointer is NULL! not same frame(%d), (%d)! set_node_info err!! start_rotate_task err!!! start 3d task err!!! start 2d task err!!! set_node_info ROTATION_C err!!! set_node_info ROTATION_Y error!!! invalid 3D type %d!!!!! vpss_comm_allocate_smmu_mem para is null !!!!!!!!!! vpss not use pq alg now !! vpss_comm_mem_map para is null !! vpss_comm_free_mmz_mem para is null ! vpss_comm_free_smmu_mem para is null ! memset_s failed ! _rel error full list id %d,addr %x rel frm_id %d,laddr %x,raddr %x VPSS queue_frame to vdp failed id %d laddr %x vpss node_timeout!!!! state = %x node_end_m_int!!!! state = %x vpss bus0 write error!!!! state = %x vpss bus0 read error!!!! state = %x vpss logic error, irq = %x [%d]timeout_err [%d]qfrm_tmvdp_reg_conflict_err [%d]cover_err [%d]cover_warn args is null [%d]wline over rline vmalloc instance node failed vpss_ctrl_add_instance failed vpss_ctrl_create_inst_proc failed [%d] add = %#x has changed to %#x before modified 2d image has been saved to '%s' W=%d H=%d format=%d image info:index %d type %d tun_addr %#x format %d W %d H %dprog %d field_mode %d buff_mode %d PTS %d rate %d last_flag %ddelta %d cmp_type %d,source_type %d,bit_width %d b_flip %d L:Y %#x C %#x YH %#x CH %#x YS %d CS %d R:Y %#x C %#x YH %#x CH %#x YS %d CS %d index=%d L:Y %#x C %#x YH %#x CH %#x YS %d CS %d R:Y %#x C %#x YH %#x CH %#x YS %d CS %d don't support. w: %d, [%d,%d] don't support. h: %d, [%d,%d] ful list node too big! wd_stat error in smmu mod !!! rd_stat error in smmu mod !!! PTW trans error in smmu mod !!! TLB missing in smmu mod !!! echo command inst_id/para1/para2 >/proc/msp/vpss_ctrl00 fn_vplugin_get_queue_buffer failed %08x fn_vplugin_get_param failed %08x fn_vplugin_get_enable failed %08x fn_vplugin_destroy_instance failed %08x fn_vplugin_start_instance failed %08x fn_vplugin_stop_instance failed %08x fn_vplugin_create_instance failed %08x fn_vplugin_dequeue_buffer failed! NULL pointer fn_vplugin_queue_buffer failed! NULL pointer fn_vplugin_get_param failed! NULL pointer fn_vplugin_get_enable failed! NULL pointer fn_vplugin_destory_instance failed! NULL pointer fn_vplugin_start_instance failed! NULL pointer fn_vplugin_stop_instance failed! NULL pointer fn_vplugin_create_instance failed! NULL pointer hi_drv_module_get_function HI_ID_PQ failed %08x, update_vpss_timing_info is null hi_drv_module_get_function HI_ID_PQ failed %08x, update_vpss_alg is null hi_drv_module_get_function HI_ID_PQ failed %08x, update_vpss_reg is null hi_drv_module_get_function HI_ID_PQ failed %08x, g_st_pq_ext_func is null hi_drv_module_get_function HI_ID_VPLUGIN failed %08x, g_st_vplugin_ext_func is null malloc vpss_state failed hi_drv_module_get_function HI_ID_PQ failed %08x hi_drv_module_get_function HI_ID_VPLUGIN failed %08x ffile->private_data is null Allocating memory total time %d ns A A A \ @ @ @ [ @ A @ \ F F F ` E E E F E ` E _ D F D ` C C C ] C _ C F C ` C @ E @ D A F A d A c @ g A f @ @ @ ` 0 @ P ` p 0 @ ` 0 @ P ` p @ A @ @ A @ A @ @ A @ A @ @ A @ A @ @ A
(, P, P P >: } VPSS0_ISR n VPSS1_ISR help vpssbypass printinfo a saveyuv pqbypass closecmp = setinter setpause u printvoinfo printpqinfo m printframeaddr intestpattern q outtestpattern ! rotateneedalg printtunlinfo ] refcntinfo intunlenable U outtunlenable setbuffnum readerrorstate M checkmemtime setframerate m setmescannum setmeversion logictime softwaretime openprint help /sdcard
.ARM.exidx .text .got .got.plt .rel.plt .bss .ARM.attributes .dynstr .data.rel.ro .rel.dyn .dynsym .gnu.hash .note.gnu.build-id .dynamic .ARM.extab .shstrtab .rodata .data