/kernel/linux/linux-5.10/arch/arm/lib/ |
D | findbit.S | 27 THUMB( lsr r3, r2, #3 ) 28 THUMB( ldrb r3, [r0, r3] ) 48 THUMB( lsr r3, r2, #3 ) 49 THUMB( ldrb r3, [r0, r3] ) 68 THUMB( lsr r3, r2, #3 ) 69 THUMB( ldrb r3, [r0, r3] ) 89 THUMB( lsr r3, r2, #3 ) 90 THUMB( ldrb r3, [r0, r3] ) 106 THUMB( lsr r3, #3 ) 107 THUMB( ldrb r3, [r0, r3] ) [all …]
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D | io-writesw-armv4.S | 76 THUMB( rsb r3, r3, #0 ) 77 THUMB( ldr r3, [r1, r3] ) 78 THUMB( sub r1, r3 )
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D | lshrdi3.S | 48 THUMB( lslmi r3, ah, ip ) 49 THUMB( orrmi al, al, r3 )
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D | ashrdi3.S | 48 THUMB( lslmi r3, ah, ip ) 49 THUMB( orrmi al, al, r3 )
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D | ashldi3.S | 48 THUMB( lsrmi r3, al, ip ) 49 THUMB( orrmi ah, ah, r3 )
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D | backtrace.S | 36 THUMB( moveq mask, #0xfc000000 ) 37 THUMB( orreq mask, #0x03 )
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D | div64.S | 181 THUMB( lsl xh, xh, ip ) 182 THUMB( orr yl, yl, xh )
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/kernel/linux/linux-5.10/arch/arm/kernel/ |
D | sleep.S | 42 THUMB( lsr \dst, \dst, \rs0 ) 45 THUMB( lsr \mask, \mask, \rs1 ) 46 THUMB( orr \dst, \dst, \mask ) 49 THUMB( lsr \mask, \mask, \rs2 ) 50 THUMB( orr \dst, \dst, \mask )
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D | entry-armv.S | 92 THUMB( stmia sp, {r0 - r12} ) 93 THUMB( str sp, [sp, #S_SP] ) 94 THUMB( str lr, [sp, #S_LR] ) 198 THUMB( ldr r5, [sp, #S_PSR] ) @ potentially updated CPSR 258 THUMB( tst r5, #PSR_T_BIT ) @ exception taken in Thumb mode? 259 THUMB( movne r1, #2 ) @ if so, fix up PC correction 312 THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT ) 313 THUMB( msr cpsr_c, r0 ) 317 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT ) 318 THUMB( msr cpsr_c, r0 ) [all …]
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D | debug.S | 132 THUMB( bkpt #0xab ) 134 THUMB( svc #0xab ) 147 THUMB( bkpt #0xab ) 149 THUMB( svc #0xab )
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D | head.S | 98 THUMB( badr r9, 1f ) @ Kernel is always entered in ARM. 99 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 100 THUMB( .thumb ) @ switch to Thumb now. 101 THUMB(1: ) 122 THUMB( it eq ) @ force fixup-able long branch encoding 129 THUMB( it lo ) @ force fixup-able long branch encoding 384 THUMB( badr r9, 1f ) @ Kernel is entered in ARM. 385 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 386 THUMB( .thumb ) @ switch to Thumb now. 387 THUMB(1: ) [all …]
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D | relocate_kernel.S | 67 THUMB( bx lr )
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D | head-nommu.S | 46 THUMB( badr r9, 1f ) @ Kernel is always entered in ARM. 47 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 48 THUMB( .thumb ) @ switch to Thumb now. 49 THUMB(1: )
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/kernel/linux/linux-5.10/arch/arm/include/asm/ |
D | unified.h | 35 #define THUMB(x...) x macro 48 #define THUMB(x...)
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D | assembler.h | 218 THUMB( mov \rd, sp ) 219 THUMB( lsr \rd, \rd, #THREAD_SIZE_ORDER + PAGE_SHIFT ) 357 THUMB( orr \reg , \reg , #PSR_T_BIT ) 508 THUMB( ittt \c )
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/kernel/linux/linux-5.10/arch/arm/mm/ |
D | alignment.c | 200 THUMB( "1: "ins" %1, [%2]\n" ) \ 201 THUMB( " add %2, %2, #1\n" ) \ 255 THUMB( "1: "ins" %1, [%2]\n" ) \ 256 THUMB( " add %2, %2, #1\n" ) \ 284 THUMB( "1: "ins" %1, [%2]\n" ) \ 285 THUMB( " add %2, %2, #1\n" ) \ 288 THUMB( "2: "ins" %1, [%2]\n" ) \ 289 THUMB( " add %2, %2, #1\n" ) \ 292 THUMB( "3: "ins" %1, [%2]\n" ) \ 293 THUMB( " add %2, %2, #1\n" ) \
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D | cache-v7.S | 159 THUMB( lsl r6, r4, r5 ) 160 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11 162 THUMB( lsl r6, r9, r2 ) 163 THUMB( orr r11, r11, r6 ) @ factor index number into r11 197 THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) 203 THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) 215 THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) 221 THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} )
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D | proc-v7-2level.S | 101 THUMB( add r0, r0, #2048 ) 102 THUMB( str r3, [r0] )
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/kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
D | debug.S | 31 THUMB( bkpt #0xab ) 33 THUMB( svc #0xab )
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D | head.S | 145 THUMB( isb ) 254 THUMB( svc 0xab ) @ angel_SWI_THUMB 1036 THUMB( addeq r12, r3 ) 1037 THUMB( moveq pc, r12 ) @ call cache function 1061 THUMB( nop ) 1063 THUMB( nop ) 1065 THUMB( nop ) 1070 THUMB( nop ) 1072 THUMB( nop ) 1074 THUMB( nop ) [all …]
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/kernel/linux/linux-5.10/arch/arm/common/ |
D | mcpm_head.S | 48 THUMB( badr r12, 1f ) 49 THUMB( bx r12 ) 50 THUMB( .thumb )
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/kernel/liteos_m/arch/arm/cortex-m3/keil/ |
D | los_atomic.S | 40 THUMB 52 THUMB
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/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/secure/ |
D | los_secure_context_asm.S | 41 THUMB
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/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/secure/ |
D | los_secure_context_asm.S | 41 THUMB
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/kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
D | reset-handler.S | 39 THUMB( it ne ) 200 THUMB( add lr, lr, #1 ) @ switch to Thumb mode
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