1; 2; Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved. 3; 4; Redistribution and use in source and binary forms, with or without modification, 5; are permitted provided that the following conditions are met: 6; 7; 1. Redistributions of source code must retain the above copyright notice, this list of 8; conditions and the following disclaimer. 9; 10; 2. Redistributions in binary form must reproduce the above copyright notice, this list 11; of conditions and the following disclaimer in the documentation and/or other materials 12; provided with the distribution. 13; 14; 3. Neither the name of the copyright holder nor the names of its contributors may be used 15; to endorse or promote products derived from this software without specific prior written 16; permission. 17; 18; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 20; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 22; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 23; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 24; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 25; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 27; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 28; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29; 30 31 EXPORT ArchAtomicRead 32 EXPORT ArchAtomicSet 33 EXPORT ArchAtomicAdd 34 EXPORT ArchAtomicSub 35 EXPORT ArchAtomicXchg32bits 36 EXPORT ArchAtomicCmpXchg32bits 37 38 PRESERVE8 39 AREA |.text|, CODE, READONLY 40 THUMB 41 42 43 EXPORT ArchAtomicRead 44 EXPORT ArchAtomicSet 45 EXPORT ArchAtomicAdd 46 EXPORT ArchAtomicSub 47 EXPORT ArchAtomicXchg32bits 48 EXPORT ArchAtomicCmpXchg32bits 49 50 PRESERVE8 51 AREA |.text|, CODE, READONLY 52 THUMB 53 54ArchAtomicRead 55 ldrex r1, [r0] 56 mov r0, r1 57 bx lr 58 59ArchAtomicSet 60 ldrex r2, [r0] 61 strex r3, r1, [r0] 62 teq r3, #0 63 bne ArchAtomicSet 64 bx lr 65 66ArchAtomicAdd 67 ldrex r2, [r0] 68 add r2, r2, r1 69 strex r3, r2, [r0] 70 teq r3, #0 71 bne ArchAtomicAdd 72 mov r0, r2 73 bx lr 74 75ArchAtomicSub 76 ldrex r2, [r0] 77 sub r2, r2, r1 78 strex r3, r2, [r0] 79 teq r3, #0 80 bne ArchAtomicSub 81 mov r0, r2 82 bx lr 83 84ArchAtomicXchg32bits 85 ldrex r2, [r0] 86 strex r3, r1, [r0] 87 teq r3, #0 88 bne ArchAtomicXchg32bits 89 mov r0, r2 90 91ArchAtomicCmpXchg32bits 92 ldrex r3, [r0] 93 cmp r3, r2 94 bne end 95 strex r4, r1, [r0] 96 teq r4, #0 97 bne ArchAtomicCmpXchg32bits 98end 99