/kernel/linux/linux-5.10/drivers/gpio/ |
D | gpio-omap.c | 77 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable); 83 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument 108 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, in omap_set_gpio_direction() argument 111 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction() 117 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument 120 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg() 124 reg += bank->regs->set_dataout; in omap_set_gpio_dataout_reg() 125 bank->context.dataout |= l; in omap_set_gpio_dataout_reg() 127 reg += bank->regs->clr_dataout; in omap_set_gpio_dataout_reg() 128 bank->context.dataout &= ~l; in omap_set_gpio_dataout_reg() [all …]
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D | gpio-brcmstb.c | 36 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32))) argument 37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument 38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument 39 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument 40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument 41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument 42 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument 43 #define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL) argument 44 #define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT) argument 76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv() local [all …]
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D | gpio-tegra.c | 62 unsigned int bank; member 107 static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port, in tegra_gpio_compose() argument 110 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7); in tegra_gpio_compose() 228 struct tegra_gpio_bank *bank = &tgi->bank_info[GPIO_BANK(offset)]; in tegra_gpio_set_debounce() local 245 spin_lock_irqsave(&bank->dbc_lock[port], flags); in tegra_gpio_set_debounce() 246 if (bank->dbc_cnt[port] < debounce_ms) { in tegra_gpio_set_debounce() 248 bank->dbc_cnt[port] = debounce_ms; in tegra_gpio_set_debounce() 250 spin_unlock_irqrestore(&bank->dbc_lock[port], flags); in tegra_gpio_set_debounce() 278 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_ack() local 279 struct tegra_gpio_info *tgi = bank->tgi; in tegra_gpio_irq_ack() [all …]
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D | gpio-f7188x.c | 78 struct f7188x_gpio_bank *bank; member 260 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_get_direction() local 261 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_get_direction() 269 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_get_direction() 282 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_direction_in() local 283 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_direction_in() 291 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_direction_in() 293 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in() 303 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_get() local 304 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_get() [all …]
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D | gpio-aspeed-sgpio.c | 100 const struct aspeed_sgpio_bank *bank, in bank_reg() argument 105 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg() 107 return gpio->base + bank->rdata_reg; in bank_reg() 109 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg() 111 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg() 113 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg() 115 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg() 117 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS; in bank_reg() 130 unsigned int bank; in to_bank() local 132 bank = GPIO_BANK(offset); in to_bank() [all …]
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/kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
D | sh_pfc.h | 448 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ argument 449 fn(bank, pin, GP_##bank##_##pin, sfx, cfg) 450 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument 452 #define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ argument 453 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \ 454 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \ 455 PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \ 456 PORT_GP_CFG_1(bank, 3, fn, sfx, cfg) 457 #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) argument 459 #define PORT_GP_CFG_6(bank, fn, sfx, cfg) \ argument [all …]
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/kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
D | pinctrl-exynos.c | 56 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local 57 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask() 61 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask() 63 mask = readl(bank->eint_base + reg_mask); in exynos_irq_mask() 65 writel(mask, bank->eint_base + reg_mask); in exynos_irq_mask() 67 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask() 74 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local 75 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack() 77 writel(1 << irqd->hwirq, bank->eint_base + reg_pend); in exynos_irq_ack() 84 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local [all …]
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D | pinctrl-samsung.c | 359 struct samsung_pin_bank **bank) in pin_to_reg_bank() argument 371 if (bank) in pin_to_reg_bank() 372 *bank = b; in pin_to_reg_bank() 381 struct samsung_pin_bank *bank; in samsung_pinmux_setup() local 393 ®, &pin_offset, &bank); in samsung_pinmux_setup() 394 type = bank->type; in samsung_pinmux_setup() 403 spin_lock_irqsave(&bank->slock, flags); in samsung_pinmux_setup() 410 spin_unlock_irqrestore(&bank->slock, flags); in samsung_pinmux_setup() 436 struct samsung_pin_bank *bank; in samsung_pinconf_rw() local 445 &pin_offset, &bank); in samsung_pinconf_rw() [all …]
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D | pinctrl-s3c24xx.c | 101 struct samsung_pin_bank *bank; member 139 struct samsung_pin_bank *bank, int pin) in s3c24xx_eint_set_function() argument 141 const struct samsung_pin_bank_type *bank_type = bank->type; in s3c24xx_eint_set_function() 149 reg = d->virt_base + bank->pctl_offset; in s3c24xx_eint_set_function() 153 spin_lock_irqsave(&bank->slock, flags); in s3c24xx_eint_set_function() 157 val |= bank->eint_func << shift; in s3c24xx_eint_set_function() 160 spin_unlock_irqrestore(&bank->slock, flags); in s3c24xx_eint_set_function() 165 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c24xx_eint_type() local 166 struct samsung_pinctrl_drv_data *d = bank->drvdata; in s3c24xx_eint_type() 167 int index = bank->eint_offset + data->hwirq; in s3c24xx_eint_type() [all …]
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D | pinctrl-s3c64xx.c | 213 struct samsung_pin_bank *bank; member 268 struct samsung_pin_bank *bank, int pin) in s3c64xx_irq_set_function() argument 270 const struct samsung_pin_bank_type *bank_type = bank->type; in s3c64xx_irq_set_function() 278 reg = d->virt_base + bank->pctl_offset; in s3c64xx_irq_set_function() 289 spin_lock_irqsave(&bank->slock, flags); in s3c64xx_irq_set_function() 293 val |= bank->eint_func << shift; in s3c64xx_irq_set_function() 296 spin_unlock_irqrestore(&bank->slock, flags); in s3c64xx_irq_set_function() 305 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in s3c64xx_gpio_irq_set_mask() local 306 struct samsung_pinctrl_drv_data *d = bank->drvdata; in s3c64xx_gpio_irq_set_mask() 307 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask() [all …]
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/kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/ |
D | adf_transport.c | 36 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_reserve_ring() argument 38 spin_lock(&bank->lock); in adf_reserve_ring() 39 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring() 40 spin_unlock(&bank->lock); in adf_reserve_ring() 43 bank->ring_mask |= (1 << ring); in adf_reserve_ring() 44 spin_unlock(&bank->lock); in adf_reserve_ring() 48 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_unreserve_ring() argument 50 spin_lock(&bank->lock); in adf_unreserve_ring() 51 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring() 52 spin_unlock(&bank->lock); in adf_unreserve_ring() [all …]
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D | adf_transport_access_macros.h | 77 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument 78 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 80 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument 81 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 83 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument 84 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 86 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument 87 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 89 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument 94 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ [all …]
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D | adf_transport_debug.c | 44 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show() local 45 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show() 50 head = READ_CSR_RING_HEAD(csr, bank->bank_number, in adf_ring_show() 52 tail = READ_CSR_RING_TAIL(csr, bank->bank_number, in adf_ring_show() 54 empty = READ_CSR_E_STAT(csr, bank->bank_number); in adf_ring_show() 60 ring->ring_number, ring->bank->bank_number); in adf_ring_show() 103 ring->bank->bank_debug_dir, in adf_ring_debugfs_add() 140 struct adf_etr_bank_data *bank = sfile->private; in adf_bank_show() local 144 bank->bank_number); in adf_bank_show() 147 struct adf_etr_ring_data *ring = &bank->rings[ring_id]; in adf_bank_show() [all …]
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/kernel/linux/linux-5.10/drivers/pinctrl/stm32/ |
D | pinctrl-stm32.c | 153 static void stm32_gpio_backup_value(struct stm32_gpio_bank *bank, in stm32_gpio_backup_value() argument 156 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value() 157 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value() 160 static void stm32_gpio_backup_mode(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_mode() argument 163 bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK | in stm32_gpio_backup_mode() 165 bank->pin_backup[offset] |= mode << STM32_GPIO_BKP_MODE_SHIFT; in stm32_gpio_backup_mode() 166 bank->pin_backup[offset] |= alt << STM32_GPIO_BKP_ALT_SHIFT; in stm32_gpio_backup_mode() 169 static void stm32_gpio_backup_driving(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_driving() argument 172 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_TYPE); in stm32_gpio_backup_driving() 173 bank->pin_backup[offset] |= drive << STM32_GPIO_BKP_TYPE; in stm32_gpio_backup_driving() [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
D | iotiming-s3c2412.c | 41 unsigned int bank; in s3c2412_print_timing() local 43 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing() 44 bt = iot->bank[bank].io_2412; in s3c2412_print_timing() 49 "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, in s3c2412_print_timing() 142 int bank; in s3c2412_iotiming_calc() local 145 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_calc() 146 bt = iot->bank[bank].io_2412; in s3c2412_iotiming_calc() 153 __func__, bank); in s3c2412_iotiming_calc() 176 int bank; in s3c2412_iotiming_set() local 180 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_set() [all …]
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D | iotiming-s3c2410.c | 35 int bank; in s3c2410_print_timing() local 37 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing() 38 bt = timings->bank[bank].io_2410; in s3c2410_print_timing() 43 "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, in s3c2410_print_timing() 56 static inline void __iomem *bank_reg(unsigned int bank) in bank_reg() argument 58 return S3C2410_BANKCON0 + (bank << 2); in bank_reg() 362 int bank; in s3c2410_iotiming_calc() local 365 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_iotiming_calc() 366 bankcon = __raw_readl(bank_reg(bank)); in s3c2410_iotiming_calc() 367 bt = iot->bank[bank].io_2410; in s3c2410_iotiming_calc() [all …]
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/kernel/linux/linux-5.10/arch/x86/kernel/cpu/mce/ |
D | amd.c | 120 static enum smca_bank_types smca_get_bank_type(unsigned int bank) in smca_get_bank_type() argument 124 if (bank >= MAX_NR_BANKS) in smca_get_bank_type() 127 b = &smca_banks[bank]; in smca_get_bank_type() 214 static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu) in smca_set_misc_banks_map() argument 222 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high)) in smca_set_misc_banks_map() 228 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high)) in smca_set_misc_banks_map() 232 per_cpu(smca_misc_banks_map, cpu) |= BIT(bank); in smca_set_misc_banks_map() 236 static void smca_configure(unsigned int bank, unsigned int cpu) in smca_configure() argument 241 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); in smca_configure() 273 smca_set_misc_banks_map(bank, cpu); in smca_configure() [all …]
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/kernel/linux/linux-5.10/drivers/pinctrl/ |
D | pinctrl-rockchip.c | 348 void (*pull_calc_reg)(struct rockchip_pin_bank *bank, 351 void (*drv_calc_reg)(struct rockchip_pin_bank *bank, 354 int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank, 780 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, in rockchip_get_recalced_mux() argument 783 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_recalced_mux() 790 if (data->num == bank->bank_num && in rockchip_get_recalced_mux() 1397 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, in rockchip_get_mux_route() argument 1400 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux_route() 1407 if ((data->bank_num == bank->bank_num) && in rockchip_get_mux_route() 1422 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument [all …]
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D | pinctrl-oxnas.c | 30 #define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK) argument 71 unsigned int bank; member 275 .bank = _pin / PINS_PER_BANK, \ 601 fname, pg->bank, pg->pin, in oxnas_ox810se_pinmux_enable() 605 (pg->bank ? in oxnas_ox810se_pinmux_enable() 612 (pg->bank ? in oxnas_ox810se_pinmux_enable() 619 (pg->bank ? in oxnas_ox810se_pinmux_enable() 645 unsigned int offset = (pg->bank ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_pinmux_enable() 652 fname, pg->bank, pg->pin, in oxnas_ox820_pinmux_enable() 697 struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); in oxnas_ox810se_gpio_request_enable() local [all …]
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/kernel/linux/linux-5.10/drivers/net/phy/mscc/ |
D | mscc_macsec.c | 23 enum macsec_bank bank, u32 reg) in vsc8584_macsec_phy_read() argument 34 MSCC_PHY_MACSEC_20_TARGET(bank >> 2)); in vsc8584_macsec_phy_read() 36 if (bank >> 2 == 0x1) in vsc8584_macsec_phy_read() 38 bank &= 0x3; in vsc8584_macsec_phy_read() 40 bank = 0; in vsc8584_macsec_phy_read() 45 MSCC_PHY_MACSEC_19_TARGET(bank)); in vsc8584_macsec_phy_read() 62 enum macsec_bank bank, u32 reg, u32 val) in vsc8584_macsec_phy_write() argument 72 MSCC_PHY_MACSEC_20_TARGET(bank >> 2)); in vsc8584_macsec_phy_write() 74 if ((bank >> 2 == 0x1) || (bank >> 2 == 0x3)) in vsc8584_macsec_phy_write() 75 bank &= 0x3; in vsc8584_macsec_phy_write() [all …]
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/kernel/linux/linux-5.10/drivers/bus/ |
D | uniphier-system-bus.c | 35 struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS]; member 39 int bank, u32 addr, u64 paddr, u32 size) in uniphier_system_bus_add_bank() argument 45 bank, addr, paddr, size); in uniphier_system_bus_add_bank() 47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank() 48 dev_err(priv->dev, "unsupported bank number %d\n", bank); in uniphier_system_bus_add_bank() 52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank() 54 "range for bank %d has already been specified\n", bank); in uniphier_system_bus_add_bank() 86 priv->bank[bank].base = paddr; in uniphier_system_bus_add_bank() 87 priv->bank[bank].end = end; in uniphier_system_bus_add_bank() 90 bank, priv->bank[bank].base, priv->bank[bank].end); in uniphier_system_bus_add_bank() [all …]
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/kernel/linux/linux-5.10/drivers/dma/ipu/ |
D | ipu_irq.c | 72 struct ipu_irq_bank *bank; member 96 struct ipu_irq_bank *bank; in ipu_irq_unmask() local 102 bank = map->bank; in ipu_irq_unmask() 103 if (!bank) { in ipu_irq_unmask() 109 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_unmask() 111 ipu_write_reg(bank->ipu, reg, bank->control); in ipu_irq_unmask() 119 struct ipu_irq_bank *bank; in ipu_irq_mask() local 125 bank = map->bank; in ipu_irq_mask() 126 if (!bank) { in ipu_irq_mask() 132 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_mask() [all …]
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/kernel/linux/linux-5.10/sound/pci/au88x0/ |
D | au88x0_wt.h | 21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */ argument 22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */ argument 23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */ argument 24 #define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) /* 0x000c */ argument 25 #define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) /* 0x0010 */ argument 26 #define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) /* 0x0014 */ argument
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/kernel/linux/linux-5.10/drivers/pinctrl/sunxi/ |
D | pinctrl-sunxi.h | 32 #define SUNXI_PINCTRL_PIN(bank, pin) \ argument 33 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin) 237 u8 bank = pin / PINS_PER_BANK; in sunxi_mux_reg() local 238 u32 offset = bank * BANK_MEM_SIZE; in sunxi_mux_reg() 252 u8 bank = pin / PINS_PER_BANK; in sunxi_data_reg() local 253 u32 offset = bank * BANK_MEM_SIZE; in sunxi_data_reg() 267 u8 bank = pin / PINS_PER_BANK; in sunxi_dlevel_reg() local 268 u32 offset = bank * BANK_MEM_SIZE; in sunxi_dlevel_reg() 282 u8 bank = pin / PINS_PER_BANK; in sunxi_pull_reg() local 283 u32 offset = bank * BANK_MEM_SIZE; in sunxi_pull_reg() [all …]
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/kernel/linux/linux-5.10/drivers/leds/ |
D | leds-tca6507.c | 162 struct bank { struct 167 } bank[3]; member 178 int bank; /* Bank used, or -1 */ member 283 static void set_code(struct tca6507_chip *tca, int reg, int bank, int new) in set_code() argument 287 if (bank) { in set_code() 300 static void set_level(struct tca6507_chip *tca, int bank, int level) in set_level() argument 302 switch (bank) { in set_level() 305 set_code(tca, TCA6507_MAX_INTENSITY, bank, level); in set_level() 311 tca->bank[bank].level = level; in set_level() 315 static void set_times(struct tca6507_chip *tca, int bank) in set_times() argument [all …]
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