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/kernel/linux/linux-5.10/drivers/ide/
Dide-timings.c72 u16 cycle = 0; in ide_pio_cycle_time() local
76 cycle = id[ATA_ID_EIDE_PIO_IORDY]; in ide_pio_cycle_time()
78 cycle = id[ATA_ID_EIDE_PIO]; in ide_pio_cycle_time()
81 if (pio < 3 && cycle < t->cycle) in ide_pio_cycle_time()
82 cycle = 0; /* use standard timing */ in ide_pio_cycle_time()
86 cycle = 0; in ide_pio_cycle_time()
89 return cycle ? cycle : t->cycle; in ide_pio_cycle_time()
105 q->cycle = EZ(t->cycle, T); in ide_timing_quantize()
125 m->cycle = max(a->cycle, b->cycle); in ide_timing_merge()
158 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ide_timing_compute()
[all …]
Dtx4938ide.c30 unsigned int cycle = 1000000000 / clock; in tx4938ide_tune_ebusc() local
35 wt = DIV_ROUND_UP(t->act8b, cycle) - 2; in tx4938ide_tune_ebusc()
37 wt = max_t(int, wt, DIV_ROUND_UP(35, cycle)); in tx4938ide_tune_ebusc()
43 shwt = DIV_ROUND_UP(t->setup, cycle); in tx4938ide_tune_ebusc()
46 while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle) in tx4938ide_tune_ebusc()
53 ebus_ch, cycle, wt, shwt); in tx4938ide_tune_ebusc()
/kernel/linux/linux-5.10/drivers/vme/bridges/
Dvme_fake.c49 u32 cycle; member
57 u32 cycle; member
156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument
213 bridge->slaves[i].cycle = cycle; in fake_slave_set()
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument
241 *cycle = bridge->slaves[i].cycle; in fake_slave_get()
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
321 bridge->masters[i].cycle = cycle; in fake_master_set()
340 u32 *aspace, u32 *cycle, u32 *dwidth) in __fake_master_get() argument
353 *cycle = bridge->masters[i].cycle; in __fake_master_get()
[all …]
Dvme_tsi148.c473 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
561 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { in tsi148_slave_set()
575 if (cycle & VME_BLT) in tsi148_slave_set()
577 if (cycle & VME_MBLT) in tsi148_slave_set()
579 if (cycle & VME_2eVME) in tsi148_slave_set()
581 if (cycle & VME_2eSST) in tsi148_slave_set()
583 if (cycle & VME_2eSSTB) in tsi148_slave_set()
591 if (cycle & VME_SUPER) in tsi148_slave_set()
593 if (cycle & VME_USER) in tsi148_slave_set()
595 if (cycle & VME_PROG) in tsi148_slave_set()
[all …]
Dvme_ca91cx42.c335 dma_addr_t pci_base, u32 aspace, u32 cycle) in ca91cx42_slave_set() argument
419 if (cycle & VME_SUPER) in ca91cx42_slave_set()
421 if (cycle & VME_USER) in ca91cx42_slave_set()
423 if (cycle & VME_PROG) in ca91cx42_slave_set()
425 if (cycle & VME_DATA) in ca91cx42_slave_set()
441 dma_addr_t *pci_base, u32 *aspace, u32 *cycle) in ca91cx42_slave_get() argument
468 *cycle = 0; in ca91cx42_slave_get()
485 *cycle |= VME_SUPER; in ca91cx42_slave_get()
487 *cycle |= VME_USER; in ca91cx42_slave_get()
489 *cycle |= VME_PROG; in ca91cx42_slave_get()
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dlibata-pata-timings.c70 q->cycle = EZ(t->cycle, T); in ata_timing_quantize()
92 m->cycle = max(a->cycle, b->cycle); in ata_timing_merge()
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ata_timing_compute()
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; in ata_timing_compute()
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; in ata_timing_compute()
177 if (t->active + t->recover < t->cycle) { in ata_timing_compute()
178 t->active += (t->cycle - (t->active + t->recover)) / 2; in ata_timing_compute()
179 t->recover = t->cycle - t->active; in ata_timing_compute()
187 if (t->active + t->recover > t->cycle) in ata_timing_compute()
188 t->cycle = t->active + t->recover; in ata_timing_compute()
/kernel/liteos_a/arch/arm/arm/src/
Dlos_hw_tick.c55 UINT64 cycle = HalClockGetCycles(); in LOS_GetCpuCycle() local
57 *highCnt = cycle >> 32; /* 32: offset 32 bits and retain high bits */ in LOS_GetCpuCycle()
58 *lowCnt = cycle & 0xFFFFFFFFU; in LOS_GetCpuCycle()
63 UINT64 cycle = HalClockGetCycles(); in LOS_CurrNanosec() local
64 …return (cycle / g_sysClock) * OS_SYS_NS_PER_SECOND + (cycle % g_sysClock) * OS_SYS_NS_PER_SECOND /… in LOS_CurrNanosec()
/kernel/linux/linux-5.10/scripts/
Dheaderdep.pl116 my $cycle = shift;
119 for my $i (0 .. $#$cycle - 1) {
120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0];
122 $cycle->[-1]->[0] = 0;
124 my $first = shift @$cycle;
125 my $last = pop @$cycle;
130 for my $header (reverse @$cycle) {
/kernel/linux/linux-5.10/arch/alpha/lib/
Dev6-csum_ipv6_magic.S116 cmpult $20,$3,$3 # E : (1 cycle stall on $20)
117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20)
120 addq $20,$19,$20 # E : (1 cycle stall on $20)
125 addq $18,$19,$18 # E : (1 cycle stall on $19)
131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0)
133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0)
136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1)
137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stall on $1)
138 extwl $1,4,$1 # U : ushort[2] (1 cycle stall on $1)
143 extwl $3,2,$1 # U : ushort[1] (1 cycle stall on $3)
[all …]
/kernel/liteos_m/kernel/include/
Dlos_tick.h154 #define OS_SYS_CYCLE_TO_NS(cycle, freq) ((cycle) / (freq)) * OS_SYS_NS_PER_SECOND + \ argument
155 ((cycle) % (freq) * OS_SYS_NS_PER_SECOND / (freq))
162 #define OS_SYS_CYCLE_TO_TICK(cycle) ((((UINT64)(cycle)) * LOSCFG_BASE_CORE_TICK_PER_SECOND) / g_sys… argument
609 STATIC_INLINE UINT64 OsCycle2MS(UINT64 cycle) in OsCycle2MS() argument
611 return (UINT64)((cycle / (g_sysClock / OS_SYS_MS_PER_SECOND))); in OsCycle2MS()
632 STATIC_INLINE UINT64 OsCycle2US(UINT64 cycle) in OsCycle2US() argument
638 return (UINT64)(cycle / tmp); in OsCycle2US()
/kernel/linux/linux-5.10/kernel/locking/
Dtest-ww_mutex.c248 struct test_cycle *cycle = container_of(work, typeof(*cycle), work); in test_cycle_work() local
253 ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work()
255 complete(cycle->a_signal); in test_cycle_work()
256 wait_for_completion(&cycle->b_signal); in test_cycle_work()
258 err = ww_mutex_lock(cycle->b_mutex, &ctx); in test_cycle_work()
261 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work()
262 ww_mutex_lock_slow(cycle->b_mutex, &ctx); in test_cycle_work()
263 erra = ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work()
267 ww_mutex_unlock(cycle->b_mutex); in test_cycle_work()
269 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work()
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/kernel/linux/linux-5.10/fs/xfs/
Dxfs_log_priv.h496 xlog_crack_atomic_lsn(atomic64_t *lsn, uint *cycle, uint *block) in xlog_crack_atomic_lsn() argument
500 *cycle = CYCLE_LSN(val); in xlog_crack_atomic_lsn()
508 xlog_assign_atomic_lsn(atomic64_t *lsn, uint cycle, uint block) in xlog_assign_atomic_lsn() argument
510 atomic64_set(lsn, xlog_assign_lsn(cycle, block)); in xlog_assign_atomic_lsn()
519 xlog_crack_grant_head_val(int64_t val, int *cycle, int *space) in xlog_crack_grant_head_val() argument
521 *cycle = val >> 32; in xlog_crack_grant_head_val()
526 xlog_crack_grant_head(atomic64_t *head, int *cycle, int *space) in xlog_crack_grant_head() argument
528 xlog_crack_grant_head_val(atomic64_read(head), cycle, space); in xlog_crack_grant_head()
532 xlog_assign_grant_head_val(int cycle, int space) in xlog_assign_grant_head_val() argument
534 return ((int64_t)cycle << 32) | space; in xlog_assign_grant_head_val()
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-atmel-pit.c43 u32 cycle; member
85 elapsed += PIT_PICNT(t) * data->cycle; in read_pit_clk()
95 pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN); in pit_clkevt_shutdown()
107 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR)); in pit_clkevt_set_periodic()
109 (data->cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN); in pit_clkevt_set_periodic()
132 (data->cycle - 1) | AT91_PIT_PITEN); in at91sam926x_pit_reset()
153 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, in at91sam926x_pit_interrupt()
210 data->cycle = DIV_ROUND_CLOSEST(pit_rate, HZ); in at91sam926x_pit_dt_init()
211 WARN_ON(((data->cycle - 1) & ~AT91_PIT_PIV) != 0); in at91sam926x_pit_dt_init()
220 bits = 12 /* PICNT */ + ilog2(data->cycle) /* PIV */; in at91sam926x_pit_dt_init()
/kernel/linux/linux-5.10/tools/power/cpupower/bench/
Dbenchmark.c80 unsigned int _round, cycle; in start_benchmark() local
125 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
151 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
/kernel/linux/linux-5.10/sound/firewire/
Damdtp-stream.c507 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle, in build_it_pkt_header() argument
528 trace_amdtp_packet(s, cycle, cip_header, payload_length, data_blocks, in build_it_pkt_header()
628 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle, in parse_ir_ctx_header() argument
670 trace_amdtp_packet(s, cycle, cip_header, *payload_length, *data_blocks, in parse_ir_ctx_header()
685 static inline u32 increment_cycle_count(u32 cycle, unsigned int addend) in increment_cycle_count() argument
687 cycle += addend; in increment_cycle_count()
688 if (cycle >= OHCI_MAX_SECOND * CYCLES_PER_SECOND) in increment_cycle_count()
689 cycle -= OHCI_MAX_SECOND * CYCLES_PER_SECOND; in increment_cycle_count()
690 return cycle; in increment_cycle_count()
700 u32 cycle = compute_cycle_count(ctx_header_tstamp); in compute_it_cycle() local
[all …]
/kernel/linux/linux-5.10/drivers/pwm/
Dpwm-sl28cpld.c124 unsigned int cycle, prescaler; in sl28cpld_pwm_apply() local
147 cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle); in sl28cpld_pwm_apply()
148 cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)); in sl28cpld_pwm_apply()
158 if (cycle == SL28CPLD_PWM_MAX_DUTY_CYCLE(0)) { in sl28cpld_pwm_apply()
161 cycle = SL28CPLD_PWM_MAX_DUTY_CYCLE(1); in sl28cpld_pwm_apply()
176 ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); in sl28cpld_pwm_apply()
186 ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); in sl28cpld_pwm_apply()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/
Dpwm-vibrator.txt4 strength increases based on the duty cycle of the enable PWM channel
5 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
8 driven at fixed duty cycle. If available this is can be used to increase
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
64 direction-duty-cycle-ns = <1000000000>;
/kernel/uniproton/src/core/kernel/sys/
Dprt_sys_init.c60 OS_SEC_L4_TEXT U64 PRT_ClkCycle2Ms(U64 cycle) in PRT_ClkCycle2Ms() argument
62 return DIV64(cycle, g_systemClock / OS_SYS_MS_PER_SECOND); in PRT_ClkCycle2Ms()
65 OS_SEC_L4_TEXT U64 PRT_ClkCycle2Us(U64 cycle) in PRT_ClkCycle2Us() argument
67 return DIV64(cycle, g_systemClock / OS_SYS_US_PER_SECOND); in PRT_ClkCycle2Us()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.txt7 predefined voltage <=> duty-cycle values must be
10 Intermediary duty-cycle values which would normally
19 appropriate duty-cycle values. This allows for a much
22 assumption that a %50 duty-cycle value will cause the
35 Second cell is duty-cycle in percent (%)
38 - pwm-dutycycle-unit: Integer value encoding the duty cycle unit. If not
46 Duty cycle values are expressed in pwm-dutycycle-unit.
71 * Inverted PWM logic, and the duty cycle range is limited
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/igc/
Digc_tsn.c67 u32 sec, nsec, cycle; in igc_tsn_enable_offload() local
74 cycle = adapter->cycle_time; in igc_tsn_enable_offload()
85 wr32(IGC_QBVCYCLET_S, cycle); in igc_tsn_enable_offload()
86 wr32(IGC_QBVCYCLET, cycle); in igc_tsn_enable_offload()
119 n = div64_s64(ktime_sub_ns(systim, base_time), cycle); in igc_tsn_enable_offload()
120 base_time = ktime_add_ns(base_time, (n + 1) * cycle); in igc_tsn_enable_offload()
/kernel/linux/linux-5.10/drivers/vme/
Dvme.c172 u32 aspace, cycle, dwidth; in vme_get_size() local
177 &aspace, &cycle, &dwidth); in vme_get_size()
185 &buf_base, &aspace, &cycle); in vme_get_size()
291 u32 cycle) in vme_slave_request() argument
318 ((slave_image->cycle_attr & cycle) == cycle) && in vme_slave_request()
372 dma_addr_t buf_base, u32 aspace, u32 cycle) in vme_slave_set() argument
391 ((image->cycle_attr & cycle) == cycle))) { in vme_slave_set()
401 aspace, cycle); in vme_slave_set()
422 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in vme_slave_get() argument
440 aspace, cycle); in vme_slave_get()
[all …]
/kernel/liteos_a/kernel/extended/cpup/
Dlos_cpup.c90 UINT64 cycle, cycleIncrement; in OsCpupGuard() local
96 cycle = OsGetCpuCycle(); in OsCpupGuard()
99 cpuHistoryTime[prevPos] = cycle; in OsCpupGuard()
131 cycle = OsGetCpuCycle(); in OsCpupGuard()
132 cycleIncrement = cycle - taskCB->taskCpup.startTime; in OsCpupGuard()
188 STATIC VOID OsResetCpup(OsCpupBase *cpup, UINT64 cycle) in OsResetCpup() argument
192 cpup->startTime = cycle; in OsResetCpup()
193 cpup->allTime = cycle; in OsResetCpup()
195 cpup->historyTime[loop] = cycle; in OsResetCpup()
204 UINT64 cycle; in LOS_CpupReset() local
[all …]
/kernel/uniproton/src/arch/cpu/armv7-m/common/tick/
Dprt_hw_tick_minor.c49 U64 cycle; in PRT_ClkGetCycleCount64() local
53 cycle = g_cycleNow; in PRT_ClkGetCycleCount64()
55 return cycle; in PRT_ClkGetCycleCount64()
/kernel/linux/linux-5.10/arch/mips/dec/
Dkn02xa-berr.c53 const char *kind, *agent, *cycle, *event; in dec_kn02xa_be_backend() local
72 cycle = mreadstr; in dec_kn02xa_be_backend()
75 cycle = invoker ? writestr : readstr; in dec_kn02xa_be_backend()
84 kind, agent, cycle, event, address); in dec_kn02xa_be_backend()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dgpmc-nor.txt21 - gpmc,access-ns: Start cycle to first data capture (read access)
22 - gpmc,rd-cycle-ns: Total read cycle time
23 - gpmc,wr-cycle-ns: Total write cycle time
70 gpmc,rd-cycle-ns = <186>;
71 gpmc,wr-cycle-ns = <186>;

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