| /third_party/icu/icu4c/source/test/cintltst/ |
| D | cucdtst.c | 756 #define ISPR 0x100 macro
792 { 0x0020, ISPR|ISSP|ISBL }, /* space */
793 { 0x0021, ISPU|ISGR|ISPR }, /* ! */
794 { 0x0033, ISDI|ISXD|ISAN| ISGR|ISPR }, /* 3 */
795 { 0x0040, ISPU|ISGR|ISPR }, /* @ */
796 { 0x0041, ISAL| ISUP| ISXD|ISAN| ISGR|ISPR }, /* A */
797 { 0x007a, ISAL|ISLO| ISAN| ISGR|ISPR }, /* z */
798 { 0x007b, ISPU|ISGR|ISPR }, /* { */
800 { 0x00a0, ISPR|ISSP|ISBL }, /* NBSP */
801 { 0x00a4, ISGR|ISPR }, /* currency sign */
[all …]
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| /third_party/cmsis/CMSIS/Core/Include/ |
| D | core_cm0.h | 320 __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
684 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
703 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_sc000.h | 331 __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
815 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
834 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm1.h | 320 __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
711 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
730 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm0plus.h | 334 __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
802 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
821 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm23.h | 359 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
1585 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1604 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1934 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
1953 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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| D | core_armv8mbl.h | 359 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
1510 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1529 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1859 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
1878 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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| D | core_armv8mml.h | 474 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
2364 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
2383 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2737 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
2756 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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| D | core_cm35p.h | 474 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
2439 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
2458 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2812 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
2831 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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| D | core_cm33.h | 474 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
2439 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
2458 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2812 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
2831 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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| D | core_sc300.h | 351 __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
1552 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1571 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm3.h | 351 __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
1569 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1588 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm4.h | 417 __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
1745 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1764 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm7.h | 432 __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
1972 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1991 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
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| D | core_cm55.h | 481 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
3377 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
3396 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
3750 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
3769 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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| D | core_armv81mml.h | 481 __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ member
3340 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
3359 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
3713 …return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL)… in TZ_NVIC_GetPendingIRQ_NS()
3732 NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in TZ_NVIC_SetPendingIRQ_NS()
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