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Searched refs:MPU (Results 1 – 23 of 23) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dmpu_armv7.h194 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in ARM_MPU_Enable()
210 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; in ARM_MPU_Disable()
220 MPU->RNR = rnr; in ARM_MPU_ClrRegion()
221 MPU->RASR = 0U; in ARM_MPU_ClrRegion()
230 MPU->RBAR = rbar; in ARM_MPU_SetRegion()
231 MPU->RASR = rasr; in ARM_MPU_SetRegion()
241 MPU->RNR = rnr; in ARM_MPU_SetRegionEx()
242 MPU->RBAR = rbar; in ARM_MPU_SetRegionEx()
243 MPU->RASR = rasr; in ARM_MPU_SetRegionEx()
268 ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); in ARM_MPU_Load()
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Dmpu_armv8.h133 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in ARM_MPU_Enable()
149 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; in ARM_MPU_Disable()
207 ARM_MPU_SetMemAttrEx(MPU, idx, attr); in ARM_MPU_SetMemAttr()
236 ARM_MPU_ClrRegionEx(MPU, rnr); in ARM_MPU_ClrRegion()
269 ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); in ARM_MPU_SetRegion()
336 ARM_MPU_LoadEx(MPU, rnr, table, cnt); in ARM_MPU_Load()
Dcore_sc000.h674 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm0plus.h659 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_sc300.h1383 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm3.h1400 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm4.h1570 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm23.h1398 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_armv8mbl.h1323 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm7.h1797 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_armv8mml.h2145 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm35p.h2220 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm33.h2220 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_cm55.h3153 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
Dcore_armv81mml.h3116 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
/third_party/alsa-lib/src/conf/cards/
Daliases.conf29 'MPU-401 UART' cards.MPU-401
/third_party/cmsis/
DREADME.md32 …o/CMSIS_5/Zone/html/index.html) with support for multi-processor, TrustZone, and MPU configuration
/third_party/lwip/
DUPGRADING136 * modification of api modules to support FreeRTOS-MPU (don't pass stack-pointers to other threads)
DCHANGELOG657 * patch #7885: modification of api modules to support FreeRTOS-MPU
/third_party/NuttX/
DReleaseNotes1955 unit (MPU) has been integrated with the NuttX kernel build to provide
3829 the applications run in user mode (with the MPU restricting user
3974 - Several fixes to the MPU control logic.
4049 the applications run in user mode (with the MPU restricting user
4197 - Corrected Correct MPU sub-region settings for unaligned regions.
6984 - Kernel Build Support: (1) The MPU based "kernel build" renamed to a
8738 - ARMv7M MPU: Bad syntax in ARMv7-M MPU logic would cause failure to
10031 - MPU: Added MPU and protected build support.
12790 - ARMv7-M: Fix double allocation of MPU region in mmu.h.
12795 on MPU support for ARMv7-R. From Heesub Shin.
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/third_party/libnl/doc/
Droute.txt1454 MPU::
/third_party/eudev/hwdb/
D20-usb-vendor-model.hwdb21429 ID_MODEL_FROM_DATABASE=UM-4/MPU-64 MIDI Interface
D20-pci-vendor-model.hwdb46779 ID_MODEL_FROM_DATABASE=ST128 MPU Port