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Searched refs:NVIC (Results 1 – 16 of 16) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcore_cm0.h541 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
628 NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
646 … return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetEnableIRQ()
665 NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
684 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
703 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
718 NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
736 … NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | in __NVIC_SetPriority()
761 …return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __… in __NVIC_GetPriority()
Dcore_sc000.h670 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
759 NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
777 … return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetEnableIRQ()
796 NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
815 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
834 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
849 NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
867 … NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | in __NVIC_SetPriority()
892 …return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __… in __NVIC_GetPriority()
Dcore_cm1.h568 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
655 NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
673 … return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetEnableIRQ()
692 NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
711 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
730 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
745 NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
763 … NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | in __NVIC_SetPriority()
788 …return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __… in __NVIC_GetPriority()
Dcore_cm0plus.h655 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
746 NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
764 … return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetEnableIRQ()
783 NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
802 … return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); in __NVIC_GetPendingIRQ()
821 NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
836 NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
854 … NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | in __NVIC_SetPriority()
879 …return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __… in __NVIC_GetPriority()
Dcore_cm23.h1389 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
1529 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
1547 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
1566 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
1585 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1604 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1619 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
1636 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
1658 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
1679 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
[all …]
Dcore_armv8mbl.h1314 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
1454 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
1472 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
1491 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
1510 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1529 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1544 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
1561 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
1583 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
1604 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
[all …]
Dcore_sc300.h1375 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
1496 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
1514 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
1533 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
1552 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1571 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1586 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
1603 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
1625 …NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint… in __NVIC_SetPriority()
1648 return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); in __NVIC_GetPriority()
Dcore_cm3.h1392 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
1513 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
1531 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
1550 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
1569 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1588 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1603 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
1620 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
1642 …NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint… in __NVIC_SetPriority()
1665 return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); in __NVIC_GetPriority()
Dcore_armv8mml.h2135 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
2308 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
2326 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
2345 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
2364 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
2383 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2398 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
2415 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
2437 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
2458 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
[all …]
Dcore_cm35p.h2210 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
2383 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
2401 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
2420 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
2439 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
2458 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2473 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
2490 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
2512 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
2533 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
[all …]
Dcore_cm33.h2210 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
2383 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
2401 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
2420 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
2439 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
2458 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2473 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
2490 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
2512 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
2533 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
[all …]
Dcore_cm4.h1562 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
1689 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
1707 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
1726 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
1745 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1764 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
1779 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
1796 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
1818 …NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint… in __NVIC_SetPriority()
1841 return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); in __NVIC_GetPriority()
Dcore_cm7.h1789 #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc… macro
1916 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
1934 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
1953 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
1972 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
1991 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
2006 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
2023 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
2045 …NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uin… in __NVIC_SetPriority()
2068 return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); in __NVIC_GetPriority()
Dcore_cm55.h3142 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
3321 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
3339 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
3358 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
3377 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
3396 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
3411 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
3428 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
3450 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
3471 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
[all …]
Dcore_armv81mml.h3106 …#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration str… macro
3284 NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_EnableIRQ()
3302 …return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetEnableIRQ()
3321 NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_DisableIRQ()
3340 …return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetPendingIRQ()
3359 NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_SetPendingIRQ()
3374 NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); in __NVIC_ClearPendingIRQ()
3391 …return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in __NVIC_GetActive()
3413 …return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) … in NVIC_GetTargetState()
3434 NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); in NVIC_SetTargetState()
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/third_party/NuttX/
DReleaseNotes3129 * ARMv7-M: Added logic to reset the MCU using the NVIC.
9839 - All ARMV7-M IRQ setup: Always set the NVIC vector table address
9843 base address from the NVIC. Suggested by Pavel Pisa.
18606 - ARMv7-M: Add NVIC definitions needed by up_trigger_irq(). From
20327 were not be disabled correctly on power up. Writing zero to the NVIC
20329 it is necessary to write all ones to the NVIC CLEAR-ENABLE register.
24952 GPTM peripheral. Interrupts are not enabled in NVIC until
25333 generates the interrupt or at the NVIC. Disabling global interrupts
25438 was setting up the alarm IRQ up_initialize is initializing the NVIC.
25439 This most likely worked in the past due to a bug in the NVIC
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