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Searched refs:andps (Results 1 – 24 of 24) sorted by relevance

/third_party/mesa3d/src/mesa/x86/
Dread_rgba_span_x86.S391 andps %xmm1, %xmm0
393 andps %xmm2, %xmm3
396 andps %xmm2, %xmm4
420 andps %xmm1, %xmm0
422 andps %xmm2, %xmm3
425 andps %xmm2, %xmm4
450 andps %xmm1, %xmm0
452 andps %xmm2, %xmm3
455 andps %xmm2, %xmm4
Dassyntax.h1633 #define ANDPS(a, b) andps P_ARG2(a, b)
/third_party/musl/src/math/x86_64/
Dfabsf.s6 andps %xmm1,%xmm0
/third_party/musl/src/math/x32/
Dfabsf.s6 andps %xmm1,%xmm0
/third_party/mesa3d/src/mesa/x86-64/
Dxform4.S165 andps %xmm9, %xmm4 /* 0.0 | m2 | m1 | m0 */
167 andps %xmm9, %xmm5 /* 0.0 | m6 | m5 | m4 */
169 andps %xmm9, %xmm6 /* 0.0 | m10 | m9 | m8 */
170 andps %xmm9, %xmm7 /* 0.0 | m14 | m13 | m12 */
/third_party/ffmpeg/libavcodec/x86/
Daacencdsp.asm42 andps m0, m2, [inq+sizeq]
80 andps m5, m4, [inq+sizeq]
Dvorbisdsp.asm75 andps m2, m5 ; keep only the sign bit
78 andps m3, m1
Dimdct36.asm188 andps m6, m6, [ps_mask]
211 andps m5, m5, [ps_mask3]
214 andps m7, m7, [ps_mask2]
219 andps m6, m6, [ps_mask2]
224 andps m7, m7, [ps_mask2]
229 andps m6, m6, [ps_mask4]
Dcelt_pvq_search.asm108andps m5, m0 ; if(X[i] == 0) Sxy_new = 0; Prevent aproximation error from setti…
119 andps m5, m0 ; (0<y)?m5:0
188 andps m1, mm_const_float_1 ; m1 = [ 0...1.0...0]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td399 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
420 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
441 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
/third_party/gstreamer/gstplugins_good/gst/deinterlace/tvtime/
Dsse.h701 #define andps_m2r(var, reg) sse_m2r(andps, var, reg)
702 #define andps_r2r(regs, regd) sse_r2r(andps, regs, regd)
703 #define andps(vars, vard, xmmreg) sse_m2m(andps, vars, vard, xmmreg) macro
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DREADME.SIMD.rst57 operation can be implemented with pand, andpd, or andps. This pattern also
DIceAssemblerX8632.h583 void andps(Type Ty, XmmRegister dst, const AsmAddress &src);
584 void andps(Type Ty, XmmRegister dst, XmmRegister src);
DIceAssemblerX8664.h602 void andps(Type Ty, XmmRegister dst, const AsmAddress &src);
603 void andps(Type Ty, XmmRegister dst, XmmRegister src);
DIceAssemblerX8632.cpp1233 void AssemblerX8632::andps(Type Ty, XmmRegister dst, XmmRegister src) { in andps() function in Ice::X8632::AssemblerX8632
1242 void AssemblerX8632::andps(Type Ty, XmmRegister dst, const AsmAddress &src) { in andps() function in Ice::X8632::AssemblerX8632
DIceAssemblerX8664.cpp1324 void AssemblerX8664::andps(Type Ty, XmmRegister dst, XmmRegister src) { in andps() function in Ice::X8664::AssemblerX8664
1334 void AssemblerX8664::andps(Type Ty, XmmRegister dst, const AsmAddress &src) { in andps() function in Ice::X8664::AssemblerX8664
DIceInstX8664.h3461 &Assembler::andps, &Assembler::andps};
DIceInstX8632.h3564 &Assembler::andps, &Assembler::andps};
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DXmmArith.cpp551 (0.55, 0.43, 0.23, 1.21), andps, &, float); \ in TEST_F()
553 (0.55, 0.43, 0.23, 1.21), andps, &, float); \ in TEST_F()
554 TestArithPSXmmXmm(64, Dst, (1.0, -1000.0), Src, (0.55, 1.21), andps, &, \ in TEST_F()
556 TestArithPSXmmAddr(64, Dst, (1.0, -1000.0), (0.55, 1.21), andps, &, \ in TEST_F()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DXmmArith.cpp549 (0.55, 0.43, 0.23, 1.21), andps, &, float); \ in TEST_F()
551 (0.55, 0.43, 0.23, 1.21), andps, &, float); \ in TEST_F()
552 TestArithPSXmmXmm(64, Dst, (1.0, -1000.0), Src, (0.55, 1.21), andps, &, \ in TEST_F()
554 TestArithPSXmmAddr(64, Dst, (1.0, -1000.0), (0.55, 1.21), andps, &, \ in TEST_F()
/third_party/ffmpeg/libavutil/x86/
Dx86util.asm1003 andps %2, %3
Dx86inc.asm1307 AVX_INSTR andps, sse, 1, 0, 1
/third_party/gstreamer/gstplugins_good/gst/deinterlace/x86/
Dx86inc.asm1293 AVX_INSTR andps, sse, 1, 0, 1
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc7616 "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
8097 …{ 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR…
8098 …{ 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, M…
22708 …{ 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR…
22709 …{ 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK…